Re: [Qemu-devel] qemu/pci: Unaligned config read/write overflow

2006-11-29 Thread andrzej zaborowski
Hi, On 28/11/06, Herbert Xu [EMAIL PROTECTED] wrote: The default config read/write handlers allows a 4-byte read/write at address 255. This can clobber the field after the config area. This happens to be the PCIBus pointer in the PCIDevice structure. An easier way to prevent the clobbering

[Qemu-devel] qemu/pci: Unaligned config read/write overflow

2006-11-27 Thread Herbert Xu
Hi: [QEMU] pci: Unaligned config read/write overflow The default config read/write handlers allows a 4-byte read/write at address 255. This can clobber the field after the config area. This happens to be the PCIBus pointer in the PCIDevice structure. This patch stops this from reducing the