[Qemu-devel] qemu/target-mips helper.c

2008-01-04 Thread Thiemo Seufer 
CVSROOT:/sources/qemu
Module name:qemu
Changes by: Thiemo Seufer ths 08/01/04 17:52:57

Modified files:
target-mips: helper.c 

Log message:
Handle some more exception types.

CVSWeb URLs:
http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/helper.c?cvsroot=qemur1=1.62r2=1.63

[Qemu-devel] qemu/target-mips helper.c

2008-01-03 Thread Thiemo Seufer 
CVSROOT:/sources/qemu
Module name:qemu
Changes by: Thiemo Seufer ths 08/01/03 21:26:24

Modified files:
target-mips: helper.c 

Log message:
Fix exception debug output.

CVSWeb URLs:
http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/helper.c?cvsroot=qemur1=1.61r2=1.62

[Qemu-devel] qemu/target-mips helper.c

2007-11-21 Thread Thiemo Seufer 
CVSROOT:/sources/qemu
Module name:qemu
Changes by: Thiemo Seufer ths 07/11/22 00:34:37

Modified files:
target-mips: helper.c 

Log message:
Fix off-by-one address checks in MIPS64 MMU, by Aurelien Jarno.

CVSWeb URLs:
http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/helper.c?cvsroot=qemur1=1.58r2=1.59

[Qemu-devel] qemu/target-mips helper.c

2007-10-28 Thread Thiemo Seufer 
CVSROOT:/sources/qemu
Module name:qemu
Changes by: Thiemo Seufer ths 07/10/29 02:57:19

Modified files:
target-mips: helper.c 

Log message:
Fix logic bug which broke TLBL/TLBS handling somewhat.

CVSWeb URLs:
http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/helper.c?cvsroot=qemur1=1.56r2=1.57

[Qemu-devel] qemu/target-mips helper.c

2007-10-13 Thread Thiemo Seufer 
CVSROOT:/sources/qemu
Module name:qemu
Changes by: Thiemo Seufer ths 07/10/13 17:29:10

Modified files:
target-mips: helper.c 

Log message:
Fix off-by-one in address check.

CVSWeb URLs:
http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/helper.c?cvsroot=qemur1=1.53r2=1.54

[Qemu-devel] qemu/target-mips helper.c op.c translate.c tran...

2007-08-26 Thread Thiemo Seufer 
CVSROOT:/sources/qemu
Module name:qemu
Changes by: Thiemo Seufer ths 07/08/26 17:37:23

Modified files:
target-mips: helper.c op.c translate.c translate_init.c 

Log message:
Disable 64-bit instructions on 32-bit CPU, by Aurelien Jarno.

CVSWeb URLs:
http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/helper.c?cvsroot=qemur1=1.44r2=1.45
http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/op.c?cvsroot=qemur1=1.68r2=1.69
http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/translate.c?cvsroot=qemur1=1.94r2=1.95
http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/translate_init.c?cvsroot=qemur1=1.18r2=1.19

[Qemu-devel] qemu/target-mips helper.c op.c

2007-06-25 Thread Thiemo Seufer 
CVSROOT:/sources/qemu
Module name:qemu
Changes by: Thiemo Seufer ths 07/06/25 17:34:33

Modified files:
target-mips: helper.c op.c 

Log message:
MIPS64 improvements, based on a patch by Aurelien Jarno.

CVSWeb URLs:
http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/helper.c?cvsroot=qemur1=1.43r2=1.44
http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/op.c?cvsroot=qemur1=1.67r2=1.68

[Qemu-devel] qemu/target-mips helper.c op.c op_helper.c

2007-05-13 Thread Thiemo Seufer 
CVSROOT:/sources/qemu
Module name:qemu
Changes by: Thiemo Seufer ths 07/05/13 14:07:26

Modified files:
target-mips: helper.c op.c op_helper.c 

Log message:
MMU code improvements, by Aurelien Jarno.

CVSWeb URLs:
http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/helper.c?cvsroot=qemur1=1.38r2=1.39
http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/op.c?cvsroot=qemur1=1.50r2=1.51
http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/op_helper.c?cvsroot=qemur1=1.43r2=1.44

[Qemu-devel] qemu/target-mips helper.c op.c op_helper.c

2007-05-13 Thread Thiemo Seufer 
CVSROOT:/sources/qemu
Module name:qemu
Changes by: Thiemo Seufer ths 07/05/13 19:22:13

Modified files:
target-mips: helper.c op.c op_helper.c 

Log message:
Full MIPS64 MMU implementation, by Aurelien Jarno.

CVSWeb URLs:
http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/helper.c?cvsroot=qemur1=1.39r2=1.40
http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/op.c?cvsroot=qemur1=1.53r2=1.54
http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/op_helper.c?cvsroot=qemur1=1.44r2=1.45

[Qemu-devel] qemu/target-mips helper.c

2007-05-07 Thread Thiemo Seufer 
CVSROOT:/sources/qemu
Module name:qemu
Changes by: Thiemo Seufer ths 07/05/07 12:46:25

Modified files:
target-mips: helper.c 

Log message:
Clear BD slot on next exception if appropriate.

CVSWeb URLs:
http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/helper.c?cvsroot=qemur1=1.34r2=1.35

[Qemu-devel] qemu/target-mips helper.c op.c

2007-04-13 Thread Thiemo Seufer 
CVSROOT:/sources/qemu
Module name:qemu
Changes by: Thiemo Seufer ths 07/04/13 20:17:54

Modified files:
target-mips: helper.c op.c 

Log message:
Another fix for CP0 Cause register handling.

CVSWeb URLs:
http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/helper.c?cvsroot=qemur1=1.33r2=1.34
http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/op.c?cvsroot=qemur1=1.39r2=1.40

[Qemu-devel] qemu/target-mips helper.c

2007-04-06 Thread Thiemo Seufer 
CVSROOT:/sources/qemu
Module name:qemu
Changes by: Thiemo Seufer ths 07/04/06 19:31:06

Modified files:
target-mips: helper.c 

Log message:
Fix handling of ADES exceptions.

CVSWeb URLs:
http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/helper.c?cvsroot=qemur1=1.31r2=1.32

[Qemu-devel] qemu/target-mips helper.c

2007-04-05 Thread Thiemo Seufer 
CVSROOT:/sources/qemu
Module name:qemu
Changes by: Thiemo Seufer ths 07/04/05 23:18:13

Modified files:
target-mips: helper.c 

Log message:
Handle EBase properly.

CVSWeb URLs:
http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/helper.c?cvsroot=qemur1=1.29r2=1.30

[Qemu-devel] qemu/target-mips helper.c translate.c

2007-04-05 Thread Thiemo Seufer 
CVSROOT:/sources/qemu
Module name:qemu
Changes by: Thiemo Seufer ths 07/04/05 23:21:37

Modified files:
target-mips: helper.c translate.c 

Log message:
fix branch delay slot cornercases.

CVSWeb URLs:
http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/helper.c?cvsroot=qemur1=1.30r2=1.31
http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/translate.c?cvsroot=qemur1=1.47r2=1.48

[Qemu-devel] qemu/target-mips helper.c

2007-03-30 Thread Thiemo Seufer 
CVSROOT:/sources/qemu
Module name:qemu
Changes by: Thiemo Seufer ths 07/03/30 17:48:00

Modified files:
target-mips: helper.c 

Log message:
Squash logic bugs while they are fresh...

CVSWeb URLs:
http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/helper.c?cvsroot=qemur1=1.28r2=1.29

[Qemu-devel] qemu/target-mips helper.c op.c op_helper.c

2007-02-17 Thread Thiemo Seufer 
CVSROOT:/sources/qemu
Module name:qemu
Changes by: Thiemo Seufer ths 07/02/18 00:19:08

Modified files:
target-mips: helper.c op.c op_helper.c 

Log message:
Fix sign-extension of VPN field in TLB, by Herve Poussineau.

CVSWeb URLs:
http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/helper.c?cvsroot=qemur1=1.24r2=1.25
http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/op.c?cvsroot=qemur1=1.22r2=1.23
http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/op_helper.c?cvsroot=qemur1=1.28r2=1.29


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[Qemu-devel] qemu/target-mips helper.c op_helper.c

2007-01-20 Thread Thiemo Seufer 
CVSROOT:/sources/qemu
Module name:qemu
Changes by: Thiemo Seufer ths 07/01/21 03:12:25

Modified files:
target-mips: helper.c op_helper.c 

Log message:
Bring TLB / PageSize handling in line with real hardware behaviour.

CVSWeb URLs:
http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/helper.c?cvsroot=qemur1=1.22r2=1.23
http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/op_helper.c?cvsroot=qemur1=1.24r2=1.25


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[Qemu-devel] qemu/target-mips helper.c translate.c

2006-12-07 Thread Thiemo Seufer 
CVSROOT:/sources/qemu
Module name:qemu
Changes by: Thiemo Seufer ths 06/12/07 16:22:15

Modified files:
target-mips: helper.c translate.c 

Log message:
Fix reset handling, CP0 isn't enabled by default (a fact which doesn't
matter when running in kernel space).

CVSWeb URLs:
http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/helper.c?cvsroot=qemur1=1.17r2=1.18
http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/translate.c?cvsroot=qemur1=1.24r2=1.25


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Re: [Qemu-devel] qemu/target-mips helper.c translate.c (compiler error)

2006-12-07 Thread Stefan Weil 
Hi,

the latest changes of QEMU CVS break compilation for MIPS systems
without a FPU. Such systems are in wide use (DSL routers like
Sinus 154 and Fritz!Box), and several developers already use QEMU
for emulation of these systems.

I'm sorry that I cannot provide a patch which fixes the compiler
errors. The patch given below can be used to get my test configuration.

Regards
Stefan Weil


Patch for compilation test of MIPS system without FPU

RCS file: /sources/qemu/qemu/target-mips/mips-defs.h,v
retrieving revision 1.5
diff -u -b -B -r1.5 mips-defs.h
--- target-mips/mips-defs.h 6 Dec 2006 20:17:30 -   1.5
+++ target-mips/mips-defs.h 7 Dec 2006 18:23:09 -
@@ -25,6 +25,7 @@
 #define MIPS_TLB_MAX 128
 /* basic FPU register support */
 #define MIPS_USES_FPU 1
+#undef MIPS_USES_FPU
 /* Define a implementation number of 1.
  * Define a major version 1, minor version 0.
  */




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Re: [Qemu-devel] qemu/target-mips helper.c translate.c (compiler error)

2006-12-07 Thread Paul Brook 
On Thursday 07 December 2006 18:44, Stefan Weil wrote:
 Hi,

 the latest changes of QEMU CVS break compilation for MIPS systems
 without a FPU. Such systems are in wide use (DSL routers like
 Sinus 154 and Fritz!Box), and several developers already use QEMU
 for emulation of these systems.

If you made the effort to submit these ports, instead of maintaining them out 
of tree, they'd be less likely to get broken.

Paul


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Re: [Qemu-devel] qemu/target-mips helper.c translate.c (compiler error)

2006-12-07 Thread Thiemo Seufer 
Stefan Weil wrote:
 Hi,
 
 the latest changes of QEMU CVS break compilation for MIPS systems
 without a FPU. Such systems are in wide use (DSL routers like
 Sinus 154 and Fritz!Box), and several developers already use QEMU
 for emulation of these systems.

Fixed, thanks for the report.


Thiemo


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Re: [Qemu-devel] qemu/target-mips helper.c translate.c (compiler error)

2006-12-07 Thread Stefan Weil 
Paul, did you get my last mailing on this subject?
(see http://lists.gnu.org/archive/html/qemu-devel/2006-05/msg00280.html)

I'd be very glad to maintain my code in the tree, but Thiemo is right.
Today, it takes sometimes very long until a patch gets integrated.

Maybe a switch to another configuration management system might allow
more people to contribute. My personal experiences with switching from
CVS to Subversion are very positive, and I offer my help in doing it.

Thank you, Thiemo, for the quick reaction on my report. CVS is working
again.

Stefan

Paul Brook schrieb:

 If you made the effort to submit these ports, instead of maintaining
 them out
 of tree, they'd be less likely to get broken.

 Paul




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Re: [Qemu-devel] qemu/target-mips helper.c translate.c (compiler error)

2006-12-07 Thread Paul Brook 
On Thursday 07 December 2006 22:22, Stefan Weil wrote:
 Paul, did you get my last mailing on this subject?
 (see http://lists.gnu.org/archive/html/qemu-devel/2006-05/msg00280.html)

My point exactly. Posting a link to a random website isn't sufficient, 
especially when you say my patches are still not ready for integration.

I think it's fair to say that everyone involved with qemu doesn't even have 
time to do the things they are personally interested in. If you want to get 
things integrated *you* have to put the effort in to get it submitted in a 
form where that can happen.

Paul


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[Qemu-devel] qemu/target-mips helper.c op.c op_helper.c

2006-06-26 Thread Fabrice Bellard 
CVSROOT:/sources/qemu
Module name:qemu
Changes by: Fabrice Bellard bellard   06/06/26 20:29:47

Modified files:
target-mips: helper.c op.c op_helper.c 

Log message:
consistent update of ERL and EXL
(Dirk Behme)

CVSWeb URLs:
http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/helper.c?cvsroot=qemur1=1.14r2=1.15
http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/op.c?cvsroot=qemur1=1.8r2=1.9
http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/op_helper.c?cvsroot=qemur1=1.14r2=1.15


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[Qemu-devel] qemu/target-mips helper.c cpu.h

2006-06-14 Thread Fabrice Bellard 
CVSROOT:/sources/qemu
Module name:qemu
Changes by: Fabrice Bellard bellard   06/06/14 17:15:19

Modified files:
target-mips: helper.c cpu.h 

Log message:
use constants for TLB handling (Thiemo Seufer)

CVSWeb URLs:
http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/helper.c?cvsroot=qemur1=1.13r2=1.14
http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/cpu.h?cvsroot=qemur1=1.8r2=1.9

Patches:
Index: helper.c
===
RCS file: /sources/qemu/qemu/target-mips/helper.c,v
retrieving revision 1.13
retrieving revision 1.14
diff -u -b -r1.13 -r1.14
--- helper.c22 May 2006 22:14:43 -  1.13
+++ helper.c14 Jun 2006 17:15:19 -  1.14
@@ -28,53 +28,56 @@
 #include cpu.h
 #include exec-all.h
 
+enum {
+TLBRET_DIRTY = -4,
+TLBRET_INVALID = -3,
+TLBRET_NOMATCH = -2,
+TLBRET_BADADDR = -1,
+TLBRET_MATCH = 0
+};
+
 /* MIPS32 4K MMU emulation */
 #ifdef MIPS_USES_R4K_TLB
 static int map_address (CPUState *env, target_ulong *physical, int *prot,
 target_ulong address, int rw, int access_type)
 {
+target_ulong tag = address  (TARGET_PAGE_MASK  1);
+uint8_t ASID = env-CP0_EntryHi  0xFF;
 tlb_t *tlb;
-target_ulong tag;
-uint8_t ASID;
 int i, n;
-int ret;
 
-ret = -2;
-tag = address  0xE000;
-ASID = env-CP0_EntryHi  0xFF;
 for (i = 0; i  MIPS_TLB_NB; i++) {
 tlb = env-tlb[i];
 /* Check ASID, virtual page number  size */
 if ((tlb-G == 1 || tlb-ASID == ASID) 
 tlb-VPN == tag  address  tlb-end2) {
 /* TLB match */
-n = (address  12)  1;
+n = (address  TARGET_PAGE_BITS)  1;
 /* Check access rights */
if (!(n ? tlb-V1 : tlb-V0))
-return -3;
+return TLBRET_INVALID;
if (rw == 0 || (n ? tlb-D1 : tlb-D0)) {
-*physical = tlb-PFN[n] | (address  0xFFF);
+*physical = tlb-PFN[n] | (address  ~TARGET_PAGE_MASK);
 *prot = PAGE_READ;
 if (n ? tlb-D1 : tlb-D0)
 *prot |= PAGE_WRITE;
-return 0;
+return TLBRET_MATCH;
 }
-return -4;
+return TLBRET_DIRTY;
 }
 }
-
-return ret;
+return TLBRET_NOMATCH;
 }
 #endif
 
-int get_physical_address (CPUState *env, target_ulong *physical, int *prot,
-  target_ulong address, int rw, int access_type)
+static int get_physical_address (CPUState *env, target_ulong *physical,
+int *prot, target_ulong address,
+int rw, int access_type)
 {
-int user_mode;
-int ret;
-
 /* User mode can only access useg */
-user_mode = (env-hflags  MIPS_HFLAG_MODE) == MIPS_HFLAG_UM;
+int user_mode = (env-hflags  MIPS_HFLAG_MODE) == MIPS_HFLAG_UM;
+int ret = TLBRET_MATCH;
+
 #if 0
 if (logfile) {
 fprintf(logfile, user mode %d h %08x\n,
@@ -82,8 +85,7 @@
 }
 #endif
 if (user_mode  address  0x7FFFUL)
-return -1;
-ret = 0;
+return TLBRET_BADADDR;
 if (address  0x8000UL) {
 if (!(env-hflags  MIPS_HFLAG_ERL)) {
 #ifdef MIPS_USES_R4K_TLB
@@ -181,7 +183,7 @@
 access_type = ACCESS_INT;
 if (env-user_mode_only) {
 /* user mode only emulation */
-ret = -2;
+ret = TLBRET_NOMATCH;
 goto do_fault;
 }
 ret = get_physical_address(env, physical, prot,
@@ -190,14 +192,15 @@
 fprintf(logfile, %s address=%08x ret %d physical %08x prot %d\n,
 __func__, address, ret, physical, prot);
 }
-if (ret == 0) {
-   ret = tlb_set_page(env, address  ~0xFFF, physical  ~0xFFF, prot,
+if (ret == TLBRET_MATCH) {
+   ret = tlb_set_page(env, address  TARGET_PAGE_MASK,
+  physical  TARGET_PAGE_MASK, prot,
   is_user, is_softmmu);
 } else if (ret  0) {
 do_fault:
 switch (ret) {
 default:
-case -1:
+case TLBRET_BADADDR:
 /* Reference to kernel address from user mode or supervisor mode */
 /* Reference to supervisor address from user mode */
 if (rw)
@@ -205,7 +208,7 @@
 else
 exception = EXCP_AdEL;
 break;
-case -2:
+case TLBRET_NOMATCH:
 /* No TLB match for a mapped address */
 if (rw)
 exception = EXCP_TLBS;
@@ -213,14 +216,14 @@
 exception = EXCP_TLBL;
 error_code = 1;
 break;
-case -3:
+case TLBRET_INVALID:
 /* TLB match with no valid bit */
 if (rw)
 exception = EXCP_TLBS;
 else
 exception = EXCP_TLBL;
 break;
-case -4:
+case

[Qemu-devel] qemu/target-mips helper.c op_helper.c translate.c

2006-05-22 Thread Fabrice Bellard 
CVSROOT:/sources/qemu
Module name:qemu
Branch: 
Changes by: Fabrice Bellard [EMAIL PROTECTED] 06/05/22 22:13:29

Modified files:
target-mips: helper.c op_helper.c translate.c 

Log message:
cosmetics (Thiemo Seufer)

CVSWeb URLs:
http://cvs.savannah.gnu.org/viewcvs/qemu/qemu/target-mips/helper.c.diff?tr1=1.11tr2=1.12r1=textr2=text
http://cvs.savannah.gnu.org/viewcvs/qemu/qemu/target-mips/op_helper.c.diff?tr1=1.11tr2=1.12r1=textr2=text
http://cvs.savannah.gnu.org/viewcvs/qemu/qemu/target-mips/translate.c.diff?tr1=1.12tr2=1.13r1=textr2=text


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[Qemu-devel] qemu/target-mips helper.c op_helper.c

2006-05-22 Thread Fabrice Bellard 
CVSROOT:/sources/qemu
Module name:qemu
Branch: 
Changes by: Fabrice Bellard [EMAIL PROTECTED] 06/05/22 22:14:43

Modified files:
target-mips: helper.c op_helper.c 

Log message:
fix wrong bitmasks for CP0_Context and CP0_EntryHi (Thiemo Seufer)

CVSWeb URLs:
http://cvs.savannah.gnu.org/viewcvs/qemu/qemu/target-mips/helper.c.diff?tr1=1.12tr2=1.13r1=textr2=text
http://cvs.savannah.gnu.org/viewcvs/qemu/qemu/target-mips/op_helper.c.diff?tr1=1.12tr2=1.13r1=textr2=text


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[Qemu-devel] qemu/target-mips helper.c

2006-03-11 Thread Paul Brook 
CVSROOT:/sources/qemu
Module name:qemu
Branch: 
Changes by: Paul Brook [EMAIL PROTECTED]  06/03/11 16:35:30

Modified files:
target-mips: helper.c 

Log message:
Clear MIPS_HFLAG_BMASK for ErrorEPC (Thiemo Seufer).

CVSWeb URLs:
http://cvs.savannah.gnu.org/viewcvs/qemu/qemu/target-mips/helper.c.diff?tr1=1.9tr2=1.10r1=textr2=text


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[Qemu-devel] qemu/target-mips helper.c

2005-07-02 Thread Fabrice Bellard 
CVSROOT:/cvsroot/qemu
Module name:qemu
Branch: 
Changes by: Fabrice Bellard [EMAIL PROTECTED] 05/07/02 15:12:18

Modified files:
target-mips: helper.c 

Log message:
remove nonsense exception code (Ralf Baechle)

CVSWeb URLs:
http://savannah.gnu.org/cgi-bin/viewcvs/qemu/qemu/target-mips/helper.c.diff?tr1=1.2tr2=1.3r1=textr2=text



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[Qemu-devel] qemu/target-mips helper.c

2005-07-02 Thread Fabrice Bellard 
CVSROOT:/cvsroot/qemu
Module name:qemu
Branch: 
Changes by: Fabrice Bellard [EMAIL PROTECTED] 05/07/02 15:34:05

Modified files:
target-mips: helper.c 

Log message:
fixed c0_context in tlb exception (Ralf Baechle)

CVSWeb URLs:
http://savannah.gnu.org/cgi-bin/viewcvs/qemu/qemu/target-mips/helper.c.diff?tr1=1.4tr2=1.5r1=textr2=text



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[Qemu-devel] qemu/target-mips helper.c

2005-07-02 Thread Fabrice Bellard 
CVSROOT:/cvsroot/qemu
Module name:qemu
Branch: 
Changes by: Fabrice Bellard [EMAIL PROTECTED] 05/07/02 15:35:03

Modified files:
target-mips: helper.c 

Log message:
TLB reload exception vector (Ralf Baechle)

CVSWeb URLs:
http://savannah.gnu.org/cgi-bin/viewcvs/qemu/qemu/target-mips/helper.c.diff?tr1=1.5tr2=1.6r1=textr2=text



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