Re: [RFC 05/15] target/riscv: rvb: pack two words into one register

On 11/18/20 12:29 AM, frank.ch...@sifive.com wrote: > +static void gen_pack(TCGv ret, TCGv arg1, TCGv arg2) > +{ > +TCGv lower, higher; > +lower = tcg_temp_new(); > +higher = tcg_temp_new(); > + > +#ifdef TARGET_RISCV64 > +tcg_gen_ext32u_tl(lower, arg1); > +

[RFC 05/15] target/riscv: rvb: pack two words into one register

From: Kito Cheng Signed-off-by: Kito Cheng --- target/riscv/insn32-64.decode | 3 + target/riscv/insn32.decode | 3 + target/riscv/insn_trans/trans_rvb.c.inc | 30 target/riscv/translate.c| 92 + 4 files changed, 128