On 2021/8/12 下午2:12, Richard Henderson wrote:
On 8/11/21 7:03 PM, LIU Zhiwei wrote:
On 2021/8/12 下午12:42, Richard Henderson wrote:
On 8/11/21 12:40 PM, LIU Zhiwei wrote:
If the software doesn't use the high part, who cares the really
value in high part? Do you know the benefit? Thanks
On 8/11/21 7:03 PM, LIU Zhiwei wrote:
On 2021/8/12 下午12:42, Richard Henderson wrote:
On 8/11/21 12:40 PM, LIU Zhiwei wrote:
If the software doesn't use the high part, who cares the really value in high part? Do
you know the benefit? Thanks again.
I do not.
I simply presume that they
On 2021/8/12 下午12:42, Richard Henderson wrote:
On 8/11/21 12:40 PM, LIU Zhiwei wrote:
If the software doesn't use the high part, who cares the really value
in high part? Do you know the benefit? Thanks again.
I do not.
I simply presume that they already have the hardware, in the form of
On 8/11/21 12:40 PM, LIU Zhiwei wrote:
If the software doesn't use the high part, who cares the really value in high part? Do you
know the benefit? Thanks again.
I do not.
I simply presume that they already have the hardware, in the form of the addw instruction,
etc.
The mistake, I think,
On 2021/8/12 上午1:56, Richard Henderson wrote:
On 8/11/21 4:57 AM, LIU Zhiwei wrote:
I still don't know why the value written sign-extended. If that's
the the rule of final specification, I will try to obey it although
our Linux will not depend on the high part.
The text that I'm looking
On 8/11/21 4:57 AM, LIU Zhiwei wrote:
I still don't know why the value written sign-extended. If that's the the rule of final
specification, I will try to obey it although our Linux will not depend on the high part.
The text that I'm looking at is
On 2021/8/10 上午3:34, Richard Henderson wrote:
On 8/8/21 3:45 PM, LIU Zhiwei wrote:
On 2021/8/6 上午3:06, Richard Henderson wrote:
On 8/4/21 4:53 PM, LIU Zhiwei wrote:
+static TCGv gpr_src_u(DisasContext *ctx, int reg_num)
+{
+ if (reg_num == 0) {
+ return ctx->zero;
+ }
+ if
On 8/8/21 3:45 PM, LIU Zhiwei wrote:
On 2021/8/6 上午3:06, Richard Henderson wrote:
On 8/4/21 4:53 PM, LIU Zhiwei wrote:
+static TCGv gpr_src_u(DisasContext *ctx, int reg_num)
+{
+ if (reg_num == 0) {
+ return ctx->zero;
+ }
+ if (ctx->uxl32) {
+
On 2021/8/6 上午3:06, Richard Henderson wrote:
On 8/4/21 4:53 PM, LIU Zhiwei wrote:
+static TCGv gpr_src_u(DisasContext *ctx, int reg_num)
+{
+ if (reg_num == 0) {
+ return ctx->zero;
+ }
+ if (ctx->uxl32) {
+ tcg_gen_ext32u_tl(cpu_gpr[reg_num], cpu_gpr[reg_num]);
+ }
On 8/4/21 4:53 PM, LIU Zhiwei wrote:
+static TCGv gpr_src_u(DisasContext *ctx, int reg_num)
+{
+if (reg_num == 0) {
+return ctx->zero;
+}
+if (ctx->uxl32) {
+tcg_gen_ext32u_tl(cpu_gpr[reg_num], cpu_gpr[reg_num]);
+}
+return cpu_gpr[reg_num];
+}
+
+static TCGv
When UXLEN is 32 on 64-bit CPU, only use the LSB 32 bits of source
registers and sign-extend or zero-extend it according to different
operations.
Signed-off-by: LIU Zhiwei
---
target/riscv/insn_trans/trans_rvi.c.inc | 38 -
target/riscv/translate.c| 22
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