Re: [RFC PATCH 2/3] hw/peci: add PECI support for NPCM7xx BMCs
On Tue, Sep 06, 2022 at 10:05:51PM +, Titus Rwantare wrote:
> This allows BMC firmware for npcm7xx BMCs to talk to a PECI client
> in qemu.
>
> Signed-off-by: Titus Rwantare
> Reviewed-by: Patrick Venture
Looks good to me!
Reviewed-by: Peter Delevoryas
> ---
> MAINTAINERS| 3 +-
> hw/arm/Kconfig | 1 +
> hw/arm/npcm7xx.c | 9 ++
> hw/peci/meson.build| 1 +
> hw/peci/npcm7xx_peci.c | 204 +
> hw/peci/trace-events | 5 +
> include/hw/arm/npcm7xx.h | 2 +
> include/hw/peci/npcm7xx_peci.h | 37 ++
> 8 files changed, 261 insertions(+), 1 deletion(-)
> create mode 100644 hw/peci/npcm7xx_peci.c
> create mode 100644 include/hw/peci/npcm7xx_peci.h
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 14ab29679d..f87dfe5bfa 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -2959,7 +2959,7 @@ R: Paolo Bonzini
> R: Bandan Das
> R: Stefan Hajnoczi
> R: Thomas Huth
> -R: Darren Kenny
> +R: Darren Kenny
> R: Qiuhao Li
> S: Maintained
> F: tests/qtest/fuzz/
> @@ -3218,6 +3218,7 @@ S: Maintained
> F: hw/peci/peci-core.c
> F: hw/peci/peci-client.c
> F: include/hw/peci/peci.h
> +F: hw/peci/npcm7xx_peci.c
>
> Firmware schema specifications
> M: Philippe Mathieu-Daudé
> diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
> index 15fa79afd3..cb38c6c88f 100644
> --- a/hw/arm/Kconfig
> +++ b/hw/arm/Kconfig
> @@ -408,6 +408,7 @@ config NPCM7XX
> select SSI
> select UNIMP
> select PCA954X
> +select PECI
>
> config FSL_IMX25
> bool
> diff --git a/hw/arm/npcm7xx.c b/hw/arm/npcm7xx.c
> index d85cc02765..d408dd7eb4 100644
> --- a/hw/arm/npcm7xx.c
> +++ b/hw/arm/npcm7xx.c
> @@ -45,6 +45,7 @@
> #define NPCM7XX_CLK_BA (0xf0801000)
> #define NPCM7XX_MC_BA (0xf0824000)
> #define NPCM7XX_RNG_BA (0xf000b000)
> +#define NPCM7XX_PECI_BA (0xf010)
>
> /* USB Host modules */
> #define NPCM7XX_EHCI_BA (0xf0806000)
> @@ -83,6 +84,7 @@ enum NPCM7xxInterrupt {
> NPCM7XX_UART1_IRQ,
> NPCM7XX_UART2_IRQ,
> NPCM7XX_UART3_IRQ,
> +NPCM7XX_PECI_IRQ= 6,
> NPCM7XX_EMC1RX_IRQ = 15,
> NPCM7XX_EMC1TX_IRQ,
> NPCM7XX_MMC_IRQ = 26,
> @@ -445,6 +447,7 @@ static void npcm7xx_init(Object *obj)
> }
>
> object_initialize_child(obj, "mmc", >mmc, TYPE_NPCM7XX_SDHCI);
> +object_initialize_child(obj, "peci", >peci, TYPE_NPCM7XX_PECI);
> }
>
> static void npcm7xx_realize(DeviceState *dev, Error **errp)
> @@ -715,6 +718,12 @@ static void npcm7xx_realize(DeviceState *dev, Error
> **errp)
> sysbus_connect_irq(SYS_BUS_DEVICE(>mmc), 0,
> npcm7xx_irq(s, NPCM7XX_MMC_IRQ));
>
> + /* PECI */
> +sysbus_realize(SYS_BUS_DEVICE(>peci), _abort);
> +sysbus_mmio_map(SYS_BUS_DEVICE(>peci), 0, NPCM7XX_PECI_BA);
> +sysbus_connect_irq(SYS_BUS_DEVICE(>peci), 0,
> + npcm7xx_irq(s, NPCM7XX_PECI_IRQ));
> +
> create_unimplemented_device("npcm7xx.shm", 0xc0001000, 4 *
> KiB);
> create_unimplemented_device("npcm7xx.vdmx", 0xe080, 4 *
> KiB);
> create_unimplemented_device("npcm7xx.pcierc", 0xe100, 64 *
> KiB);
> diff --git a/hw/peci/meson.build b/hw/peci/meson.build
> index 01cfa95abe..ee033eb915 100644
> --- a/hw/peci/meson.build
> +++ b/hw/peci/meson.build
> @@ -1 +1,2 @@
> softmmu_ss.add(when: 'CONFIG_PECI', if_true: files('peci-core.c',
> 'peci-client.c'))
> +softmmu_ss.add(when: 'CONFIG_NPCM7XX', if_true: files('npcm7xx_peci.c'))
> diff --git a/hw/peci/npcm7xx_peci.c b/hw/peci/npcm7xx_peci.c
> new file mode 100644
> index 00..17a2642898
> --- /dev/null
> +++ b/hw/peci/npcm7xx_peci.c
> @@ -0,0 +1,204 @@
> +/*
> + * Nuvoton NPCM7xx PECI Module
> + *
> + * Copyright 2021 Google LLC
> + *
> + * SPDX-License-Identifier: GPL-2.0-or-later
> + */
> +
> +#include "qemu/osdep.h"
> +#include "hw/peci/npcm7xx_peci.h"
> +#include "qemu/bitops.h"
> +#include "qemu/log.h"
> +#include "qemu/units.h"
> +#include "trace.h"
> +
> +#define PECI_CTL_STS0
> +#define PECI_CTL_STS_DONE_EN BIT(6)
> +#define PECI_CTL_STS_ABRT_ERR BIT(4)
> +#define PECI_CTL_STS_CRC_ERR BIT(3)
> +#define PECI_CTL_STS_DONE BIT(1)
> +#define PECI_CTL_STS_START_BUSY BIT(0)
> +#define PECI_RD_LENGTH 0x4
> +#define PECI_ADDR 0x8
> +#define PECI_CMD0xC
> +#define PECI_CTL2 0x10
> +#define PECI_WR_LENGTH 0x1C
> +#define PECI_PDDR 0x2C
> +#define PECI_DAT_INOUT(reg)(0x100 + (reg) * 4)
> +
> +static uint64_t npcm7xx_peci_read(void *opaque, hwaddr offset, unsigned size)
> +{
> +NPCM7xxPECIState *ps = NPCM7XX_PECI(opaque);
> +uint8_t ret = 0;
> +
> +if (!ps->bus->num_clients) {
> +qemu_log_mask(LOG_GUEST_ERROR, "%s: no peci clients added to
>
[RFC PATCH 2/3] hw/peci: add PECI support for NPCM7xx BMCs
This allows BMC firmware for npcm7xx BMCs to talk to a PECI client
in qemu.
Signed-off-by: Titus Rwantare
Reviewed-by: Patrick Venture
---
MAINTAINERS| 3 +-
hw/arm/Kconfig | 1 +
hw/arm/npcm7xx.c | 9 ++
hw/peci/meson.build| 1 +
hw/peci/npcm7xx_peci.c | 204 +
hw/peci/trace-events | 5 +
include/hw/arm/npcm7xx.h | 2 +
include/hw/peci/npcm7xx_peci.h | 37 ++
8 files changed, 261 insertions(+), 1 deletion(-)
create mode 100644 hw/peci/npcm7xx_peci.c
create mode 100644 include/hw/peci/npcm7xx_peci.h
diff --git a/MAINTAINERS b/MAINTAINERS
index 14ab29679d..f87dfe5bfa 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -2959,7 +2959,7 @@ R: Paolo Bonzini
R: Bandan Das
R: Stefan Hajnoczi
R: Thomas Huth
-R: Darren Kenny
+R: Darren Kenny
R: Qiuhao Li
S: Maintained
F: tests/qtest/fuzz/
@@ -3218,6 +3218,7 @@ S: Maintained
F: hw/peci/peci-core.c
F: hw/peci/peci-client.c
F: include/hw/peci/peci.h
+F: hw/peci/npcm7xx_peci.c
Firmware schema specifications
M: Philippe Mathieu-Daudé
diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
index 15fa79afd3..cb38c6c88f 100644
--- a/hw/arm/Kconfig
+++ b/hw/arm/Kconfig
@@ -408,6 +408,7 @@ config NPCM7XX
select SSI
select UNIMP
select PCA954X
+select PECI
config FSL_IMX25
bool
diff --git a/hw/arm/npcm7xx.c b/hw/arm/npcm7xx.c
index d85cc02765..d408dd7eb4 100644
--- a/hw/arm/npcm7xx.c
+++ b/hw/arm/npcm7xx.c
@@ -45,6 +45,7 @@
#define NPCM7XX_CLK_BA (0xf0801000)
#define NPCM7XX_MC_BA (0xf0824000)
#define NPCM7XX_RNG_BA (0xf000b000)
+#define NPCM7XX_PECI_BA (0xf010)
/* USB Host modules */
#define NPCM7XX_EHCI_BA (0xf0806000)
@@ -83,6 +84,7 @@ enum NPCM7xxInterrupt {
NPCM7XX_UART1_IRQ,
NPCM7XX_UART2_IRQ,
NPCM7XX_UART3_IRQ,
+NPCM7XX_PECI_IRQ= 6,
NPCM7XX_EMC1RX_IRQ = 15,
NPCM7XX_EMC1TX_IRQ,
NPCM7XX_MMC_IRQ = 26,
@@ -445,6 +447,7 @@ static void npcm7xx_init(Object *obj)
}
object_initialize_child(obj, "mmc", >mmc, TYPE_NPCM7XX_SDHCI);
+object_initialize_child(obj, "peci", >peci, TYPE_NPCM7XX_PECI);
}
static void npcm7xx_realize(DeviceState *dev, Error **errp)
@@ -715,6 +718,12 @@ static void npcm7xx_realize(DeviceState *dev, Error **errp)
sysbus_connect_irq(SYS_BUS_DEVICE(>mmc), 0,
npcm7xx_irq(s, NPCM7XX_MMC_IRQ));
+ /* PECI */
+sysbus_realize(SYS_BUS_DEVICE(>peci), _abort);
+sysbus_mmio_map(SYS_BUS_DEVICE(>peci), 0, NPCM7XX_PECI_BA);
+sysbus_connect_irq(SYS_BUS_DEVICE(>peci), 0,
+ npcm7xx_irq(s, NPCM7XX_PECI_IRQ));
+
create_unimplemented_device("npcm7xx.shm", 0xc0001000, 4 * KiB);
create_unimplemented_device("npcm7xx.vdmx", 0xe080, 4 * KiB);
create_unimplemented_device("npcm7xx.pcierc", 0xe100, 64 * KiB);
diff --git a/hw/peci/meson.build b/hw/peci/meson.build
index 01cfa95abe..ee033eb915 100644
--- a/hw/peci/meson.build
+++ b/hw/peci/meson.build
@@ -1 +1,2 @@
softmmu_ss.add(when: 'CONFIG_PECI', if_true: files('peci-core.c',
'peci-client.c'))
+softmmu_ss.add(when: 'CONFIG_NPCM7XX', if_true: files('npcm7xx_peci.c'))
diff --git a/hw/peci/npcm7xx_peci.c b/hw/peci/npcm7xx_peci.c
new file mode 100644
index 00..17a2642898
--- /dev/null
+++ b/hw/peci/npcm7xx_peci.c
@@ -0,0 +1,204 @@
+/*
+ * Nuvoton NPCM7xx PECI Module
+ *
+ * Copyright 2021 Google LLC
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#include "qemu/osdep.h"
+#include "hw/peci/npcm7xx_peci.h"
+#include "qemu/bitops.h"
+#include "qemu/log.h"
+#include "qemu/units.h"
+#include "trace.h"
+
+#define PECI_CTL_STS0
+#define PECI_CTL_STS_DONE_EN BIT(6)
+#define PECI_CTL_STS_ABRT_ERR BIT(4)
+#define PECI_CTL_STS_CRC_ERR BIT(3)
+#define PECI_CTL_STS_DONE BIT(1)
+#define PECI_CTL_STS_START_BUSY BIT(0)
+#define PECI_RD_LENGTH 0x4
+#define PECI_ADDR 0x8
+#define PECI_CMD0xC
+#define PECI_CTL2 0x10
+#define PECI_WR_LENGTH 0x1C
+#define PECI_PDDR 0x2C
+#define PECI_DAT_INOUT(reg)(0x100 + (reg) * 4)
+
+static uint64_t npcm7xx_peci_read(void *opaque, hwaddr offset, unsigned size)
+{
+NPCM7xxPECIState *ps = NPCM7XX_PECI(opaque);
+uint8_t ret = 0;
+
+if (!ps->bus->num_clients) {
+qemu_log_mask(LOG_GUEST_ERROR, "%s: no peci clients added to board\n",
+ __func__);
+return 0;
+}
+
+qemu_irq_lower(ps->irq);
+
+switch (offset) {
+case PECI_CTL_STS:
+ret = ps->status;
+break;
+
+case PECI_RD_LENGTH:
+ret = ps->pcmd.rd_length;
+break;
+
+case PECI_ADDR:
+ret = ps->pcmd.addr;
+break;
+
+case PECI_CMD:
+ret = ps->pcmd.cmd;
+break;
+
+case
