Re: Guidance on emulating "sparse" address spaces

2021-06-25 Thread Richard Henderson
On 6/23/21 5:53 PM, Jason Thorpe wrote: Thanks for the pointer! Yes, it seems like that might be similar to what I need... create new address spaces (rather than using the "system" address space) for the PCI memory and I/O regions (I need to do this for PCI configuration space, too,

Re: Guidance on emulating "sparse" address spaces

2021-06-23 Thread Jason Thorpe
> On Jun 23, 2021, at 5:42 PM, Philippe Mathieu-Daudé wrote: > >> I'm trying to wrap my head around how to achieve this in Qemu. I don't see >> an obvious way from my initial study of how the PCI code and memory regions >> work. Some guidance would be appreciated! > > Is bitband_ops[]

Re: Guidance on emulating "sparse" address spaces

2021-06-23 Thread Philippe Mathieu-Daudé
On 6/24/21 2:27 AM, Jason Thorpe wrote: > As a "learn the internals of Qemu a little better" exercise, I am planning to > write models for some older Alpha systems, initially for one based on the > LCA45. One of the quirks of these old systems, though, is lack of byte/word > load/store. So,

Guidance on emulating "sparse" address spaces

2021-06-23 Thread Jason Thorpe
As a "learn the internals of Qemu a little better" exercise, I am planning to write models for some older Alpha systems, initially for one based on the LCA45. One of the quirks of these old systems, though, is lack of byte/word load/store. So, to support 8- and 16-bit accesses to I/O devices,