On Sun, Apr 25, 2021 at 12:19:11AM -0500, Wei Huang wrote:
>
>
> On 4/23/21 4:27 PM, Eduardo Habkost wrote:
> > On Fri, Apr 23, 2021 at 12:32:00AM -0500, Wei Huang wrote:
> > > There was a customer request for const_tsc support on AMD guests. Right
> > > now
> > > this feature is turned off by
Hi Wei, Eduardo,
On Fri, Apr 23, 2021 at 05:27:44PM -0400, Eduardo Habkost wrote:
> On Fri, Apr 23, 2021 at 12:32:00AM -0500, Wei Huang wrote:
> > There was a customer request for const_tsc support on AMD guests. Right now
> > this feature is turned off by default for QEMU x86 CPU types (in
> >
On 4/23/21 4:27 PM, Eduardo Habkost wrote:
On Fri, Apr 23, 2021 at 12:32:00AM -0500, Wei Huang wrote:
There was a customer request for const_tsc support on AMD guests. Right now
this feature is turned off by default for QEMU x86 CPU types (in
CPUID_Fn8007_EDX[8]). However we are seeing a
On Fri, Apr 23, 2021 at 12:32:00AM -0500, Wei Huang wrote:
> There was a customer request for const_tsc support on AMD guests. Right now
> this feature is turned off by default for QEMU x86 CPU types (in
> CPUID_Fn8007_EDX[8]). However we are seeing a discrepancy in guest VM
> behavior between
Hi Wei,
I dont know the background of this feature. I will let some else to
comment on that.
The patch exposes the feature TscInvariant to the guest successfully.
Tested it on my AMD box. I have few comments on your patch below.
On 4/23/21 12:32 AM, Wei Huang wrote:
> There was a customer
There was a customer request for const_tsc support on AMD guests. Right
now this feature is turned off by default for QEMU x86 CPU types (in
CPUID_Fn8007_EDX[8]). However we are seeing a discrepancy in guest
VM behavior between Intel and AMD.
In Linux kernel, Intel x86 code enables
