On Fri, Nov 29, 2013 at 11:04 PM, Andreas Färber afaer...@suse.de wrote:
Am 29.11.2013 09:06, schrieb Li Guang:
Andreas Färber wrote:
Am 29.11.2013 01:46, schrieb Li Guang:
Andreas Färber wrote:
Am 27.11.2013 10:22, schrieb Andreas Färber:
[...] To my understanding, sunxi is the name of a
Every address space has its own nodes and sections, but
it uses the same global arrays of nodes/section.
This limits the number of devices that can be attached
to the guest to 20-30 devices. It happens because:
- The sections array is limited to 2^12 entries.
- The main memory has at least 100
On Fri, 2013-11-29 at 10:43 +0100, arm...@redhat.com wrote:
From: Markus Armbruster arm...@redhat.com
Pointer properties can be set only by code, not by device_add. A
device with a pointer property can't work with device_add only unless
the property may remain null.
Hi,
On 21 Nov 2013, Peter Lieven wrote:
with recent xserver a lot of people observe a graphics corruption with
Cirrus
Logic graphics. Especially
in Virtual Machines (easy to test with ubuntu 12.04.3 LTS 64-bit). I am not
100% sure if this is an emulation problem.
Who can help with debugging? And
Hi,
I mentioned in my previous message
(http://lists.gnu.org/archive/html/qemu-devel/2013-12/msg6.html) that
a list of the qemu Cirrus bugs fixed by the developer of WinUAE would be
forthcoming. :)
Please see the WinUAE git at
https://github.com/tonioni/WinUAE/tree/master/qemuvga
Grep for
Hello all ：
I am wondering to know why we must call cpu_pc_from_tb() in the function
cpu_exec_nocache() . I found the function cpu_exec_nocache() with comments
:“Restore PC. This may happen if async event occurs before the TB starts
executing. But I don't know what would happen if async
Am 01.12.2013 14:13, schrieb Marcel Apfelbaum:
On Fri, 2013-11-29 at 10:43 +0100, arm...@redhat.com wrote:
From: Markus Armbruster arm...@redhat.com
Pointer properties can be set only by code, not by device_add. A
device with a pointer property can't work with device_add only unless
the
On 1 December 2013 08:42, wangxd wan...@inspur.com wrote:
Hello all ：
I am wondering to know why we must call cpu_pc_from_tb() in the function
cpu_exec_nocache() . I found the function cpu_exec_nocache() with comments
:“Restore PC. This may happen if async event occurs before the TB
On 11/12/2013 08:30:39 AM, Peter Maydell wrote:
On 12 November 2013 14:27, Xin Tong trent.t...@gmail.com wrote:
Hi
I would like to know where i get can 32bit ARM image
For which board?
with appropriate network driver.
Appropriate for what?
http://people.debian.org/~aurel32/qemu/armel/
The following changes since commit 7dc65c02fe3fb8f3146ce0b9ff5fec5945329f0e:
Open 2.0 development tree (2013-11-27 14:02:45 -0800)
are available in the git repository at:
git://xenbits.xen.org/people/sstabellini/qemu-dm.git xen-2013-12-01
for you to fetch changes up to
Hi Mark,
Am 01.12.2013 15:09, schrieb Mark:
I mentioned in my previous message
(http://lists.gnu.org/archive/html/qemu-devel/2013-12/msg6.html) that
a list of the qemu Cirrus bugs fixed by the developer of WinUAE would be
forthcoming. :)
Please see the WinUAE git at
From: Wei Liu wei.l...@citrix.com
This patch fixes:
1. build error in xen_pt.c when XEN_PT_LOGGING_ENABLED is defined
2. debug output format string error when DEBUG_XEN is defined
In the second case I also have the output info in consistent with the
output in mapping function - that is, print
From: Paul Durrant paul.durr...@citrix.com
The intention of the Xen PV device is that it is used as a parent
device for PV drivers in Xen HVM guests and the set of PV drivers that
bind to the device is determined by its device ID (and possibly
vendor ID and revision). As such, the device should
Hi Alex,
Am 30.11.2013 18:08, schrieb Alex C:
Hi, i was wondering if i could emulate/virtualize IOS 6 or 7 with your
software or if there is any other way to do it, thx
You might if the emulation code gets upstreamed and if you have access
to a corresponding firmware image. Our 32-bit ARM
Am 01.12.2013 08:49, schrieb Stefan Weil:
Most code already used QEMUTimer without the redundant 'struct' keyword.
Signed-off-by: Stefan Weil s...@weilnetz.de
Reviewed-by: Andreas Färber afaer...@suse.de
CC'ing Paolo.
Andreas
--
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg,
Ken, is that really a bug in QEMU or is Debian expecting some Motorola
68k CPU rather than the ColdFire MCU QEMU emulates?
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1254786
Title:
ebc0 is a bitfield insn which the coldfire doesn't implement.
Andreas.
--
Andreas Schwab, sch...@linux-m68k.org
GPG Key fingerprint = 58CA 54C7 6D53 942B 1756 01D3 44D5 214B 8276 4ED5
And now for something completely different.
- Original Message -
Il 30/11/2013 16:49, Marc-André Lureau ha scritto:
So you suggest this block/unblock: (I haven't reviewed all callers of
unix_connect_opts(), I am not sure that's what you meant) Other option
would be to move the nonblock to unix_socket_outgoing.
diff
Hi,
This patch series is a split-off from the Spice block device RFC.
http://lists.gnu.org/archive/html/qemu-devel/2013-11/msg02024.html
It should include only non-controversial or simple patches. The most
important change is the NBD client implementation moved to a seperate
file.
In v2:
-
qemu_co_queue_wait_insert_head() is unused in qemu code base now.
Signed-off-by: Marc-André Lureau marcandre.lur...@gmail.com
---
include/block/coroutine.h | 6 --
qemu-coroutine-lock.c | 8
2 files changed, 14 deletions(-)
diff --git a/include/block/coroutine.h
From: Marc-André Lureau marcandre.lur...@redhat.com
Fixes the following error:
** (process:780): CRITICAL **: do_socket_send: assertion
`socket_to_send-len != 0' failed
Signed-off-by: Marc-André Lureau marcandre.lur...@redhat.com
---
libcacard/vscclient.c | 10 ++
1 file changed, 6
From: Marc-André Lureau marcandre.lur...@redhat.com
Signed-off-by: Marc-André Lureau marcandre.lur...@gmail.com
---
spice-qemu-char.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/spice-qemu-char.c b/spice-qemu-char.c
index 6d147a7..e074d9e 100644
--- a/spice-qemu-char.c
+++
From: Marc-André Lureau marcandre.lur...@redhat.com
The caller might handle non-blocking using coroutine. Leave the choice
to the caller to use a blocking or non-blocking negotiate.
Signed-off-by: Marc-André Lureau marcandre.lur...@redhat.com
---
block/nbd-client.c | 1 +
nbd.c | 2
Make sure all pending coroutines are finished when closing the session.
Signed-off-by: Marc-André Lureau marcandre.lur...@gmail.com
---
block/nbd-client.c | 21 -
1 file changed, 16 insertions(+), 5 deletions(-)
diff --git a/block/nbd-client.c b/block/nbd-client.c
index
From: Marc-André Lureau marcandre.lur...@redhat.com
There is no need to keep the export name around, and it seems a better
fit as an argument in the init() call.
Signed-off-by: Marc-André Lureau marcandre.lur...@redhat.com
---
block/nbd-client.c | 9 -
block/nbd-client.h | 5 ++---
From: Marc-André Lureau marcandre.lur...@redhat.com
Signed-off-by: Marc-André Lureau marcandre.lur...@redhat.com
---
block/Makefile.objs | 2 +-
block/nbd-client.c | 372 +++
block/nbd-client.h | 51 +++
block/nbd.c | 373
From: Marc-André Lureau marcandre.lur...@redhat.com
Signed-off-by: Marc-André Lureau marcandre.lur...@redhat.com
---
include/ui/qemu-spice.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/ui/qemu-spice.h b/include/ui/qemu-spice.h
index 86c75c7..a93b4b2 100644
---
From: Marc-André Lureau marcandre.lur...@redhat.com
Signed-off-by: Marc-André Lureau marcandre.lur...@redhat.com
---
block/nbd-client.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/block/nbd-client.c b/block/nbd-client.c
index 3dfae1d..9156093 100644
--- a/block/nbd-client.c
+++
==15815== Thread 1:
==15815== Syscall param socketcall.sendto(msg) points to uninitialised byte(s)
==15815==at 0x65AD5CB: send (send.c:31)
==15815==by 0x37F84B: nbd_wr_sync (nbd.c:145)
==15815==by 0x37F94B: write_sync (nbd.c:186)
==15815==by 0x380FA9: nbd_send_request (nbd.c:681)
From: Marc-André Lureau marcandre.lur...@redhat.com
Signed-off-by: Marc-André Lureau marcandre.lur...@gmail.com
---
blockdev.c| 2 +-
include/sysemu/blockdev.h | 2 +-
qmp.c | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/blockdev.c
The AioContext ctx field is apparently unused in qemu codebase since
02ffb504485.
Signed-off-by: Marc-André Lureau marcandre.lur...@gmail.com
---
include/block/coroutine.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/include/block/coroutine.h b/include/block/coroutine.h
index
From: Marc-André Lureau marcandre.lur...@redhat.com
Teach the chardev frontend to send event. This is used by the Spice port
chardev currently.
Signed-off-by: Marc-André Lureau marcandre.lur...@redhat.com
---
include/sysemu/char.h | 10 ++
qemu-char.c | 7 +++
2 files
In qemu-1.4.x, When performing migrate_cancel on hmp, Sometimes
s-state is incorrrectly saved to MIG_STATE_ERROR instead of
MIG_STATE_CANCELLED.
If the migrate_fd_cancel in main thread is scheduled to run before
the thread buffered_file_thread calls migrate_fd_put_buffer, The
s-state will be
于 2013/11/30 4:56, Max Reitz 写道:
On 11.11.2013 00:56, Wenchao Xia wrote:
This test will focus on the low level procedure of qcow2 snapshot
operations, now it covers only the create operation. Overlap error
paths are not checked since no good way to trigger those errors.
Signed-off-by: Wenchao
于 2013/11/30 4:41, Max Reitz 写道:
Leaving the backing file open although it is not needed anymore can
cause problems if it is opened through a block driver which allows
exclusive access only and if the create function of the block driver
used for the top image (the one being created) tries to
Reviewed-by: Wenchao Xia xiaw...@linux.vnet.ibm.com
Some adjustment,
It's seem this not appear with my Intel network card i211.
But i can confirme this bug appear with AsMedia 1061 sata3 controler.
the complete dmesg :
[ 404.206866] dmar: DRHD: handling fault status reg 2
[ 404.206870] dmar: DMAR:[DMA Write] Request device [07:00.0] fault
2013/11/25 Kevin Wolf kw...@redhat.com
Am 21.11.2013 um 09:51 hat Stefan Hajnoczi geschrieben:
On Thu, Nov 21, 2013 at 11:33:56AM +0800, Chunyan Liu wrote:
2013/11/20 Stefan Hajnoczi stefa...@gmail.com
On Wed, Nov 20, 2013 at 04:50:29PM +0800, Chunyan Liu wrote:
block/cow.c
-Original Message-
From: Corey Bryant [mailto:cor...@linux.vnet.ibm.com]
Sent: Tuesday, November 26, 2013 10:40 PM
To: Xu, Quan
Cc: qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH 4/4] tpm: Provide libtpms software TPM
backend
On 11/25/2013 10:04 PM, Xu, Quan wrote:
Peter Maydell wrote:
On 29 November 2013 11:01, Peter Maydellpeter.mayd...@linaro.org wrote:
On 27 November 2013 08:23, liguanglig.f...@cn.fujitsu.com wrote:
Signed-off-by: liguanglig.f...@cn.fujitsu.com
---
include/hw/ptimer.h |3 +++
1 files changed, 3 insertions(+), 0
Andreas Färber wrote:
Am 29.11.2013 09:06, schrieb Li Guang:
Andreas Färber wrote:
Am 29.11.2013 01:46, schrieb Li Guang:
Andreas Färber wrote:
Am 27.11.2013 10:22, schrieb Andreas Färber:
[...] To my understanding, sunxi is the name of a
community
Hello,
I want to report to you a really big bug.
vfio passthrough dont works with Sata controler (an AsMedia 1061) ! When i
try to use vfio with this controler it work only once.
When i use vfio for VGA i can reboot (or shutdown and start again) my VM
with out problem, but for any other PCI
+
+if (!qapi_event_functions.emit) {
Better to return an error here instead of silently failing.
The purpose is allowing emit=NULL and skip event code in that case.
But the code will do nothing and the caller won't know that.
Now the caller also won't know that useless code
Hi Peter,
This series updated cadence GEM (ethernet in Zynq) with a number of
bugfixes and enhancements. Most of this has come out of some stress
testing we have done internally.
I have also testing briefly using mainline Linux GEM driver.
root@zynq:~# wget
Cadence GEM has a MAC level loopback mode. Implement. Use the same basic
operation as the already implemented PHY loopback.
Reported-by: Deepika Dhamija deep...@xilinx.com
Signed-off-by: Peter Crosthwaite peter.crosthwa...@xilinx.com
---
hw/net/cadence_gem.c | 2 +-
1 file changed, 1
From: Edgar E. Iglesias edgar.igles...@xilinx.com
We were updating the ownership bit of all descriptors if packets
get split and written through several descriptors.
Signed-off-by: Edgar E. Iglesias edgar.igles...@xilinx.com
Signed-off-by: Peter Crosthwaite peter.crosthwa...@xilinx.com
---
There was a replication of the rx descriptor address walking logic.
Reorder the flow control to remove. This refactoring also obsoletes
the local variables packet_desc_addr and last_desc_addr.
Signed-off-by: Peter Crosthwaite peter.crosthwa...@xilinx.com
---
hw/net/cadence_gem.c | 39
This has no real hardware analog. Leave the error message in is as
it is almost certainly a guest error, but fallthrough to the expected
behaviour.
Signed-off-by: Peter Crosthwaite peter.crosthwa...@xilinx.com
---
hw/net/cadence_gem.c | 1 -
1 file changed, 1 deletion(-)
diff --git
The real hardware prefetches rx buffer descriptors ASAP and
potentially throws relevant interrupts following the fetch
even in the absence of a recieved packet.
Reported-by: Deepika Dhamija deep...@xilinx.com
Signed-off-by: Peter Crosthwaite peter.crosthwa...@xilinx.com
---
hw/net/cadence_gem.c
Bit 27 of the RX buffer desc word 1 should be set when the packet was
accepted due to specific address register match. Implement.
This feature is absent from the Xilinx documentation (UG585) but the
behaviour is tested as accurate on real hardware.
Reported-by: Deepika Dhamija deep...@xilinx.com
The various Rx packet address matching mode flags were not being set in
the rx descriptor. Implement.
Reported-by: Deepika Dhamija deep...@xilinx.com
Signed-off-by: Peter Crosthwaite peter.crosthwa...@xilinx.com
---
hw/net/cadence_gem.c | 80 ++--
The Specific address registers can be enabled or disabled by software.
QEMU was assuming they where always enabled. Implement the
disable/enable feature. SARs are disabled by writing to the lower half
register. They are re-enabled by then writing the upper half.
Reported-by: Deepika Dhamija
Bytes_to_copy was being updated before its final use where it
advances the rx buffer pointer. This was causing total mayhem,
where packet data for any subsequent fragments was being fetched
from the wrong place.
Reported-by: Deepika Dhamija deep...@xilinx.com
Signed-off-by: Peter Crosthwaite
The minimum packet size is 64, however this is before FCS stripping
occurs. So when FCS stripping the minimum packet size is 60. Fix.
Reported-by: Deepika Dhamija deep...@xilinx.com
Signed-off-by: Peter Crosthwaite peter.crosthwa...@xilinx.com
---
hw/net/cadence_gem.c | 13 -
1 file
Currently this just floods indicating that can_receive has been called
by the net framework. Instead, save the result of the most recent
can_recieve callback as state and only print a message if the result
changes (indicating some sort of actual state change in GEM). Make said
debug message more
This write-1-clear logic was incorrect. It was always clearing w1c
bits regardless of whether thie written value was 1 or not. i.e. it
was implementing a write-anything-to-clear strategy.
Signed-off-by: Peter Crosthwaite peter.crosthwa...@xilinx.com
---
hw/net/cadence_gem.c | 13 ++---
Return false from can_recieve() when no valid buffer descriptor is
available. Ensures against mass packet droppage in some applications.
Signed-off-by: Peter Crosthwaite peter.crosthwa...@xilinx.com
---
hw/net/cadence_gem.c | 11 ++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff
Andreas Färber afaer...@suse.de writes:
Am 01.12.2013 14:13, schrieb Marcel Apfelbaum:
On Fri, 2013-11-29 at 10:43 +0100, arm...@redhat.com wrote:
From: Markus Armbruster arm...@redhat.com
Pointer properties can be set only by code, not by device_add. A
device with a pointer property can't
Hi Peter,
Another spin of the ARM MPCore global timer work. Patches 1 2 are some
trivial cleanup to MPCore I did along the way.
Regards,
Peter
François LEGAL (1):
cpu/a9mpcore: Add Global Timer
Peter Crosthwaite (3):
cpu/a9mpcore: rename timerbusdev variable
cpu/a9mpcore: reorder
Rename this variable for consistency with the above defined mptimerdev
variable.
Signed-off-by: Peter Crosthwaite peter.crosthwa...@xilinx.com
Reviewed-by: Peter Maydell peter.mayd...@linaro.org
---
hw/cpu/a9mpcore.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git
To make it consistent for easier code reading. The order in which
variables are defined and functions are called is set to match the
address map ordering.
The new consistent order of doing stuff is:
SCU - GIC - MPTimer - WDT.
0 functional change.
Signed-off-by: Peter Crosthwaite
The ARM A9 MPCore has a timer that is global to all CPUs in the mpcore.
The timer is shared but each CPU has a private independent comparator
and interrupt.
Based on version contributed by Francois LEGAL.
Signed-off-by: François LEGAL de...@thom.fr.eu.org
[PC changes:
* New commit message
*
From: François LEGAL de...@thom.fr.eu.org
Add the global timer to A9 MPCore.
Signed-off-by: François LEGAL de...@thom.fr.eu.org
[PC Changes:
* new commit message
* split off original version as a separate patch
* Rebased against new mpcore implementation (with struct embedding)
]
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