[Qemu-devel] [PATCH 18/22] ppc: Update cpu_model in MachineState

2015-06-24 Thread David Gibson
From: Bharata B Rao bhar...@linux.vnet.ibm.com Keep cpu_model field in MachineState uptodate so that it can be used from the CPU hotplug path. Signed-off-by: Bharata B Rao bhar...@linux.vnet.ibm.com Reviewed-by: David Gibson da...@gibson.dropbear.id.au Signed-off-by: David Gibson

[Qemu-devel] [PATCH 05/22] spapr: Remove obsolete entry_point field from sPAPRMachineState

2015-06-24 Thread David Gibson
The sPAPRMachineState structure includes an entry_point field containing the initial PC value for starting the machine, even though this always has the value 0x100. I think this is a hangover from very early versions which bypassed the firmware when using -kernel. In any case it has no function

Re: [Qemu-devel] [PATCH V2 4/7] hw/i2c-ddc.c: Implement DDC I2C slave

2015-06-24 Thread Peter Crosthwaite
On Mon, Jun 15, 2015 at 8:15 AM, fred.kon...@greensocs.com wrote: From: Peter Maydell peter.mayd...@linaro.org Implement an I2C slave which implements DDC and returns the EDID data for an attached monitor. Signed-off-by: Peter Maydell peter.mayd...@linaro.org - Rebased on the current

Re: [Qemu-devel] [Qemu-block] [PATCH v8 00/11] Support streaming to an intermediate layer

2015-06-24 Thread Alberto Garcia
On Tue 23 Jun 2015 06:48:39 PM CEST, Stefan Hajnoczi wrote: It seems that self.vm.qmp('block-stream', ...) is returning None in your case. Is that the only test that is failing? Yes, only this test fails. I have pushed my tree here:

Re: [Qemu-devel] Migration issue with 4.0.x

2015-06-24 Thread Andrey Korolyov
Radim fixed a bug that was causing me a post migration hang, I'm not sure if it's the same case though, worth trying the patch here: Thanks, the issue is fixed with this one. I obviously missed the patch as -stable 4.0.6 was tagged after almost two weeks from the patch` appearance and does not

Re: [Qemu-devel] [PATCH 00/22] sPAPR updates 2015-06-24

2015-06-24 Thread David Gibson
On Wed, Jun 24, 2015 at 04:30:14PM +1000, David Gibson wrote: Hi Alex, Here are my accumulated spapr related qemu updates for the last little while. Highlights are a SLOF update and changes to move PCI device node creation from SLOF into qemu (using the same code paths as for hotplug).

Re: [Qemu-devel] [RFC] QDev explicit constructors destructors

2015-06-24 Thread Peter Crosthwaite
On Wed, Jun 24, 2015 at 12:30 AM, Liviu Ionescu i...@livius.net wrote: On 23 Jun 2015, at 23:10, Liviu Ionescu i...@livius.net wrote: another solution would look like: DeviceState *dev = my_dev_alloc(NULL, TYPE_MYTYPE); my_dev_prop_set_string(dev, param, something);

Re: [Qemu-devel] [RFC v2 07/34] exec-all: Move cpu_can_do_io to qom/cpu.h

2015-06-24 Thread Paolo Bonzini
On 31/05/2015 08:11, Peter Crosthwaite wrote: +/* If not executing code then assume we are ok. */ +if (cpu-current_tb == NULL) { +return true; +} +return cpu-can_do_io != 0; For what it's worth, I think the if here is dead. Pavel? Paolo

[Qemu-devel] Implement Xfer:auxv:read in gdb stub

2015-06-24 Thread Bhushan Attarde
This patch implements support for Xfer:auxv:read to provide auxiliary vector information to clients which relies on it. For example: AT_ENTRY in auxiliary vector provides the entry point information. Client can use this information to compare it with entry point mentioned in executable to

[Qemu-devel] vmxnet3, vnet_hdr, and minimum length padding

2015-06-24 Thread Brian Kress
When running ESXi under qemu there is an issue with the ESXi guest discarding packets that are too short. The guest discards any packets under the normal minimum length for an ethernet packet (60). This results in odd behaviour where other hosts or VMs on other hosts can communicate with

Re: [Qemu-devel] [PATCH 10/23] userfaultfd: add new syscall to provide memory externalization

2015-06-24 Thread Dave Hansen
On 05/14/2015 10:31 AM, Andrea Arcangeli wrote: +static int userfaultfd_wake_function(wait_queue_t *wq, unsigned mode, + int wake_flags, void *key) +{ + struct userfaultfd_wake_range *range = key; + int ret; + struct userfaultfd_wait_queue *uwq;

Re: [Qemu-devel] [Qemu-stable] [PATCH v7 0/8] block: Mirror discarded sectors

2015-06-24 Thread Fam Zheng
On Thu, 06/11 16:29, Fam Zheng wrote: On Mon, 06/08 14:02, Stefan Hajnoczi wrote: On Mon, Jun 08, 2015 at 01:56:06PM +0800, Fam Zheng wrote: v7: Fix the lost assignment of s-unmap. v6: Fix pnum in bdrv_get_block_status_above. [Paolo] v5: Rewrite patch 1. Address Eric's

Re: [Qemu-devel] [PATCH] thread-win32: fix GetThreadContext() permanently fails

2015-06-24 Thread Fabien Chouteau
On 06/23/2015 07:07 PM, Stefan Weil wrote: Am 23.06.2015 um 12:46 schrieb Paolo Bonzini: On 23/06/2015 12:30, Peter Maydell wrote: On 23 June 2015 at 10:55, Ян Завадовский zavadovsky@gmail.com wrote: On Tue, Jun 23, 2015 at 9:02 AM, Stefan Weil s...@weilnetz.de wrote: We should add an URL

[Qemu-devel] [PATCH v2] ossaudio: fix memory leak

2015-06-24 Thread arei.gonglei
From: Gonglei arei.gong...@huawei.com Variable conf going out of scope leaks the storage it points to in line 856. Signed-off-by: Gonglei arei.gong...@huawei.com --- v2: using an better way to avoid memory leak. (Markus) --- audio/ossaudio.c | 9 +++-- 1 file changed, 3 insertions(+), 6

Re: [Qemu-devel] [Qemu-block] [PATCH v2 02/13] block: Introduce bdrv_lock and bdrv_unlock API

2015-06-24 Thread Stefan Hajnoczi
On Wed, Jun 24, 2015 at 10:47:47AM +0800, Fam Zheng wrote: On Tue, 06/16 17:07, Stefan Hajnoczi wrote: On Tue, Jun 02, 2015 at 11:21:51AM +0800, Fam Zheng wrote: 2. Is this about thread safety? (No, it's about exclusive access to a BDS *within* the AioContext.) As it has to quiesce

[Qemu-devel] [PATCH 00/22] sPAPR updates 2015-06-24

2015-06-24 Thread David Gibson
Hi Alex, Here are my accumulated spapr related qemu updates for the last little while. Highlights are a SLOF update and changes to move PCI device node creation from SLOF into qemu (using the same code paths as for hotplug). This also has some preliminaries for CPU and memory hotplug on

[Qemu-devel] [PATCH 04/22] spapr: Remove obsolete ram_limit field from sPAPRMachineState

2015-06-24 Thread David Gibson
The ram_limit field was imported from sPAPREnvironment where it predates the machine's ram size being available generically from machine-ram_size. Worse, the existing code was inconsistent about where it got the ram size from. Sometimes it used spapr-ram_limit, sometimes the global 'ram_size'

[Qemu-devel] [PATCH 12/22] Revert hw/ppc/spapr_pci.c: Avoid functions not in glib 2.12 (g_hash_table_iter_*)

2015-06-24 Thread David Gibson
From: Markus Armbruster arm...@redhat.com Since we now require GLib 2.22+ (commit f40685c), we don't have to work around lack of g_hash_table_iter_init() friends anymore. This reverts commit f8833a37c0c6b22ddd57b45e48cfb0f97dbd5af4. Signed-off-by: Markus Armbruster arm...@redhat.com

Re: [Qemu-devel] [RFC] QDev explicit constructors destructors

2015-06-24 Thread Liviu Ionescu
On 23 Jun 2015, at 23:10, Liviu Ionescu i...@livius.net wrote: another solution would look like: DeviceState *dev = my_dev_alloc(NULL, TYPE_MYTYPE); my_dev_prop_set_string(dev, param, something); my_dev_realize(dev); my_dev_prop_set_uint32(dev, xyz, 123); which obviously

Re: [Qemu-devel] [PATCH V2 5/7] Introduce xilinx dpdma.

2015-06-24 Thread Peter Crosthwaite
On Mon, Jun 15, 2015 at 8:15 AM, fred.kon...@greensocs.com wrote: From: KONRAD Frederic fred.kon...@greensocs.com This is the implementation of the DPDMA. Signed-off-by: KONRAD Frederic fred.kon...@greensocs.com --- hw/dma/Makefile.objs | 1 + hw/dma/xilinx_dpdma.c | 779

Re: [Qemu-devel] [PATCH] net/virtio: fix multi-queue negotiation

2015-06-24 Thread Jason Wang
On 06/19/2015 02:05 AM, Marcel Apfelbaum wrote: Clear host multi-queue related features if the peer doesn't support it. Signed-off-by: Marcel Apfelbaum mar...@redhat.com --- Notes: This fixes a guest CPU soft lock, however the virtio-net device will not work correctly. It seems that is

Re: [Qemu-devel] [RFC v2 11/34] include/exec: Move cputlb exec.c defs out

2015-06-24 Thread Paolo Bonzini
On 31/05/2015 08:11, Peter Crosthwaite wrote: diff --git a/exec.c b/exec.c index 0cb54f7..71ec173 100644 --- a/exec.c +++ b/exec.c @@ -48,7 +48,6 @@ #endif #include exec/cpu-all.h #include qemu/rcu_queue.h -#include exec/cputlb.h cputlb.h is still needed in exec.c (e.g.

Re: [Qemu-devel] [PATCH v7 3/4] i.MX: Add i.MX25 3DS evaluation board support

2015-06-24 Thread Jean-Christophe DUBOIS
Le 24/06/2015 07:07, Peter Crosthwaite a écrit : On Mon, Jun 22, 2015 at 12:06 PM, Jean-Christophe Dubois j...@tribudubois.net wrote: For now we support: * timers (GPT and EPIT) * serial ports * ethernet (through the newly added FEC emulator) * I2C (through the newly added

Re: [Qemu-devel] [PATCH V2 1/7] Introduce AUX bus.

2015-06-24 Thread Peter Crosthwaite
On Mon, Jun 15, 2015 at 8:15 AM, fred.kon...@greensocs.com wrote: From: KONRAD Frederic fred.kon...@greensocs.com This introduces a new bus: aux-bus. It contains an address space for aux slaves devices and a bridge to an I2C bus for I2C through AUX transactions. Signed-off-by: KONRAD

[Qemu-devel] [PATCH 03/22] spapr: Merge sPAPREnvironment into sPAPRMachineState

2015-06-24 Thread David Gibson
The code for -machine pseries maintains a global sPAPREnvironment structure which keeps track of general state information about the guest platform. This predates the existence of the MachineState structure, but performs basically the same function. Now that we have the generic MachineState, fold

[Qemu-devel] [PATCH 14/22] spapr: Support ibm, lrdr-capacity device tree property

2015-06-24 Thread David Gibson
From: Bharata B Rao bhar...@linux.vnet.ibm.com Add support for ibm,lrdr-capacity since this is needed by the guest kernel to know about the possible hot-pluggable CPUs and Memory. With this, pseries kernels will start reporting correct maxcpus in /sys/devices/system/cpu/possible. Also define the

[Qemu-devel] [PATCH 10/22] spapr_iommu: drop erroneous check in h_put_tce_indirect()

2015-06-24 Thread David Gibson
From: Greg Kurz gk...@linux.vnet.ibm.com The tce_list variable is not a TCE but the address to a TCE: we shouldn't clear permission bits as we do now. And this is dead code anyway since we check tce_list is 4K aligned a few lines above. This patch doesn't fix any bug, it is only code cleanup.

[Qemu-devel] [PATCH 11/22] spapr_iommu: translate sPAPRTCEAccess to IOMMUAccessFlags

2015-06-24 Thread David Gibson
From: Greg Kurz gk...@linux.vnet.ibm.com The fact that these enums have matching values is pure coincidence. We actually need to translate from the PAPR definition to the QEMU one. This patch doesn't fix any bug, it is only code cleanup. Suggested-by: Alexey Kardashevskiy a...@ozlabs.ru

Re: [Qemu-devel] [PATCH v2 0/5] Add feature to start QEMU without vhost-user backend

2015-06-24 Thread Tetsuya Mukawa
On 2015/06/24 14:57, Michael S. Tsirkin wrote: Also, if QEMU or the backend is closed unexpectedly, there is no way to recover without restarting both applications. This was previously discussed: https://lists.gnu.org/archive/html/qemu-devel/2014-03/msg00585.html It doesn't look like any of

Re: [Qemu-devel] [PATCH 0/2] target-i386: custom CPU model + script to dump existing CPU models

2015-06-24 Thread Daniel P. Berrange
On Tue, Jun 23, 2015 at 11:23:16PM +0200, Michael S. Tsirkin wrote: So any single CPU flag now needs to be added in - kvm - qemu - libvirt This is in fact already the case, and it will also possibly need to be added to openstack too. Next thing libvirt will decide it's a policy thing and

Re: [Qemu-devel] [PATCH V2 2/7] i2c: implement broadcast write.

2015-06-24 Thread Peter Crosthwaite
On Mon, Jun 15, 2015 at 8:15 AM, fred.kon...@greensocs.com wrote: From: KONRAD Frederic fred.kon...@greensocs.com This does a write to every slaves when the I2C bus get a write to address 0. Signed-off-by: KONRAD Frederic fred.kon...@greensocs.com --- hw/i2c/core.c | 46

[Qemu-devel] [PATCH 09/22] spapr_pci: set device node unit address as hex

2015-06-24 Thread David Gibson
From: Nikunj A Dadhania nik...@linux.vnet.ibm.com Device node names should encode the unit address as hex, while the code was encodind it as integers. Also, use FDT_NAME_MAX macro for allocating and composing the name. Signed-off-by: Nikunj A Dadhania nik...@linux.vnet.ibm.com Reviewed-by:

[Qemu-devel] [PATCH 06/22] spapr: Add sPAPRMachineClass

2015-06-24 Thread David Gibson
Currently although we have an sPAPRMachineState descended from MachineState we don't have an sPAPRMAchineClass descended from MachineClass. So far it hasn't been needed, but several upcoming features are going to want it, so this patch creates a stub implementation. Signed-off-by: Michael Roth

Re: [Qemu-devel] [PATCH V2 3/7] introduce dpcd module.

2015-06-24 Thread Peter Crosthwaite
On Mon, Jun 15, 2015 at 8:15 AM, fred.kon...@greensocs.com wrote: From: KONRAD Frederic fred.kon...@greensocs.com This introduces a DPCD modules. It wires on a aux-bus and can be accessed by module driver to get lane-speed, etc. Signed-off-by: KONRAD Frederic fred.kon...@greensocs.com

[Qemu-devel] [PATCH 16/22] spapr: Reorganize CPU dt generation code

2015-06-24 Thread David Gibson
From: Bharata B Rao bhar...@linux.vnet.ibm.com Reorganize CPU device tree generation code so that it be reused from hotplug path. CPU dt entries are now generated from spapr_finalize_fdt() instead of spapr_create_fdt_skel(). Note: This is how the split-up looks like now: Boot path -

[Qemu-devel] [PATCH 22/22] spapr_pci: drop redundant args in spapr_[populate, create]_pci_child_dt

2015-06-24 Thread David Gibson
From: Nikunj A Dadhania nik...@linux.vnet.ibm.com * phb_index is not being used and if required can be obtained from sphb * use helper to get drc_index in spapr_populate_pci_child_dt() * Check if drc_index is zero Suggested-by: Alexey Kardashevskiy a...@ozlabs.ru Signed-off-by: Nikunj A Dadhania

[Qemu-devel] [PATCH 01/22] spapr: ensure we have at least one XICS server

2015-06-24 Thread David Gibson
From: Greg Kurz gk...@linux.vnet.ibm.com XICS needs to know the upper value for cpu_index as it is used to compute the number of servers: smp_cpus * kvmppc_smt_threads() / smp_threads When passing -smp cpus=1,threads=9 on a POWER8 host, we end up with: 1 * 8 / 9 = 0 ... which leads to

Re: [Qemu-devel] [PATCH v7 10/10] hw/pci-bridge: format special OFW unit address for PXB host

2015-06-24 Thread Laszlo Ersek
On 06/24/15 07:40, Michael S. Tsirkin wrote: On Fri, Jun 19, 2015 at 04:40:17AM +0200, Laszlo Ersek wrote: We have agreed that OpenFirmware device paths in the bootorder fw_cfg file should follow the pattern /pci@i0cf8,%x/... for devices that live behind an extra root bus. The extra root

Re: [Qemu-devel] Migration issue with 4.0.x

2015-06-24 Thread Dr. David Alan Gilbert
* Andrey Korolyov (and...@xdel.ru) wrote: Hello, during tests against 4.0.5/4.0.6 for the problem described in https://lists.gnu.org/archive/html/qemu-devel/2015-06/msg03117.html I had noticed another weird issue: VM hangs after a couple of minutes after being migrated if the hypervisor is

Re: [Qemu-devel] [PATCH v2] memory_mapping: Rework cpu related includes

2015-06-24 Thread Paolo Bonzini
On 07/06/2015 23:59, Peter Crosthwaite wrote: This makes it more consistent with all other core code files, which either just rely on qemu-common.h inclusion or precede cpu.h with qemu-common.h. cpu-all.h should not be included in addition to cpu.h. Remove it. Signed-off-by: Peter

Re: [Qemu-devel] [RFC v2 12/34] include/exec: Move tb hash functions out

2015-06-24 Thread Paolo Bonzini
On 31/05/2015 08:11, Peter Crosthwaite wrote: This is one of very few things in exec-all with a genuine CPU architecture dependency. Move these hashing helpers to a new header to trim exec-all.h down to a near architecture-agnostic header. The defs are only used by cpu-exec and

[Qemu-devel] [PATCH 21/22] spapr_pci: populate ibm,loc-code

2015-06-24 Thread David Gibson
From: Nikunj A Dadhania nik...@linux.vnet.ibm.com Each hardware instance has a platform unique location code. The OF device tree that describes a part of a hardware entity must include the “ibm,loc-code” property with a value that represents the location code for that hardware entity. Populate

[Qemu-devel] [PATCH 08/22] spapr_pci: encode class code including Prog IF register

2015-06-24 Thread David Gibson
From: Nikunj A Dadhania nik...@linux.vnet.ibm.com Current code missed the Prog IF register. All Class Code, Subclass, and Prog IF registers are needed to identify the accurate device type. For example: USB controllers use the PROG IF for denoting: USB FullSpeed, HighSpeed or SuperSpeed.

[Qemu-devel] [PATCH 13/22] spapr: Consider max_cpus during xics initialization

2015-06-24 Thread David Gibson
From: Bharata B Rao bhar...@linux.vnet.ibm.com Use max_cpus instead of smp_cpus when intializating xics system. Also report max_cpus in ibm,interrupt-server-ranges device tree property of interrupt controller node. Signed-off-by: Bharata B Rao bhar...@linux.vnet.ibm.com Signed-off-by: David

Re: [Qemu-devel] [PATCH v7 10/10] hw/pci-bridge: format special OFW unit address for PXB host

2015-06-24 Thread Marcel Apfelbaum
On 06/24/2015 10:01 AM, Laszlo Ersek wrote: On 06/24/15 07:40, Michael S. Tsirkin wrote: On Fri, Jun 19, 2015 at 04:40:17AM +0200, Laszlo Ersek wrote: We have agreed that OpenFirmware device paths in the bootorder fw_cfg file should follow the pattern /pci@i0cf8,%x/... for devices that

Re: [Qemu-devel] [PATCH V2 6/7] Introduce xilinx dp.

2015-06-24 Thread Peter Crosthwaite
On Mon, Jun 15, 2015 at 8:15 AM, fred.kon...@greensocs.com wrote: From: KONRAD Frederic fred.kon...@greensocs.com This is the implementation of the DisplayPort. It has an aux-bus to access dpcd and edid needed for the driver to complete. No need to reference the driver. Graphic plane is

Re: [Qemu-devel] [PATCH V2 7/7] arm: xlnx-zynqmp: Add DisplayPort and DPDMA.

2015-06-24 Thread Peter Crosthwaite
On Mon, Jun 15, 2015 at 8:15 AM, fred.kon...@greensocs.com wrote: From: KONRAD Frederic fred.kon...@greensocs.com This adds the DP and the DPDMA to the Zynq MP. Signed-off-by: KONRAD Frederic fred.kon...@greensocs.com Reviewed-by: Peter Crosthwaite peter.crosthwa...@xilinx.com ---

[Qemu-devel] [PATCH] .gitignore: ignore GNU Global tags and clang compiledb

2015-06-24 Thread Alex Bennée
Although you can't currently generate global tags via the make system it is worth suppressing them in .gitignore so they don't get accidentally included. Also the clang compile database can be ignored as this should always be generated from your current make invocation. Signed-off-by: Alex Bennée

Re: [Qemu-devel] [PATCH 0/2] target-i386: custom CPU model + script to dump existing CPU models

2015-06-24 Thread Jiri Denemark
On Tue, Jun 23, 2015 at 14:32:00 +0200, Andreas Färber wrote: Am 08.06.2015 um 22:18 schrieb Jiri Denemark: To help libvirt in the transition, a x86-cpu-model-dump script is provided, that will generate a config file that can be loaded using -readconfig, based on the -cpu and -machine

[Qemu-devel] [PATCH] virito-blk: drop duplicate check

2015-06-24 Thread arei.gonglei
From: Gonglei arei.gong...@huawei.com in_num = req-elem.in_num, and req-elem.in_num is checked in line 489, so the check about in_num variable is superflous, let's drop it. Signed-off-by: Gonglei arei.gong...@huawei.com --- hw/block/virtio-blk.c | 3 +-- 1 file changed, 1 insertion(+), 2

[Qemu-devel] [PATCH 02/22] pseries: Update SLOF firmware image to qemu-slof-20150429

2015-06-24 Thread David Gibson
From: Alexey Kardashevskiy a...@ozlabs.ru The changelog is: version: update to 20150429 pci: Use QEMU created PCI device nodes usb: support 64-bit pci bars pci: Support 64-bit address translation pci: program correct bridge limit registers during probe scsi: handle report-luns

[Qemu-devel] [PATCH 17/22] spapr: Consolidate cpu init code into a routine

2015-06-24 Thread David Gibson
From: Bharata B Rao bhar...@linux.vnet.ibm.com Factor out bits of sPAPR specific CPU initialization code into a separate routine so that it can be called from CPU hotplug path too. Signed-off-by: Bharata B Rao bhar...@linux.vnet.ibm.com Signed-off-by: David Gibson da...@gibson.dropbear.id.au ---

[Qemu-devel] [PATCH 07/22] spapr_pci: encode missing 64-bit memory address space

2015-06-24 Thread David Gibson
From: Nikunj A Dadhania nik...@linux.vnet.ibm.com The properties reg/assigned-resources need to encode 64-bit memory address space as part of phys.hi dword. 00 if configuration space 01 if IO region, 10 if 32-bit MEM region 11 if 64-bit MEM region Signed-off-by: Nikunj A Dadhania

Re: [Qemu-devel] [RFC] QDev explicit constructors destructors

2015-06-24 Thread Paolo Bonzini
On 23/06/2015 22:10, Liviu Ionescu wrote: I suggest your review should start from use cases like this: DeviceState *dev = my_dev_alloc(NULL, TYPE_MYTYPE); my_dev_prop_set_bool(dev, param, true); my_dev_construct(OBJECT(dev), NULL); my_dev_prop_set_uint32(dev, xyz, 123);

Re: [Qemu-devel] [RFC] QDev explicit constructors destructors

2015-06-24 Thread Liviu Ionescu
On 24 Jun 2015, at 11:29, Peter Crosthwaite peter.crosthwa...@xilinx.com wrote: Peter C, is this solution acceptable? Settable props are generally acceptable, but it is unusual for a machine init routine. ok, I managed to restructure my code to get rid of the explicit constructor.

[Qemu-devel] [PATCH 20/22] spapr_pci: enumerate and add PCI device tree

2015-06-24 Thread David Gibson
From: Nikunj A Dadhania nik...@linux.vnet.ibm.com All the PCI enumeration and device node creation was off-loaded to SLOF. With PCI hotplug support, code needed to be added to add device node. This creates multiple copy of the code one in SLOF and other in hotplug code. To unify this, the patch

[Qemu-devel] [PATCH 19/22] xics_kvm: Don't enable KVM_CAP_IRQ_XICS if already enabled

2015-06-24 Thread David Gibson
From: Bharata B Rao bhar...@linux.vnet.ibm.com When supporting CPU hot removal by parking the vCPU fd and reusing it during hotplug again, there can be cases where we try to reenable KVM_CAP_IRQ_XICS CAP for the vCPU for which it was already enabled. Introduce a boolean member in ICPState to

[Qemu-devel] [PATCH 15/22] cpus: Add a macro to walk CPUs in reverse

2015-06-24 Thread David Gibson
From: Bharata B Rao bhar...@linux.vnet.ibm.com Add CPU_FOREACH_REVERSE that walks CPUs in reverse. Needed for PowerPC CPU device tree reorganization. Signed-off-by: Bharata B Rao bhar...@linux.vnet.ibm.com Reviewed-by: Andreas Färber afaer...@suse.de Signed-off-by: David Gibson

Re: [Qemu-devel] [PATCH 0/3] update CMOS for ISA-FDC with iobase=0x3f0

2015-06-24 Thread Ján Tomko
On Tue, Jun 23, 2015 at 06:58:41PM +0200, Laszlo Ersek wrote: This is (again) for the other pc-q35-2.4 ISA-FDC problem reported by Jan. Addressing comments from Markus. Jan, can you give it another try please? I realize this is getting old pretty quick, so don't bother if you don't want to.

Re: [Qemu-devel] [PATCH v3 2/2] vhost user: Add RARP injection for legacy guest

2015-06-24 Thread Jason Wang
On 06/23/2015 01:49 PM, Michael S. Tsirkin wrote: On Tue, Jun 23, 2015 at 10:12:17AM +0800, Jason Wang wrote: On 06/18/2015 11:16 PM, Thibaut Collet wrote: On Tue, Jun 16, 2015 at 10:05 AM, Jason Wang jasow...@redhat.com wrote: On 06/16/2015 03:24 PM, Thibaut Collet wrote:

Re: [Qemu-devel] [Qemu-block] [PATCH v2 02/13] block: Introduce bdrv_lock and bdrv_unlock API

2015-06-24 Thread Paolo Bonzini
On 24/06/2015 04:47, Fam Zheng wrote: 2. Is this about thread safety? (No, it's about exclusive access to a BDS *within* the AioContext.) As it has to quiesce iothreads as well (for now it's even more urgent than exclusive access within the same AioContext), I'd rather take it as yes.

[Qemu-devel] [v11 05/15] vfio: add pcie extanded capability support

2015-06-24 Thread Chen Fan
For vfio pcie device, we could expose the extended capability on PCIE bus. in order to avoid config space broken, we introduce a copy config for parsing extended caps. and rebuild the pcie extended config space. Signed-off-by: Chen Fan chen.fan.f...@cn.fujitsu.com --- hw/vfio/pci.c | 72

[Qemu-devel] [v11 01/15] vfio: extract vfio_get_hot_reset_info as a single function

2015-06-24 Thread Chen Fan
the function is used to get affected devices by bus reset. so here extract it, and can used for aer soon. Signed-off-by: Chen Fan chen.fan.f...@cn.fujitsu.com --- hw/vfio/pci.c | 66 +++ 1 file changed, 48 insertions(+), 18 deletions(-)

Re: [Qemu-devel] [RFC v2 06/34] cpu-common: Define tb_page_addr_t for everyone

2015-06-24 Thread Paolo Bonzini
On 08/06/2015 01:06, Peter Crosthwaite wrote: I suspect you can instead make a header that is included by arch-obj files, and move a lot of stuff there from include/exec/exec-all.h (for example all the prototypes that use tb_page_addr_t). So the problem was I needed this from cpu-qom

Re: [Qemu-devel] [RESEND PATCH v16 2/6] kvm: rename kvm_irqchip_[add, remove]_irqfd_notifier with gsi suffix

2015-06-24 Thread Paolo Bonzini
On 15/06/2015 18:33, Eric Auger wrote: Anticipating for the introduction of new add/remove functions taking a qemu_irq parameter, let's rename existing ones with a gsi suffix. Signed-off-by: Eric Auger eric.au...@linaro.org Tested-by: Vikram Sethi vikr...@codeaurora.org Acked-by: Paolo

Re: [Qemu-devel] [PATCH v3 04/11] linux-user: arm: set CPSR.E correctly for BE8 mode

2015-06-24 Thread Paolo Bonzini
On 23/06/2015 22:30, Peter Crosthwaite wrote: I'm confused. arm_cpu_is_big_endian() tells you whether the CPU is *currently* big-endian or not. That doesn't help you with answering the question I'm about to run a signal handler; what should I set the CPSR.E bit to? in linux-user mode.

Re: [Qemu-devel] [PATCH v3 04/11] linux-user: arm: set CPSR.E correctly for BE8 mode

2015-06-24 Thread Peter Maydell
On 24 June 2015 at 11:34, Paolo Bonzini pbonz...@redhat.com wrote: On 24/06/2015 12:21, Peter Maydell wrote: I think signal_cpsr_e is exactly what you want for AArch32. It sets CPSR.E in main and setup_return for AArch32. For AArch64 you don't need anything because, even though the

Re: [Qemu-devel] [PATCH v3 2/2] vhost user: Add RARP injection for legacy guest

2015-06-24 Thread Michael S. Tsirkin
On Wed, Jun 24, 2015 at 04:31:15PM +0800, Jason Wang wrote: On 06/23/2015 01:49 PM, Michael S. Tsirkin wrote: On Tue, Jun 23, 2015 at 10:12:17AM +0800, Jason Wang wrote: On 06/18/2015 11:16 PM, Thibaut Collet wrote: On Tue, Jun 16, 2015 at 10:05 AM, Jason Wang

Re: [Qemu-devel] [PATCH v3 04/15] target-mips: refactor {D}LSA, {D}ALIGN, {D}BITSWAP

2015-06-24 Thread Aurelien Jarno
On 2015-06-23 16:38, Yongbok Kim wrote: Refactor those instructions in order to reuse them for microMIPS32 Release 6. Rearrange gen_move_low32(). Signed-off-by: Yongbok Kim yongbok@imgtec.com Reviewed-by: Leon Alrae leon.al...@imgtec.com --- target-mips/translate.c | 166

[Qemu-devel] [v11 04/15] vfio: make the 4 bytes aligned for capability size

2015-06-24 Thread Chen Fan
this function search the capability from the end, the last size should 0x100 - pos, not 0xff - pos. Signed-off-by: Chen Fan chen.fan.f...@cn.fujitsu.com --- hw/vfio/pci.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c index e056c49..52e8ad4

[Qemu-devel] [v11 00/15] vfio-pci: pass the aer error to guest

2015-06-24 Thread Chen Fan
For now, for vfio pci passthough devices when qemu receives an error from host aer report, there just terminate the guest, but usually user want to know what error occurred but stop the guest, so this patches add aer capability support for vfio device, and pass the error to guest, and have guest

Re: [Qemu-devel] [PATCH v3 04/11] linux-user: arm: set CPSR.E correctly for BE8 mode

2015-06-24 Thread Paolo Bonzini
On 24/06/2015 12:48, Peter Maydell wrote: I didn't think SETEND existed at all in AArch64? No, but the kernel traps it and flips SCTLR.E0E. Traps what? There is no encoding in A64, unless I'm missing something... Ah, it's the A64 kernel executing A32 code. So no problem. Paolo

[Qemu-devel] [PATCH] hw: fix mask for ColdFire UART command register

2015-06-24 Thread Paolo Bonzini
The miscellaneous commands part of the register is 3 bits wide. Spotted by Coverity and confirmed in the datasheet, downloadable from http://cache.freescale.com/files/32bit/doc/ref_manual/MCF5307BUM.pdf (figure 14-6). Signed-off-by: Paolo Bonzini pbonz...@redhat.com --- hw/char/mcf_uart.c | 2 +-

Re: [Qemu-devel] [PATCH v3 04/15] target-mips: refactor {D}LSA, {D}ALIGN, {D}BITSWAP

2015-06-24 Thread Leon Alrae
On 24/06/2015 12:04, Aurelien Jarno wrote: +static void gen_align(DisasContext *ctx, int opc, int rd, int rs, int rt, + int bp) { +TCGv t0; +if (rd == 0) { +/* Treat as NOP. */ +return; +} +t0 = tcg_temp_new(); +gen_load_gpr(t0,

Re: [Qemu-devel] Greate difference of disk I/O performance for guest on Qemu-2.30 of CentOS.

2015-06-24 Thread Paolo Bonzini
On 24/06/2015 14:31, cauchy-love wrote: Sorry, but I don't know what does bisect mean exactly.Could you please explain it? I feel it might be some kernel configuration items introduce this problem.I am also trying other kernel versions from 2.6.34 to 2.6.38 (2.6.33.3 has good

Re: [Qemu-devel] [RESEND PATCH v16 0/6] KVM platform device passthrough

2015-06-24 Thread Paolo Bonzini
On 15/06/2015 18:33, Eric Auger wrote: Now that the platform-bus is instantiated in virt, the ARM sysbus-fdt infrastructure, the VFIO platform device and its first Calxeda xgmac specialization also are on the master, let's complete the work by - enabling the instantiation of the VFIO

[Qemu-devel] [v11 15/15] vfio: add 'aer' property to expose aercap

2015-06-24 Thread Chen Fan
add 'aer' property to let user able to decide whether expose the aer capability. by default we should disable aer feature, because it needs configuration restrictions. Signed-off-by: Chen Fan chen.fan.f...@cn.fujitsu.com --- hw/vfio/pci.c | 2 ++ 1 file changed, 2 insertions(+) diff --git

Re: [Qemu-devel] [RFC] QDev explicit constructors destructors

2015-06-24 Thread Paolo Bonzini
On 24/06/2015 11:29, Liviu Ionescu wrote: ok, I managed to restructure my code to get rid of the explicit constructor. :-) I also avoided properties aliases, and did prop setting in two steps, in machine init I set props in MCU, and from here I manually set them in specific peripherals,

Re: [Qemu-devel] [PATCH v3 04/11] linux-user: arm: set CPSR.E correctly for BE8 mode

2015-06-24 Thread Paolo Bonzini
On 24/06/2015 12:21, Peter Maydell wrote: I think signal_cpsr_e is exactly what you want for AArch32. It sets CPSR.E in main and setup_return for AArch32. For AArch64 you don't need anything because, even though the kernel does trap setend and tweak SCTLR.E0E in response to it,

Re: [Qemu-devel] [PATCH v2 2/4] gdbstub: Use cpu_set_pc helper

2015-06-24 Thread Peter Maydell
On 24 June 2015 at 03:50, Peter Crosthwaite peter.crosthwa...@xilinx.com wrote: On Mon, Jun 22, 2015 at 10:31 AM, Andreas Färber afaer...@suse.de wrote: I believe this argument will probably go away; otherwise this should've been error_abort or something instead of NULL. I'm not sure. As I

Re: [Qemu-devel] [PATCH 0/2] target-i386: custom CPU model + script to dump existing CPU models

2015-06-24 Thread Michael S. Tsirkin
On Wed, Jun 24, 2015 at 11:20:50AM +0200, Jiri Denemark wrote: On Tue, Jun 23, 2015 at 14:32:00 +0200, Andreas Färber wrote: Am 08.06.2015 um 22:18 schrieb Jiri Denemark: To help libvirt in the transition, a x86-cpu-model-dump script is provided, that will generate a config file that

Re: [Qemu-devel] [PATCH v2 1/4] pc, pc-dimm: Factor out reusable parts in pc_dimm_plug to a separate routine

2015-06-24 Thread Bharata B Rao
On Fri, Jun 19, 2015 at 10:40:21AM +0530, Bharata B Rao wrote: pc_dimm_plug() has code that will be needed for memory plug handlers in other archs too. Extract code from pc_dimm_plug() into a generic routine pc_dimm_memory_plug() that resides in pc-dimm.c. Also correspondingly refactor

Re: [Qemu-devel] [PATCH] tests: add missing include

2015-06-24 Thread Andreas Färber
Am 23.06.2015 um 18:40 schrieb Marc-André Lureau: Fix make test errors of this kind on fedora 22: linux-test.c:230:19: error: storage size of ‘rusg1’ isn’t known struct rusage rusg1, rusg2; Signed-off-by: Marc-André Lureau marcandre.lur...@gmail.com --- tests/tcg/linux-test.c | 1 +

Re: [Qemu-devel] [PATCH 4/4] cpus: Change exec_init arg to cpu, not env

2015-06-24 Thread Paolo Bonzini
On 24/06/2015 14:48, Andreas Färber wrote: I was expecting you to handle cpu_exec_init() through your x86 tree, but seems that didn't happen. I am going through CPU patches today, so could take open series but then would need to pick up the ENV_* stuff too, which I thought would go through

Re: [Qemu-devel] [PATCH 4/4] cpus: Change exec_init arg to cpu, not env

2015-06-24 Thread Andreas Färber
Am 05.06.2015 um 17:05 schrieb Eduardo Habkost: On Fri, Jun 05, 2015 at 11:51:41PM +0900, Andreas Färber wrote: Am 25.05.2015 um 15:22 schrieb Peter Crosthwaite: The callers (most of them in target-foo/cpu.c) to this function all have the cpu pointer handy. Just pass it to avoid an ENV_GET_CPU

Re: [Qemu-devel] [PATCH] virito-blk: drop duplicate check

2015-06-24 Thread Fam Zheng
On Wed, 06/24 17:29, arei.gong...@huawei.com wrote: From: Gonglei arei.gong...@huawei.com in_num = req-elem.in_num, and req-elem.in_num is checked in line 489, so the check about in_num variable is superflous, let's drop it. Signed-off-by: Gonglei arei.gong...@huawei.com Reviewed-by: Fam

[Qemu-devel] [v11 11/15] vfio: modify vfio_pci_hot_reset to support bus reset

2015-06-24 Thread Chen Fan
the vfio_pci_hot_reset differentiate the single and multi in-used devices for reset. but in multi case, when some dependent devices are not assigned to VM, the devices can not be recovered by driver. Signed-off-by: Chen Fan chen.fan.f...@cn.fujitsu.com --- hw/vfio/pci.c | 13 + 1

[Qemu-devel] [v11 12/15] vfio: do hot bus reset when do virtual secondary bus reset

2015-06-24 Thread Chen Fan
when do virtual secondary bus reset, the vfio device under this bus need to do host bus reset to reset the device. so add this case. Signed-off-by: Chen Fan chen.fan.f...@cn.fujitsu.com --- hw/vfio/pci.c | 31 +++ 1 file changed, 31 insertions(+) diff --git

Re: [Qemu-devel] [PATCH 0/2] target-i386: custom CPU model + script to dump existing CPU models

2015-06-24 Thread Michael S. Tsirkin
On Wed, Jun 24, 2015 at 09:52:09AM +0100, Daniel P. Berrange wrote: On Tue, Jun 23, 2015 at 11:23:16PM +0200, Michael S. Tsirkin wrote: So any single CPU flag now needs to be added in - kvm - qemu - libvirt This is in fact already the case, and it will also possibly need to be

Re: [Qemu-devel] [PATCH 0/2] target-i386: custom CPU model + script to dump existing CPU models

2015-06-24 Thread Daniel P. Berrange
On Wed, Jun 24, 2015 at 12:21:57PM +0200, Michael S. Tsirkin wrote: On Wed, Jun 24, 2015 at 11:20:50AM +0200, Jiri Denemark wrote: On Tue, Jun 23, 2015 at 14:32:00 +0200, Andreas Färber wrote: Am 08.06.2015 um 22:18 schrieb Jiri Denemark: To help libvirt in the transition, a

Re: [Qemu-devel] [PATCH 0/2] target-i386: custom CPU model + script to dump existing CPU models

2015-06-24 Thread Paolo Bonzini
On 24/06/2015 12:21, Michael S. Tsirkin wrote: QEMU provides stable ABI for x86 CPUs only if you use -cpu ...,enforce. Without enforce the CPU may change everytime a domain is started or migrated. A small example: let's say a CPU model called Model includes feature xyz; when QEMU is

Re: [Qemu-devel] [PATCH 0/2] target-i386: custom CPU model + script to dump existing CPU models

2015-06-24 Thread Michael S. Tsirkin
On Wed, Jun 24, 2015 at 11:31:37AM +0100, Daniel P. Berrange wrote: On Wed, Jun 24, 2015 at 12:21:57PM +0200, Michael S. Tsirkin wrote: On Wed, Jun 24, 2015 at 11:20:50AM +0200, Jiri Denemark wrote: On Tue, Jun 23, 2015 at 14:32:00 +0200, Andreas Färber wrote: Am 08.06.2015 um 22:18

Re: [Qemu-devel] [PATCH qemu v8 00/14] spapr: vfio: Enable Dynamic DMA windows (DDW)

2015-06-24 Thread Alexey Kardashevskiy
On 06/23/2015 04:44 PM, David Gibson wrote: On Thu, Jun 18, 2015 at 09:37:22PM +1000, Alexey Kardashevskiy wrote: (cut-n-paste from kernel patchset) Each Partitionable Endpoint (IOMMU group) has an address range on a PCI bus where devices are allowed to do DMA. These ranges are called DMA

[Qemu-devel] [PATCH] target-tricore: fix depositing bits from PCXI into ICR

2015-06-24 Thread Paolo Bonzini
Spotted by Coverity, because (env-PCXI MASK_PCXI_PCPN) 24 is always zero. The immediately preceding assignment is also wrong though. Signed-off-by: Paolo Bonzini pbonz...@redhat.com --- target-tricore/op_helper.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git

Re: [Qemu-devel] [PATCH v3 06/15] target-mips: raise RI exceptions when FIR.PS = 0

2015-06-24 Thread Aurelien Jarno
On 2015-06-23 16:38, Yongbok Kim wrote: 64-bit paired-single (PS) floating point data type is optional in the pre-Release 6. It has to raise RI exception when PS type is not implemented. (FIR.PS = 0) (The PS data type is removed in the Release 6.) Signed-off-by: Yongbok Kim

[Qemu-devel] [v11 07/15] vfio: add aer support for vfio device

2015-06-24 Thread Chen Fan
Calling pcie_aer_init to initilize aer related registers for vfio device, then reload physical related registers to expose device capability. Signed-off-by: Chen Fan chen.fan.f...@cn.fujitsu.com --- hw/vfio/pci.c | 89 +-- 1 file changed,

[Qemu-devel] [v11 10/15] vfio: add sec_bus_reset notifier to notify physical bus reset is needed

2015-06-24 Thread Chen Fan
Signed-off-by: Chen Fan chen.fan.f...@cn.fujitsu.com --- hw/vfio/pci.c | 83 +++ 1 file changed, 83 insertions(+) diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c index c2af8f1..7cc81ae 100644 --- a/hw/vfio/pci.c +++ b/hw/vfio/pci.c @@ -156,6

[Qemu-devel] [v11 14/15] vfio-pci: pass the aer error to guest

2015-06-24 Thread Chen Fan
when the vfio device encounters an uncorrectable error in host, the vfio_pci driver will signal the eventfd registered by this vfio device, the results in the qemu eventfd handler getting invoked. this patch is to pass the error to guest and have the guest driver recover from the error.

[Qemu-devel] [v11 08/15] vfio: add check host bus reset is support or not

2015-06-24 Thread Chen Fan
when init vfio devices done, we should test all the devices supported aer whether conflict with others. For each one, get the hot reset info for the affected device list. For each affected device, all should attach to the VM and on the same slot. also, we should test all of the non-AER supporting

Re: [Qemu-devel] [Qemu-block] [PATCH v8 00/11] Support streaming to an intermediate layer

2015-06-24 Thread Alberto Garcia
On Wed 24 Jun 2015 10:02:03 AM CEST, Alberto Garcia wrote: [A] - [B] - [C] - [D] - [E] - [F] - [G] [...] The way it works is that stream_start() reopens the destination image in read-write mode (if needed), creates the stream_run() coroutine to copy the data, and finally stream_complete()

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