[Qemu-devel] [PATCH v3 09/21] RISC-V Physical Memory Protection

Implements the physical memory protection extension as specified in Privileged ISA Version 1.10. PMP (Physical Memory Protection) is as-of-yet unused and needs testing. The SiFive verification team have PMP test cases that will be run. Nothing currently depends on PMP support. It would be

[Qemu-devel] [PATCH v3 00/21] RISC-V QEMU Port Submission v3

QEMU RISC-V Emulation Support (RV64GC, RV32GC) This patch series has major clean ups to target/riscv. There may be some feedback that has been missed however the changelog is growing quite large so we have decided to respin the patch series. No new features have been added however a number of

[Qemu-devel] [PATCH v3 17/21] SiFive RISC-V UART Device

QEMU model of the UART on the SiFive E300 and U500 series SOCs. BBL supports the SiFive UART for early console access via the SBI (Supervisor Binary Interface) and the linux kernel SBI console. The SiFive UART implements the pre qom legacy interface consistent with the 16550a UART in

[Qemu-devel] [PATCH v3 18/21] SiFive RISC-V PRCI Block

Simple model of the PRCI (Power, Reset, Clock, Interrupt) to emulate register reads made by the SDK BSP. Signed-off-by: Michael Clark --- hw/riscv/sifive_prci.c | 107 + include/hw/riscv/sifive_prci.h | 43 + 2

Re: [Qemu-devel] [PATCH v3 00/21] RISC-V QEMU Port Submission v3

Hi, This series seems to have some coding style problems. See output below for more information: Type: series Message-id: 1515637324-96034-1-git-send-email-...@sifive.com Subject: [Qemu-devel] [PATCH v3 00/21] RISC-V QEMU Port Submission v3 === TEST SCRIPT BEGIN === #!/bin/bash BASE=base n=1

Re: [Qemu-devel] [PATCH v5 3/7] vhost: Simplify ring verification checks

On 2018年01月10日 18:23, Igor Mammedov wrote: On Mon, 8 Jan 2018 17:54:50 + "Dr. David Alan Gilbert" wrote: * Igor Mammedov (imamm...@redhat.com) wrote: On Mon, 18 Dec 2017 20:13:36 + "Dr. David Alan Gilbert (git)" wrote: From: "Dr.

[Qemu-devel] [PULL 02/11] sm501: Add panel hardware cursor registers also to read function

From: BALATON Zoltan These were forgotten when adding panel layer support in ffd39257018 "SM501 emulation for R2D-SH4". Signed-off-by: BALATON Zoltan Reviewed-by: Philippe Mathieu-Daudé [dwg: Added reference to earlier commit in

[Qemu-devel] [PULL 09/11] Update dtc to fix compilation problem on Mac OS 10.6

From: John Arbuckle Currently QEMU does not build on Mac OS 10.6 because of a missing patch in the dtc subproject. Updating dtc to make the patch available fixes this problem. Signed-off-by: John Arbuckle Signed-off-by: David Gibson

[Qemu-devel] [PATCH v3 02/21] RISC-V ELF Machine Definition

Define RISC-V ELF machine EM_RISCV 243 Reviewed-by: Richard Henderson Signed-off-by: Michael Clark --- include/elf.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/elf.h b/include/elf.h index e8a515c..8e457fc 100644 ---

[Qemu-devel] [PATCH v3 12/21] RISC-V HART Array

Holds the state of a heterogenous array of RISC-V hardware threads. Signed-off-by: Michael Clark --- hw/riscv/riscv_hart.c | 95 +++ include/hw/riscv/riscv_hart.h | 45 2 files changed, 140 insertions(+)

[Qemu-devel] [PATCH v3 06/21] RISC-V FPU Support

Helper routines for FPU instructions and NaN definitions. Signed-off-by: Michael Clark --- fpu/softfloat-specialize.h | 7 +- target/riscv/fpu_helper.c | 591 + 2 files changed, 595 insertions(+), 3 deletions(-) create mode 100644

[Qemu-devel] [PATCH v3 01/21] RISC-V Maintainers

Add Michael Clark, Palmer Dabbelt, Sagar Karandikar and Bastian Koppelmann as RISC-V Maintainers. Signed-off-by: Michael Clark --- MAINTAINERS | 11 +++ 1 file changed, 11 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index bc2d3a4..17af5b4 100644 ---

[Qemu-devel] [PATCH v3 05/21] RISC-V CPU Helpers

Privileged control and status register helpers and page fault handling. Signed-off-by: Michael Clark --- target/riscv/helper.c| 499 ++ target/riscv/helper.h| 78 ++ target/riscv/op_helper.c | 682

[Qemu-devel] [PATCH v3 13/21] SiFive RISC-V CLINT Block

The CLINT (Core Local Interruptor) device provides real-time clock, timer and interprocessor interrupts based on SiFive's CLINT specification. Signed-off-by: Michael Clark --- hw/riscv/sifive_clint.c | 312

[Qemu-devel] [RFC PATCH 4/5] vfio/ccw: update subchanel information block lazily

We want to sync up channel path related information between the physical device and the virtual device. Thus here we read out subchannel information block from the schib region, and update the virtual sbuchannel information block. Since the kernel side will signal userland once it has channel

[Qemu-devel] [PULL 05/11] spapr_pci: use warn_report()

From: Greg Kurz These two are definitely warnings. Let's use the appropriate API. Signed-off-by: Greg Kurz Signed-off-by: David Gibson --- hw/ppc/spapr_pci.c | 6 +++--- hw/ppc/spapr_pci_vfio.c | 2 +- 2 files changed, 4

[Qemu-devel] [PULL 00/11] ppc-for-2.12 queue 20180111

The following changes since commit 3cee4db661ab9c0fce7937b3bbfa188a1845f31f: Merge remote-tracking branch 'remotes/ericb/tags/pull-nbd-2018-01-08' into staging (2018-01-09 15:22:47 +) are available in the Git repository at: git://github.com/dgibson/qemu.git tags/ppc-for-2.12-20180111

[Qemu-devel] [PULL 10/11] hw/ppc: Remove the deprecated spapr-pci-vfio-host-bridge device

From: Thomas Huth It's a deprecated dummy device since QEMU v2.6.0. That should have been enough time to allow the users to update their scripts in case they still use it, so let's remove this legacy code now. Reviewed-by: Alexey Kardashevskiy Signed-off-by:

[Qemu-devel] [PATCH v3 03/21] RISC-V CPU Core Definition

Add CPU state header, CPU definitions and initialization routines Signed-off-by: Michael Clark --- target/riscv/cpu.c | 391 + target/riscv/cpu.h | 271 +++ target/riscv/cpu_bits.h | 417

[Qemu-devel] [PATCH v3 10/21] RISC-V Linux User Emulation

Implementation of linux user emulation for RISC-V. Signed-off-by: Michael Clark --- linux-user/elfload.c | 22 +++ linux-user/main.c | 114 +++ linux-user/riscv/syscall_nr.h | 275 +++

[Qemu-devel] [PATCH v3 14/21] SiFive RISC-V PLIC Block

The PLIC (Platform Level Interrupt Controller) device provides a parameterizable interrupt controller based on SiFive's PLIC specification. Signed-off-by: Michael Clark --- hw/riscv/sifive_plic.c | 554 +

[Qemu-devel] [PATCH v3 16/21] RISC-V VirtIO Machine

RISC-V machine with device-tree, 16550a UART and VirtIO MMIO. The following machine is implemented: - 'virt'; CLINT, PLIC, 16550A UART, VirtIO MMIO, device-tree Signed-off-by: Michael Clark --- hw/riscv/virt.c | 364

[Qemu-devel] [RFC PATCH 3/3] vfio: ccw: handle chp event

This adds channel path related event handler for vfio-ccw. This also signals userland when there is a chp event. Signed-off-by: Dong Jia Shi --- drivers/s390/cio/vfio_ccw_drv.c | 51 + drivers/s390/cio/vfio_ccw_fsm.c | 22

[Qemu-devel] [RFC PATCH 3/5] vfio/ccw: get irq info and set up handler for chp irq

vfio-ccw now resorts to the eventfd mechanism to communicate with userland for channel path related event. To get notification of the channel path event, userland basically needs to: 1. check the chp irq capability via issuing VFIO_DEVICE_GET_IRQ_INFO ioctl with VFIO_CCW_CHP_IRQ_INDEX. 2.

[Qemu-devel] [RFC PATCH 2/5] vfio/ccw: get schib region info

vfio-ccw provides an MMIO region for store subchannel information. We fetch this information via ioctls here, then we can use it to update schib for virtual subchannels later on. While we are at it, also modify the comment and error message for the config region a bit, to make these unified with

[Qemu-devel] [RFC PATCH 0/5] vfio/ccw: basic channel path event handling

Hi Folks, This is the QEMU couterpart for the "basic channel path event handling" series. For more information, please refer to the kernel counterpart. Dong Jia Shi (5): vfio: linux-headers update for vfio-ccw vfio/ccw: get schib region info vfio/ccw: get irq info and set up handler for

[Qemu-devel] [PATCH v3 11/21] RISC-V HTIF Console

HTIF (Host Target Interface) provides console emulation for QEMU. HTIF allows identical copies of BBL (Berkeley Boot Loader) and linux to run on both Spike and QEMU. BBL provides HTIF console access via the SBI (Supervisor Binary Interface) and the linux kernel SBI console. The HTIF interface

Re: [Qemu-devel] [PULL 00/12] ppc-for-2.12 queue 20180108

On Wed, Jan 10, 2018 at 02:33:41PM +0100, Paolo Bonzini wrote: > On 10/01/2018 02:55, David Gibson wrote: > > On Tue, Jan 09, 2018 at 03:15:25PM +, Peter Maydell wrote: > >> On 9 January 2018 at 12:16, David Gibson > >> wrote: > >>> Thanks. Even if you can

Re: [Qemu-devel] [Qemu-discuss] ppc and icount

On Wed, Jan 10, 2018 at 10:34:18AM +, Peter Maydell wrote: > On 10 January 2018 at 08:57, Steven Seeger > wrote: > > Sorry for another post. I did a bisect and found what is the bad commit for > > me: > > > > 044897ef4a22af89aecb8df509477beba0a2e0ce is the

[Qemu-devel] [RFC PATCH 5/5] vfio/ccw: build schib with real schib information

The current implementation grabs chpids and path masks from sysfs to build the schib and chp for the virtual subchannels. Since now vfio-ccw provides a schib region for store subchannel information. Let's leverage it to get the chipids and the masks, and serve the virtual subchannels. While we

Re: [Qemu-devel] [PATCH v5 2/4][RFC] tap: do not close fd if only vhost failed to initialize

On 2018年01月10日 15:39, Zhoujian (jay) wrote: +*vhost_init_failed = true; Why not simply check s->vhost_net after call net_init_tap_one()? s->vhost_net is always NULL if net_init_tap_one() failed, it can't distinguish failure reasons. On which condition net_init_tap_one() fail

[Qemu-devel] [PULL 07/11] ppc/pnv: change powernv_ prefix to pnv_ for overall naming consistency

From: Cédric Le Goater The 'pnv' prefix is now used for all and the routines populating the device tree start with 'pnv_dt'. The handler of the PnvXScomInterface is also renamed to 'dt_xscom' which should reflect that it is populating the device tree under the 'xscom@' node of the

[Qemu-devel] [PULL 11/11] spapr: Correct compatibility mode setting for hotplugged CPUs

Currently the pseries machine sets the compatibility mode for the guest's cpus in two places: 1) at machine reset and 2) after CAS negotiation. This means that if we set or negotiate a compatiblity mode, then hotplug a cpu, the hotplugged cpu doesn't get the right mode set and will incorrectly

Re: [Qemu-devel] [PATCH v14 5/9] target-arm: kvm64: inject synchronous External Abort

Hi Peter. On 2018/1/10 1:30, Peter Maydell wrote: > On 28 December 2017 at 05:54, Dongjiu Geng wrote: >> Add synchronous external abort injection logic, setup >> exception type and syndrome value. When switch to guest, >> guest will jump to the synchronous external abort

Re: [Qemu-devel] [PATCH v5 1/4] vhost: remove assertion to prevent crash

Hi Igor, > -Original Message- > From: Igor Mammedov [mailto:imamm...@redhat.com] > Sent: Wednesday, January 10, 2018 9:31 PM > To: Zhoujian (jay) > Cc: qemu-devel@nongnu.org; Huangweidong (C) ; > m...@redhat.com; wangxin (U)

[Qemu-devel] [PATCH v3 08/21] RISC-V TCG Code Generation

TCG code generation for the RV32IMAFDC and RV64IMAFDC. The QEMU RISC-V code generator has complete coverage for the Base ISA v2.2, Privileged ISA v1.9.1 and Privileged ISA v1.10: - RISC-V Instruction Set Manual Volume I: User-Level ISA Version 2.2 - RISC-V Instruction Set Manual Volume II:

[Qemu-devel] [PATCH qemu] target/ppc: Yet another fix for KVM-HV HPTE accessors

As stated in the 1ad9f0a464fe commit log, the returned entries are not a while PTEG. It was not a problem before 1ad9f0a464fe as it would read a single record assuming it contains a whole PTEG but now the code tries reading the entire PTEG and "if ((n - i) < invalid)" produces negative values

[Qemu-devel] [PULL 06/11] hw/ide: Emulate SiI3112 SATA controller

From: BALATON Zoltan This is a common generic PCI SATA controller that is also used in PCs but more importantly guests running on the Sam460ex board prefer this card and have a driver for it (unlike for other SATA controllers already emulated). Signed-off-by: BALATON Zoltan

[Qemu-devel] [PULL 08/11] target/ppc: more use of the PPC_*() macros

From: Cédric Le Goater Also introduce utilities to manipulate bitmasks (originaly from OPAL) which be will be used in the model of the XIVE interrupt controller. Signed-off-by: Cédric Le Goater Signed-off-by: David Gibson ---

[Qemu-devel] [PULL 03/11] sm501: Add some more unimplemented registers

From: BALATON Zoltan These are not really implemented (just return zero or default values) but add these so guests accessing them can run. Signed-off-by: BALATON Zoltan Signed-off-by: David Gibson --- hw/display/sm501.c |

[Qemu-devel] [PATCH v3 04/21] RISC-V Disassembler

The RISC-V disassembler has no dependencies outside of the 'disas' directory so it can be applied independently. The majority of the disassembler is machine-generated from instruction set metadata: - https://github.com/michaeljclark/riscv-meta Expected checkpatch errors for consistency and

[Qemu-devel] [PATCH v3 07/21] RISC-V GDB Stub

GDB Register read and write routines. Signed-off-by: Michael Clark --- target/riscv/gdbstub.c | 59 ++ 1 file changed, 59 insertions(+) create mode 100644 target/riscv/gdbstub.c diff --git a/target/riscv/gdbstub.c

[Qemu-devel] [RFC PATCH 1/3] vfio: ccw: introduce schib region

This introduces a new region for vfio-ccw to provide subchannel information for user space. Signed-off-by: Dong Jia Shi --- drivers/s390/cio/vfio_ccw_fsm.c | 21 ++ drivers/s390/cio/vfio_ccw_ops.c | 79 +++--

[Qemu-devel] [RFC PATCH 2/3] vfio: ccw: introduce channel path irq

This introduces a new irq for vfio-ccw to provide channel path related event for userland. Signed-off-by: Dong Jia Shi --- drivers/s390/cio/vfio_ccw_ops.c | 29 + drivers/s390/cio/vfio_ccw_private.h | 2 ++ include/uapi/linux/vfio.h

[Qemu-devel] [RFC PATCH 0/3] vfio: ccw: basic channel path event handling

Hi Folks, Background == Some days ago, we had a discussion on the topic of channel path virtualization. Ref: Subject: [PATCH 0/3] Channel Path realted CRW generation Message-Id: <20170727015418.85407-1-bjsdj...@linux.vnet.ibm.com> URL:

Re: [Qemu-devel] vhost-pci and virtio-vhost-user

On 01/11/2018 12:14 AM, Stefan Hajnoczi wrote: Hi Wei, I wanted to summarize the differences between the vhost-pci and virtio-vhost-user approaches because previous discussions may have been confusing. vhost-pci defines a new virtio device type for each vhost device type (net, scsi, blk). It

[Qemu-devel] [PATCH v3 15/21] RISC-V Spike Machines

RISC-V machines compatble with Spike aka riscv-isa-sim, the RISC-V Instruction Set Simulator. The following machines are implemented: - 'spike_v1.9'; HTIF console, config-string, Privileged ISA Version 1.9.1 - 'spike_v1.10'; HTIF console, device-tree, Privileged ISA Version 1.10 Signed-off-by:

Re: [Qemu-devel] [PATCH v1 2/2] intel-iommu: Extend address width to 48 bits

> -Original Message- > From: Qemu-devel [mailto:qemu-devel-bounces+yi.l.liu=intel@nongnu.org] On > Behalf Of Prasad Singamsetty > Sent: Thursday, January 11, 2018 8:06 AM > To: Liu, Yi L > Cc: ehabk...@redhat.com; m...@redhat.com; konrad.w...@oracle.com;

Re: [Qemu-devel] virtio-9p: hot-plug/unplug about virtio-9p device

On 2018/1/8 18:10, Greg Kurz wrote: > On Tue, 19 Dec 2017 13:41:12 +0800 > sochin.jiang wrote: > >> Hi, guys. >> >> I'm looking for the hot-plug/unplug features of virtio-9p device >> recently, and found there's a lack of support. >> >> I am wondering why

[Qemu-devel] [RFC PATCH 1/5] vfio: linux-headers update for vfio-ccw

This is a placeholder for a linux-headers update. Signed-off-by: Dong Jia Shi --- linux-headers/linux/vfio.h | 2 ++ linux-headers/linux/vfio_ccw.h | 6 ++ 2 files changed, 8 insertions(+) diff --git a/linux-headers/linux/vfio.h b/linux-headers/linux/vfio.h

Re: [Qemu-devel] [PATCH v5 2/4][RFC] tap: do not close fd if only vhost failed to initialize

Hi Jason, > -Original Message- > From: Jason Wang [mailto:jasow...@redhat.com] > Sent: Thursday, January 11, 2018 11:35 AM > To: Zhoujian (jay) ; qemu-devel@nongnu.org > Cc: Huangweidong (C) ; m...@redhat.com; wangxin (U) >

[Qemu-devel] [PULL 04/11] ppc4xx_i2c: Implement basic I2C functions

From: BALATON Zoltan Enough to please U-Boot and make it able to detect SDRAM SPD EEPROMs Signed-off-by: François Revol Signed-off-by: BALATON Zoltan Reviewed-by: David Gibson Signed-off-by: David Gibson

Re: [Qemu-devel] [PATCH v4 05/11] tests: Add deprecated commands migration test

On Wed, Jan 10, 2018 at 09:46:49AM +0100, Juan Quintela wrote: > Peter Xu wrote: > > On Fri, Jan 05, 2018 at 10:52:40PM +0100, Juan Quintela wrote: > >> We add deprecated commands on a new test, so we don't have to add it > >> on normal tests. > >> > >> Signed-off-by: Juan

[Qemu-devel] [PATCH v4 7/9] block: Move NVMe constants to a separate header

Signed-off-by: Fam Zheng --- block/nvme.c | 7 +- hw/block/nvme.h | 698 +- include/block/nvme.h | 700 +++ 3 files changed, 702 insertions(+), 703 deletions(-) create

[Qemu-devel] [PATCH v4 3/9] block: Add VFIO based NVMe driver

This is a new protocol driver that exclusively opens a host NVMe controller through VFIO. It achieves better latency than linux-aio by completely bypassing host kernel vfs/block layer. $rw-$bs-$iodepth linux-aio nvme:// randread-4k-1

[Qemu-devel] [PATCH v3] hpet: recover timer offset correctly

HPET saves its state by calculating the current time and recovers timer offset using this calculated value. But these calculations include divisions and multiplications. Therefore the timer state cannot be recovered precise enough. This patch introduces saving of the original value of the offset

Re: [Qemu-devel] [PATCH v2] hpet: recover timer offset correctly

> -Original Message- > From: Juan Quintela [mailto:quint...@redhat.com] > Sent: Wednesday, January 10, 2018 12:51 PM > To: Pavel Dovgalyuk > Cc: 'Pavel Dovgalyuk'; qemu-devel@nongnu.org; m...@redhat.com; > dgilb...@redhat.com; > maria.klimushenk...@ispras.ru; pbonz...@redhat.com >

Re: [Qemu-devel] [PATCH v5 3/7] vhost: Simplify ring verification checks

On Mon, 8 Jan 2018 17:54:50 + "Dr. David Alan Gilbert" wrote: > * Igor Mammedov (imamm...@redhat.com) wrote: > > On Mon, 18 Dec 2017 20:13:36 + > > "Dr. David Alan Gilbert (git)" wrote: > > > > > From: "Dr. David Alan Gilbert"

Re: [Qemu-devel] [Qemu-ppc] [PULL 00/12] ppc-for-2.12 queue 20180108

Hi devs sorry if i enter in the discussion about. gcc gave errors in building this queue. here i paste my build log. https://pastebin.com/fXw2Whrq This is my machine infos and so and so Architecture:ppc64 CPU op-mode(s): 32-bit, 64-bit Byte Order: Big Endian CPU(s):

[Qemu-devel] [PATCH v2 0/2] find_ram_offset cleanups and alignment

These are basically David's patches, with a couple changes for clarity and robustness. Dr. David Alan Gilbert (2): find_ram_offset: Add comments and tracing find_ram_offset: Align ram_addr_t allocation on long boundaries exec.c | 33 ++--- trace-events | 4

Re: [Qemu-devel] [PATCH v4 9/9] qapi: Add NVMe driver options to the schema

On 01/10/2018 03:18 AM, Fam Zheng wrote: > Signed-off-by: Fam Zheng > --- > qapi/block-core.json | 16 +++- > 1 file changed, 15 insertions(+), 1 deletion(-) > > diff --git a/qapi/block-core.json b/qapi/block-core.json > index e94a6881b2..fd6c94454d 100644 > ---

Re: [Qemu-devel] [PATCH v4 3/9] block: Add VFIO based NVMe driver

On 01/10/2018 03:18 AM, Fam Zheng wrote: > This is a new protocol driver that exclusively opens a host NVMe > controller through VFIO. It achieves better latency than linux-aio by > completely bypassing host kernel vfs/block layer. > > +static BlockDriver bdrv_nvme = { > +.format_name

Re: [Qemu-devel] [PATCH v4 3/9] block: Add VFIO based NVMe driver

On 10/01/2018 15:43, Eric Blake wrote: > On 01/10/2018 03:18 AM, Fam Zheng wrote: >> This is a new protocol driver that exclusively opens a host NVMe >> controller through VFIO. It achieves better latency than linux-aio by >> completely bypassing host kernel vfs/block layer. >> >>

Re: [Qemu-devel] [RFC 00/14] Multifd

Juan Quintela wrote: > Hi > > For V10: > - It is a request for comments > > - I changed as suggested from Paolo on KVM forum to send page metadata > over the channels > > - I simplified lots of things > - Added reviews > - it is not finished, in no-particular order: > *

Re: [Qemu-devel] [PATCH] net: Allow hubports to connect to other netdevs

On 10.01.2018 15:47, Paolo Bonzini wrote: > On 10/01/2018 15:32, Thomas Huth wrote: >> QEMU can emulate hubs to connect NICs and netdevs. This is currently >> primarily used for the mis-named 'vlan' feature of the networking >> subsystem. Now the 'vlan' feature has been marked as deprecated, since

Re: [Qemu-devel] [PATCH v2 1/1] io/channel-websock: handle continuous reads without any data

On 01/10/2018 06:22 PM, Daniel P. Berrange wrote: On Wed, Jan 10, 2018 at 06:13:22PM +0300, Edgar Kaziakhmedov wrote: According to the current implementation of websocket protocol in QEMU, qio_channel_websock_handshake_io tries to read handshake from the channel to start communication over

Re: [Qemu-devel] [PATCH v4 00/11] Add make check tests for Migration

On Wed, Jan 10, 2018 at 02:42:52PM +0800, Peter Xu wrote: > On Fri, Jan 05, 2018 at 10:52:35PM +0100, Juan Quintela wrote: > > > > Hi > > > > In v4: > > > > Based-on: 20180105205109.683-1-quint...@redhat.com > > > > Changes: > > - rebase on top on v4 info_migrate patches > > - Tune sleeps to

[Qemu-devel] [PATCH v4 9/9] qapi: Add NVMe driver options to the schema

Signed-off-by: Fam Zheng --- qapi/block-core.json | 16 +++- 1 file changed, 15 insertions(+), 1 deletion(-) diff --git a/qapi/block-core.json b/qapi/block-core.json index e94a6881b2..fd6c94454d 100644 --- a/qapi/block-core.json +++ b/qapi/block-core.json @@ -2237,7

Re: [Qemu-devel] [PATCH v2] hpet: recover timer offset correctly

"Pavel Dovgalyuk" wrote: >> From: Juan Quintela [mailto:quint...@redhat.com] >> "Pavel Dovgalyuk" wrote: >> >> From: Juan Quintela [mailto:quint...@redhat.com] >> If you *don't* use a needed function then please just increase the >> version. You are just

Re: [Qemu-devel] [PATCH v3] hpet: recover timer offset correctly

Pavel Dovgalyuk wrote: > HPET saves its state by calculating the current time and recovers timer > offset using this calculated value. But these calculations include > divisions and multiplications. Therefore the timer state cannot be recovered > precise enough. > This

[Qemu-devel] [PATCH 2/2] find_ram_offset: Align ram_addr_t allocation on long boundaries

From: "Dr. David Alan Gilbert" The dirty bitmaps are built from 'long's and there is fast-path code for synchronising the case where the RAMBlock is aligned to the start of a long boundary. Align the allocation to this boundary to cause the fast path to be used. Offsets

[Qemu-devel] [PATCH] net: Allow hubports to connect to other netdevs

QEMU can emulate hubs to connect NICs and netdevs. This is currently primarily used for the mis-named 'vlan' feature of the networking subsystem. Now the 'vlan' feature has been marked as deprecated, since its name is rather confusing and the users often rather mis-configure their network when

Re: [Qemu-devel] [PATCH v2 0/2] find_ram_offset cleanups and alignment

Hi, This series failed automatic build test. Please find the testing commands and their output below. If you have docker installed, you can probably reproduce it locally. Type: series Message-id: 20180110142515.13242-1-pbonz...@redhat.com Subject: [Qemu-devel] [PATCH v2 0/2] find_ram_offset

Re: [Qemu-devel] [PATCH v4 3/9] block: Add VFIO based NVMe driver

On 01/10/2018 03:18 AM, Fam Zheng wrote: > This is a new protocol driver that exclusively opens a host NVMe > controller through VFIO. It achieves better latency than linux-aio by > completely bypassing host kernel vfs/block layer. > > $rw-$bs-$iodepth linux-aio nvme:// >

Re: [Qemu-devel] [PULL 04/46] contrib: add systemd unit files

On Wed, Dec 20, 2017 at 06:14:16PM +0100, Paolo Bonzini wrote: > This lets distros standardize on how QEMU should install systemd > services for qemu-ga and qemu-pr-helper. > > The qemu-ga unit file comes from Fedora, but I checked that > Debian is using the same path for the virtio-serisal port.

Re: [Qemu-devel] [PATCH] net: Allow hubports to connect to other netdevs

On 10/01/2018 15:32, Thomas Huth wrote: > QEMU can emulate hubs to connect NICs and netdevs. This is currently > primarily used for the mis-named 'vlan' feature of the networking > subsystem. Now the 'vlan' feature has been marked as deprecated, since > its name is rather confusing and the users

Re: [Qemu-devel] [PATCH v4 04/11] tests: Use consistent names and sizes for migration

"Dr. David Alan Gilbert" wrote: > * Peter Xu (pet...@redhat.com) wrote: >> On Wed, Jan 10, 2018 at 09:43:48AM +0100, Juan Quintela wrote: >> > Peter Xu wrote: >> > > On Fri, Jan 05, 2018 at 10:52:39PM +0100, Juan Quintela wrote: >> > >> Signed-off-by: Juan

[Qemu-devel] [PATCH v2 1/1] io/channel-websock: handle continuous reads without any data

According to the current implementation of websocket protocol in QEMU, qio_channel_websock_handshake_io tries to read handshake from the channel to start communication over socket. But this approach doesn't cover scenario when socket was closed while handshaking. Therefore, if G_IO_IN is caught

Re: [Qemu-devel] [PULL v2 00/16] target/xtensa updates

On 09/01/2018 18:44, Peter Maydell wrote: > On 8 January 2018 at 17:49, Max Filippov wrote: >> Hi Peter, >> >> please pull the following batch of updates for the target/xtensa. >> Changes v1->v2: >> - Drop no longer used function option_bits_enabled. >> >> The following

Re: [Qemu-devel] [PATCH v2 1/1] io/channel-websock: handle continuous reads without any data

On Wed, Jan 10, 2018 at 06:24:25PM +0300, Edgar Kaziakhmedov wrote: > > > On 01/10/2018 06:22 PM, Daniel P. Berrange wrote: > > On Wed, Jan 10, 2018 at 06:13:22PM +0300, Edgar Kaziakhmedov wrote: > > > According to the current implementation of websocket protocol in QEMU, > > >

Re: [Qemu-devel] [PATCH] block/iscsi: fix initialization of iTask in iscsi_co_get_block_status

On 08/01/2018 16:27, Peter Lieven wrote: > in case of unaligned requests or on a target that does not support > block provisioning we leave iTask uninitialized and check iTask.task > for NULL later. > > Fixes: e38bc23454ef763deb4405ebdee6a1081aa00bc8 > Cc: qemu-sta...@nongnu.org > Signed-off-by:

[Qemu-devel] [PATCH 1/2] find_ram_offset: Add comments and tracing

From: "Dr. David Alan Gilbert" Add some comments and rename the "end" variable so I can understand the various nested loops. Add some tracing so I can see what they're doing. Signed-off-by: Dr. David Alan Gilbert Message-Id:

Re: [Qemu-devel] [PATCH v2 0/2] find_ram_offset cleanups and alignment

Hi, This series failed build test on s390x host. Please find the details below. Type: series Message-id: 20180110142515.13242-1-pbonz...@redhat.com Subject: [Qemu-devel] [PATCH v2 0/2] find_ram_offset cleanups and alignment === TEST SCRIPT BEGIN === #!/bin/bash # Testing script will be invoked

Re: [Qemu-devel] [PATCH v2 0/2] find_ram_offset cleanups and alignment

* Paolo Bonzini (pbonz...@redhat.com) wrote: > These are basically David's patches, with a couple changes for clarity > and robustness. Yes, those look fine to me. (Patchew seems to be annoyed at the Tracing - I can't see why) Dave > Dr. David Alan Gilbert (2): > find_ram_offset: Add comments

Re: [Qemu-devel] [PATCH v2 0/2] find_ram_offset cleanups and alignment

Hi, This series failed build test on ppc host. Please find the details below. Type: series Message-id: 20180110142515.13242-1-pbonz...@redhat.com Subject: [Qemu-devel] [PATCH v2 0/2] find_ram_offset cleanups and alignment === TEST SCRIPT BEGIN === #!/bin/bash # Testing script will be invoked

Re: [Qemu-devel] [PATCH] qemu: improve hugepage allocation failure message

On 09/01/2018 21:16, Haozhong Zhang wrote: > On 01/09/18 17:37 -0200, Marcelo Tosatti wrote: >> >> Improve hugepage allocation failure message, indicating >> whats happening to the user. >> >> Signed-off-by: Marcelo Tosatti >> >> diff --git a/exec.c b/exec.c >> index

Re: [Qemu-devel] [PATCH v2 0/2] find_ram_offset cleanups and alignment

* Dr. David Alan Gilbert (dgilb...@redhat.com) wrote: > * Paolo Bonzini (pbonz...@redhat.com) wrote: > > These are basically David's patches, with a couple changes for clarity > > and robustness. > > Yes, those look fine to me. > (Patchew seems to be annoyed at the Tracing - I can't see why)

Re: [Qemu-devel] [PATCH v2 0/2] find_ram_offset cleanups and alignment

On 01/10/2018 09:04 AM, Dr. David Alan Gilbert wrote: > * Dr. David Alan Gilbert (dgilb...@redhat.com) wrote: >> * Paolo Bonzini (pbonz...@redhat.com) wrote: >>> These are basically David's patches, with a couple changes for clarity >>> and robustness. >> >> Yes, those look fine to me. >> (Patchew

Re: [Qemu-devel] [PATCH v2 1/1] io/channel-websock: handle continuous reads without any data

On Wed, Jan 10, 2018 at 06:13:22PM +0300, Edgar Kaziakhmedov wrote: > According to the current implementation of websocket protocol in QEMU, > qio_channel_websock_handshake_io tries to read handshake from the > channel to start communication over socket. But this approach > doesn't cover scenario

[Qemu-devel] [PATCH v3] possible_cpus: add CPUArchId::type field

Remove dependency of possible_cpus on 1st CPU instance, which decouples configuration data from CPU instances that are created using that data. Also later it would be used for enabling early cpu to numa node configuration at runtime qmp_query_hotpluggable_cpus() should provide a list of available

[Qemu-devel] [PATCH v3 20/21] SiFive Freedom U500 RISC-V Machine

This provides a RISC-V Board compatible with the the SiFive U500 SDK. The following machine is implemented: - 'sifive_u500'; CLINT, PLIC, UART, device-tree Signed-off-by: Michael Clark --- hw/riscv/sifive_u500.c | 338 +

[Qemu-devel] [PATCH v3 19/21] SiFive Freedom E300 RISC-V Machine

This provides a RISC-V Board compatible with the the SiFive E300 SDK. The following machine is implemented: - 'sifive_e300'; CLINT, PLIC, UART, AON, GPIO, QSPI, PWM Signed-off-by: Michael Clark --- hw/riscv/sifive_e300.c | 232 +

[Qemu-devel] [PATCH v3 21/21] RISC-V Build Infrastructure

This adds RISC-V into the build system enabling the following targets: - riscv32-softmmu - riscv64-softmmu - riscv32-linux-user - riscv64-linux-user This adds defaults configs for RISC-V, enables the build for the RISC-V CPU core, hardware, and Linux User Emulation. The 'qemu-binfmt-conf.sh'

Re: [Qemu-devel] [PATCH 0/7] CPU model updates for CVE-2017-5715 (Spectre variant #2)

Hi, This series failed automatic build test. Please find the testing commands and their output below. If you have docker installed, you can probably reproduce it locally. Type: series Message-id: 20180109154519.25634-1-ehabk...@redhat.com Subject: [Qemu-devel] [PATCH 0/7] CPU model updates for

Re: [Qemu-devel] [PATCH qemu] target/ppc: Yet another fix for KVM-HV HPTE accessors

On Thu, Jan 11, 2018 at 03:08:32PM +1100, Alexey Kardashevskiy wrote: > As stated in the 1ad9f0a464fe commit log, the returned entries are not > a while PTEG. It was not a problem before 1ad9f0a464fe as it would read > a single record assuming it contains a whole PTEG but now the code tries >

Re: [Qemu-devel] [PATCH v2 00/21] RISC-V QEMU Port Submission v2

On Wed, Jan 10, 2018 at 03:46:19PM -0800, Michael Clark wrote: > - RISC-V Instruction Set Manual Volume I: User-Level ISA Version 2.2 > - RISC-V Instruction Set Manual Volume II: Privileged ISA Version 1.9.1 > - RISC-V Instruction Set Manual Volume II: Privileged ISA Version 1.10 Same question as

[Qemu-devel] [PATCH 0/5 v2] preparation for Parallels Disk xml driver

Parallels Desktop and Parallels Cloud Server uses images glued with the bundle description in XML format. This series contains very basic description of this XML files and makes preparations for actual implementation to be followed. Signed-off-by: Edgar Kaziakhmedov

[Qemu-devel] [PATCH 5/5] block/parallels: add backing support to readv/writev

From: Edgar Kaziakhmedov Since parallels format supports backing files, refine readv/writev (allocate_clusters) to redirect read/write requests to a backing file (if cluster is not available in the current bs). Signed-off-by: Edgar Kaziakhmedov

Re: [Qemu-devel] [PATCH] cpu: flush TB cache when loading VMState

On 01/10/2018 05:48 AM, Pavel Dovgalyuk wrote: > Flushing TB cache is required because TBs key in the cache may match > different code which existed in the previous state. > > Signed-off-by: Pavel Dovgalyuk > Signed-off-by: Maria Klimushenkova

[Qemu-devel] [PATCH] ui/sdl2: Ignore key repeats for shortcut keys

Holding down a shortcut key currently continuesly triggers the shortcut event, e.g. holding CTRL-ALT-f continuesly switches between windowed and fullscreen mode, or holding CTRL-ALT-u even crashes QEMU with a segfault. This is ugly, we should rather ignore automatic key repeats when handling the

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