replace with proper header sync
Signed-off-by: Christian Borntraeger
---
linux-headers/asm-s390/kvm.h | 9 -
linux-headers/linux/kvm.h| 5 +++--
2 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/linux-headers/asm-s390/kvm.h
On 17.01.2018 15:18, Christian Borntraeger wrote:
> We need to handle the bpb control on reset and migration. Normally
> stfle.82 is transparent (and the normal guest part works without
> hypervisor activity). To prevent any issues we require full
> host kernel support for this feature.
Actually
On 01/17/2018 08:39 AM, Daniel P. Berrange wrote:
>>>
>>> GCC may or may not warn you about passing NULL for the 'bar'
>>> parameter, but it will none the less assume nothing passes
>>> NULL, and thus remove the 'if (!bar)' conditional during
>>> optimization. IOW, adding nonnull annotations can
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 20180117145029.28736-1-tournier.e...@gmail.com
Subject: [Qemu-devel] [RFC 0/2] Use SDL to create an OpenGL ES context for
virglrenderer.
=== TEST SCRIPT BEGIN ===
it will be used for for 2 purposes, 1st is to
provide to cpu name resolving class for machine 'none'
cpu_parse_cpu_model(machine_class->default_cpu_type, cpu_model)
and later to drop a bunch of ifdefs *-user/main.c that
set default cpu_model.
With the later in mind set it to 'ev67', which is
it will be used for for 2 purposes, 1st is to
provide to cpu name resolving class for machine 'none'
cpu_parse_cpu_model(machine_class->default_cpu_type, cpu_model)
and later to replace a bunch of ifdefs *-user/main.c that
set default cpu_model with cpu type.
With the later in mind set it to
it will be used for for 2 purposes, 1st is to
provide to cpu name resolving class for machine 'none'
cpu_parse_cpu_model(machine_class->default_cpu_type, cpu_model)
and later to drop a bunch of ifdefs *-user/main.c that
set default cpu_model.
Take defaults types from linux-user and use them as
it will be used for for 2 purposes, 1st is to
provide to cpu name resolving class for machine 'none'
cpu_parse_cpu_model(machine_class->default_cpu_type, cpu_model)
and later to drop a bunch of ifdefs *-user/main.c that
set default cpu_model.
Use default values from linux-user for
it will be used for for 2 purposes, 1st is to
provide to cpu name resolving class for machine 'none'
cpu_parse_cpu_model(machine_class->default_cpu_type, cpu_model)
and later to drop a bunch of ifdefs *-user/main.c that
set default cpu_model.
Use default values from linux-user for
it will be used for for 2 purposes, 1st is to
provide to cpu name resolving class for machine 'none'
cpu_parse_cpu_model(machine_class->default_cpu_type, cpu_model)
and later to drop a bunch of ifdefs *-user/main.c that
set default cpu_model.
Use default value from linux-user for
use cpu_create() instead of being removed cpu_generic_init()
Signed-off-by: Igor Mammedov
---
CC: Chris Wulff
CC: Marek Vasut
---
hw/nios2/10m50_devboard.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
it will be used for for 2 purposes, 1st is to
provide to cpu name resolving class for machine 'none'
cpu_parse_cpu_model(machine_class->default_cpu_type, cpu_model)
and later to drop a bunch of ifdefs *-user/main.c that
set default cpu_model.
Use default value from linux-user for
It will be used to drop a bunch of ifdefs *-user/main.c that
set default cpu_model in favor of using type names directly.
For tilegx, *-user defaulted to bogus 'any', however
tilegx_cpu_class_by_name() is ignoring invalid values and always
returns TYPE_TILEGX_CPU, so use it for
On Wed, Jan 17, 2018 at 7:23 AM, Marcel Apfelbaum
wrote:
>
> Hi Peter,
>
>
> On 16/01/2018 16:34, Peter Maydell wrote:
>>
>> On 16 January 2018 at 01:37, Andrey Smirnov
>> wrote:
>>>
>>> Add code needed to get a functional PCI subsytem when
On Wed 17 Jan 2018 05:06:04 PM CET, Eric Blake wrote:
/* allocate a new entry in the l2 cache */
+slice_size = s->l2_slice_size * sizeof(uint64_t);
>>>
>>> Would this read any better if the earlier patch named it
>>> s->l2_slice_entries?
>>
>> I had doubts with this.
Nothing uses or enables them yet.
Signed-off-by: Richard Henderson
---
Makefile.target | 4 +-
tcg/tcg-op.h | 30 +
tcg/tcg-opc.h| 26
tcg/tcg.h| 56 +
tcg/tcg-op-vec.c | 362
Signed-off-by: Richard Henderson
---
accel/tcg/tcg-runtime.h | 5 +
tcg/tcg-op-gvec.h| 2 ++
tcg/tcg-op.h | 1 +
tcg/tcg-opc.h| 1 +
tcg/tcg.h| 1 +
accel/tcg/tcg-runtime-gvec.c | 44
>> And exactly for this reason I tend to nack patch nr 3 (if that is of any
>> weight :) ).
>
> I have communicated the mistake to asll relevant parties - it will not happen
> again
> (famous last words).
An I already saw it happen in the past. (I think I really have to dig
out that one
it will be used for for 2 purposes, 1st is to
provide to cpu name resolving class for machine 'none'
cpu_parse_cpu_model(machine_class->default_cpu_type, cpu_model)
and later to drop a bunch of ifdefs *-user/main.c that
set default cpu_model.
For the later default is set to bogus 'any', and
There aren't any users of the helper left, remove it.
Signed-off-by: Igor Mammedov
---
CC: Richard Henderson
CC: "Emilio G. Cota"
CC: Paolo Bonzini
CC: Eduardo Habkost
CC: "Alex
On 01/17/2018 09:55 AM, Alberto Garcia wrote:
> On Tue 16 Jan 2018 11:26:40 PM CET, Eric Blake wrote:
>>> /* allocate a new entry in the l2 cache */
>>>
>>> +slice_size = s->l2_slice_size * sizeof(uint64_t);
>>
>> Would this read any better if the earlier patch named it
>>
On 17/01/2018 18:12, Andrey Smirnov wrote:
On Wed, Jan 17, 2018 at 7:23 AM, Marcel Apfelbaum
wrote:
Hi Peter,
On 16/01/2018 16:34, Peter Maydell wrote:
On 16 January 2018 at 01:37, Andrey Smirnov
wrote:
Add code needed to get a
On Wed, Jan 17, 2018 at 02:50:15PM +0100, Max Reitz wrote:
> 200 currently fails on tmpfs because it sets cache=none. However,
> without that (and aio=native), the test still works now and it fails
> before Jeff's series (on fc7dbc119e0852a70dc9fa68bb41a318e49e4cd6). So
> we can probably remove
The following changes since commit 8e5dc9ba49743b46d955ec7dacb04e42ae7ada7c:
Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20180116' into
staging (2018-01-16 17:36:39 +)
are available in the Git repository at:
https://github.com/elmarco/qemu.git tags/dump-pull-request
for
16.01.2018 15:54, Vladimir Sementsov-Ogievskiy wrote:
Signed-off-by: Vladimir Sementsov-Ogievskiy
---
qapi/transaction.json | 4 +++
blockdev.c| 79 +++
2 files changed, 83 insertions(+)
diff --git
On 01/17/2018 09:36 AM, Richard Henderson wrote:
> On 01/17/2018 05:18 AM, Philippe Mathieu-Daudé wrote:
>> BTW another useful macro for the static analizer I used is:
>>
>> #define QEMU_FALLTHROUGH __attribute__((fallthrough))
>>
>> It replaces the /* fall through */ comment, i.e.:
>
>
it will be used for for 2 purposes, 1st is to
provide to cpu name resolving class for machine 'none'
cpu_parse_cpu_model(machine_class->default_cpu_type, cpu_model)
and later to drop a bunch of ifdefs *-user/main.c that
set default cpu_model.
With the later in mind set it to 'any', which is
Series is finishing work on generalizing cpu_model parsing
and limiting parts that deal with inconsistent cpu_model
naming to "-cpu" CLI option processing in vl.c/*-user.main.c
and FOO_cpu_class_by_name() callbacks.
It introduces TARGET_DEFAULT_CPU_TYPE which must be defined
by each target and is
it will be used for for 2 purposes, 1st is to
provide to cpu name resolving class for machine 'none'
cpu_parse_cpu_model(machine_class->default_cpu_type, cpu_model)
and later to drop a bunch of ifdefs *-user/main.c that
set default cpu_model.
With the later in mind set it to 'crisv32', which is
it will be used for for 2 purposes, 1st is to
provide to cpu name resolving class for machine 'none'
cpu_parse_cpu_model(machine_class->default_cpu_type, cpu_model)
and later to drop a bunch of ifdefs *-user/main.c that
set default cpu_model.
With the later in mind set it to 'any', which is
Some functions use intN_t arguments, some use uintN_t, some just
used "unsigned". To aid putting function pointers in tables, we
need consistency.
Signed-off-by: Richard Henderson
---
tcg/tcg-op.h | 16
tcg/tcg-op.c | 42
Python GDB support may use Python 2 or 3.
Inferior.read_memory() may return a buffer with Python 2 or a
memoryview with Python 3 (see also
https://sourceware.org/gdb/onlinedocs/gdb/Inferiors-In-Python.html)
The elf.add_vmcoreinfo_note() method expect a byte string, but Python 2
buffer doesn't
Create an OpenGL ES context if the option `-display sdl,gles=on` is set.
Signed-off-by: Elie Tournier
---
include/sysemu/sysemu.h | 1 +
include/ui/sdl2.h | 1 +
ui/sdl2-gl.c| 8 ++--
ui/sdl2.c | 7 +++
vl.c
This commit add an option to the sdl display: `-display sdl,gles=on`
This will allow the user to create an OpenGL ES context.
Signed-off-by: Elie Tournier
---
qemu-options.hx | 5 -
ui/sdl2.c | 1 +
vl.c| 11 ++-
3 files changed, 15
On 01/17/2018 05:18 AM, Philippe Mathieu-Daudé wrote:
> BTW another useful macro for the static analizer I used is:
>
> #define QEMU_FALLTHROUGH __attribute__((fallthrough))
>
> It replaces the /* fall through */ comment, i.e.:
That's unfortunate. Does it help if you use the actual lint
Hi
On Wed, Jan 17, 2018 at 3:59 PM, Eric Blake wrote:
> On 01/17/2018 08:18 AM, Laszlo Ersek wrote:
>> On 01/17/18 12:44, Marc-André Lureau wrote:
>>> Python GDB support may use Python 2 or 3.
>>>
>>> Inferior.read_memory() may return a buffer with Python 2 or a
>>> memoryview
On 12.01.2018 13:54, David Hildenbrand wrote:
> CC == 2 can only happen due to a protection exception, not if memory is
> not available (PGM_ADDRESSING). So all PGM_ADDRESSING exceptions have to
> be forwarded to the guest.
>
> Since the initial definition of TEST PROTECTION, we now read globals
On Tue 16 Jan 2018 05:52:36 PM CET, Anton Nefedov wrote:
>> @@ -299,42 +300,50 @@ static int l2_allocate(BlockDriverState *bs, int
>> l1_index, uint64_t **table)
>>
> [..]>
>> -/* write the l2 table to the file */
>> -BLKDBG_EVENT(bs->file, BLKDBG_L2_ALLOC_WRITE);
>> +
Changes since v9:
* Detect whether __attribute__((vector_size(16))) operations are
supported by the host compiler. This includes the case affecting
ppc64 where gcc-4.8.5 crashes. Note that gcc-7.2 does pass the
test on ppc64.
* Dropped support for vector interleaves and element
On 01/17/2018 09:51 AM, Vladimir Sementsov-Ogievskiy wrote:
>>> I have a script (for managing libvirt guest, but it can be adopted for
>>> qemu or even used for qemu monitor), which allows
>>> me run qmp commands on vms as easy as:
>>>
>>> |qmp VMNAME query-block-jobs or qmp VMNAME
For ARM SVE with VQ=3, we want to be able to dup a scalar
into a v256, use that, and then perform a second operation
with the v256 punned to a v128.
Allow operands to a vector operation be wider than necessary
for the output.
Signed-off-by: Richard Henderson
---
>> +union sysib {
>> +struct sysib_111 sysib_111;
>> +struct sysib_121 sysib_121;
>> +struct sysib_122 sysib_122;
>> +struct sysib_221 sysib_221;
>> +struct sysib_222 sysib_222;
>> +struct sysib_322 sysib_322;
>> +};
>
> Wondering whether you should add some typedefery to
200 currently fails on tmpfs because it sets cache=none. However,
without that (and aio=native), the test still works now and it fails
before Jeff's series (on fc7dbc119e0852a70dc9fa68bb41a318e49e4cd6). So
we can probably remove the aio=native safely, and replace cache=none by
cache=$CACHEMODE.
We need to handle the bpb control on reset and migration. Normally
stfle.82 is transparent (and the normal guest part works without
hypervisor activity). To prevent any issues we require full
host kernel support for this feature.
Signed-off-by: Christian Borntraeger
---
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 20180117141849.65757-1-borntrae...@de.ibm.com
Subject: [Qemu-devel] [PATCH/RFC 0/3] s390x/kvm: implement new
hardware/firmware features
=== TEST SCRIPT BEGIN ===
On 01/17/2018 10:18 AM, Philippe Mathieu-Daudé wrote:
> Some old PoC series I remember after reading
> http://lists.nongnu.org/archive/html/qemu-devel/2018-01/msg03545.html
>
> I had few more changes but then I found the code was harder to read
> so I didn't continue further.
> Only 2 patches are
On 01/17/2018 03:30 PM, David Hildenbrand wrote:
> On 17.01.2018 15:18, Christian Borntraeger wrote:
>> We need to handle the bpb control on reset and migration. Normally
>> stfle.82 is transparent (and the normal guest part works without
>> hypervisor activity). To prevent any issues we require
On Wed, Jan 17, 2018 at 12:44 PM, Marc-André Lureau
wrote:
> Python GDB support may use Python 2 or 3.
>
> Inferior.read_memory() may return a buffer with Python 2 or a
> memoryview with Python 3 (see also
>
On 01/17/2018 03:50 PM, David Hildenbrand wrote:
> On 17.01.2018 15:37, Cornelia Huck wrote:
>> On Wed, 17 Jan 2018 15:18:48 +0100
>> Christian Borntraeger wrote:
>>
>>> We need to handle the bpb control on reset and migration. Normally
>>> stfle.82 is transparent (and
On 01/17/2018 08:18 AM, Laszlo Ersek wrote:
> On 01/17/18 12:44, Marc-André Lureau wrote:
>> Python GDB support may use Python 2 or 3.
>>
>> Inferior.read_memory() may return a buffer with Python 2 or a
>> memoryview with Python 3 (see also
>>
On 01/17/2018 11:56 AM, Eric Blake wrote:
> On 01/17/2018 08:39 AM, Daniel P. Berrange wrote:
>
GCC may or may not warn you about passing NULL for the 'bar'
parameter, but it will none the less assume nothing passes
NULL, and thus remove the 'if (!bar)' conditional during
On 01/17/2018 07:36 AM, Vladimir Sementsov-Ogievskiy wrote:
looks interesting. what about the following naming?
@mode: possible values:
hide - just hide server from new clients, maintain
existing connections,
remove after all
it will be used for for 2 purposes, 1st is to
provide to cpu name resolving class for machine 'none'
cpu_parse_cpu_model(machine_class->default_cpu_type, cpu_model).
and later to drop a bunch of ifdefs *-user/main.c that
set default cpu_model.
LM32 however doesn't have working default in *-user
it will be used for for 2 purposes, 1st is to
provide to cpu name resolving class for machine 'none'
cpu_parse_cpu_model(machine_class->default_cpu_type, cpu_model)
and later to drop a bunch of ifdefs *-user/main.c that
set default cpu_model.
Take default type from linux-user and use it as
Opcodes are added for scalar and vector shifts, but considering the
varied semantics of these do not expose them to the front ends. Do
go ahead and provide them in case they are needed for backend expansion.
Signed-off-by: Richard Henderson
---
On Tue, 16 Jan 2018 23:22:08 +0100
Laurent Vivier wrote:
> This idea has been suggested to me before by Philippe
> Mathieu-Daudé, and recently YunQiang Su has proposed a
> patch to manage the MIPS r6 case.
>
> Based on this, this series tries to clean-up the original
> patch,
On 01/17/2018 09:30 AM, Alberto Garcia wrote:
> On Tue 16 Jan 2018 11:06:21 PM CET, Eric Blake wrote:
>
>>> typedef struct Qcow2ReopenState {
>>> Qcow2Cache *l2_table_cache;
>>> Qcow2Cache *refcount_block_cache;
>>> +int l2_slice_size;
>>
>> Worth a comment?
>> /* Number of entries
On 01/17/2018 04:10 PM, David Hildenbrand wrote:
>>> As soon as we enable bits for CPU models, we guarantee that migration
>>> works. While introducing this change we already had one example where
>>> this was not the case. Not good. (and remember having another such
>>> exception)
>> The point
Signed-off-by: Richard Henderson
---
accel/tcg/tcg-runtime.h | 5 +
tcg/tcg-op-gvec.h| 2 ++
tcg/tcg-op.h | 1 +
tcg/tcg-opc.h| 1 +
tcg/tcg.h| 1 +
accel/tcg/tcg-runtime-gvec.c | 44
On 17.01.2018 17:04, Christian Borntraeger wrote:
>
>
> On 01/17/2018 04:10 PM, David Hildenbrand wrote:
>>
And exactly for this reason I tend to nack patch nr 3 (if that is of any
weight :) ).
>>>
>>> I have communicated the mistake to asll relevant parties - it will not
>>> happen
On 17/01/2018 17:35, Peter Maydell wrote:
On 17 January 2018 at 15:23, Marcel Apfelbaum wrote:
On 16/01/2018 16:34, Peter Maydell wrote:
On 16 January 2018 at 01:37, Andrey Smirnov
I'm not familiar enough with our PCI code to be able to
Signed-off-by: Richard Henderson
---
target/arm/translate-a64.c | 38 +-
1 file changed, 17 insertions(+), 21 deletions(-)
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index e8fc4bc27e..3b113f6b7c 100644
On 01/17/2018 07:25 AM, Daniel P. Berrange wrote:
> On Wed, Jan 17, 2018 at 10:26:36AM +0800, Fam Zheng wrote:
>> On 01/12/2018 08:49 PM, Philippe Mathieu-Daudé wrote:
>>> Hi,
>>>
>>> This series is to be clearer about which upstream version we are using.
>>>
>>> All "FROM distrib:latest" entries
On 01/17/2018 11:04 AM, Daniel P. Berrange wrote:
> On Wed, Jan 17, 2018 at 10:58:21AM -0300, Philippe Mathieu-Daudé wrote:
>> On 01/17/2018 07:25 AM, Daniel P. Berrange wrote:
>>> On Wed, Jan 17, 2018 at 10:26:36AM +0800, Fam Zheng wrote:
On 01/12/2018 08:49 PM, Philippe Mathieu-Daudé wrote:
On 16/1/2018 7:11 PM, Alberto Garcia wrote:
On Tue 16 Jan 2018 02:04:29 PM CET, Anton Nefedov wrote:
iotest 060:
write to the discarded cluster does not trigger COW anymore.
so, break on write_aio event instead, will work for the test
(but write won't fail anymore, so update reference
We want to provide more hw features to guests, namely the new bpb
control as well as other transparent facilities that might be
introduced by firmware updates (e.g. the stfle facility 81).
See the kernel discussion for the KVM side
https://www.spinics.net/lists/kernel/msg2700551.html
Christian
On Wed, 17 Jan 2018 15:18:48 +0100
Christian Borntraeger wrote:
> We need to handle the bpb control on reset and migration. Normally
> stfle.82 is transparent (and the normal guest part works without
> hypervisor activity). To prevent any issues we require full
> host
On Wed, Jan 17, 2018 at 11:33:34AM -0300, Philippe Mathieu-Daudé wrote:
> On 01/17/2018 10:32 AM, Daniel P. Berrange wrote:
> > On Wed, Jan 17, 2018 at 10:18:19AM -0300, Philippe Mathieu-Daudé wrote:
> >> Signed-off-by: Philippe Mathieu-Daudé
> >> ---
> >>
On 01/17/2018 12:10 PM, Benjamin Herrenschmidt wrote:
> On Wed, 2018-01-17 at 10:18 +0100, Cédric Le Goater wrote:
> Also, have we decided how the process of switching between XICS and
> XIVE will work vs. CAS ?
That's how it is described in the architecture. The current choice
Hello everyone,
At Collabora, we are working on adding an OpenGL ES backend on virglrenderer
[1].
I submit these patches as an RFC because our work didn't land in virglrenderer
yet.
Currently, we support OpenGL ES 2.0 on the guest side and OpenGL ES 3.0 on the
host side.
Our plan is to
On Wed, 17 Jan 2018 15:18:49 +0100
Christian Borntraeger wrote:
> From: Halil Pasic
>
> Before cpu-models were introduced to QEMU with 2.8 the so called
> non-hypervisor-managed STFL facilities (aka transparent facilities) were
> handled
On 01/16/2018 05:18 PM, Shaun Reitan wrote:
> This patch replaces the patch I sent yesturday. This one fixes
> a bug in my original code as well as corrects a few styling
> issues. Hopfully this one comes out correct! Sorry for the
> inconvienece.
This paragraph belongs...
>
> When currently
On 17 January 2018 at 15:23, Marcel Apfelbaum wrote:
>
> On 16/01/2018 16:34, Peter Maydell wrote:
>> On 16 January 2018 at 01:37, Andrey Smirnov
>> I'm not familiar enough with our PCI code to be able to review
>> this, I'm afraid. MST and
On Wed, Jan 17, 2018 at 02:50:15PM +0100, Max Reitz wrote:
> 200 currently fails on tmpfs because it sets cache=none. However,
> without that (and aio=native), the test still works now and it fails
> before Jeff's series (on fc7dbc119e0852a70dc9fa68bb41a318e49e4cd6). So
> we can probably remove
it will be used for for 2 purposes, 1st is to
provide to cpu name resolving class for machine 'none'
cpu_parse_cpu_model(machine_class->default_cpu_type, cpu_model)
and later to drop a bunch of ifdefs *-user/main.c that
set default cpu_model.
For the later default is set to bogus 'any', and
*-user were the last users of cpu_init() macro, which were
used to create a cpu instance using cpu_model name.
Now since all targets provide TARGET_DEFAULT_CPU_TYPE,
cpu_init() can be replaced with one call:
cpu_type = cpu_parse_cpu_model(TARGET_DEFAULT_CPU_TYPE, cpu_model)
when '-cpu' CLI
It will be used to drop a bunch of ifdefs *-user/main.c that
set default cpu_model in favor of using type names directly.
Signed-off-by: Igor Mammedov
---
CC: Richard Henderson
---
target/hppa/cpu.h | 1 +
1 file changed, 1 insertion(+)
diff --git
so naming would be in line with other targets and null-machine.c which
uses the later would compile.
Later it also would be used as default for *-user targets which is
currently bogus cpu model 'any', that errors out.
Signed-off-by: Igor Mammedov
---
CC: Max Filippov
17.01.2018 18:23, Eric Blake wrote:
On 01/17/2018 07:36 AM, Vladimir Sementsov-Ogievskiy wrote:
looks interesting. what about the following naming?
@mode: possible values:
hide - just hide server from new clients, maintain
existing connections,
Some functions use intN_t arguments, some use uintN_t, some just
used "unsigned". To aid putting function pointers in tables, we
need consistency.
Signed-off-by: Richard Henderson
---
tcg/tcg-op.h | 16
tcg/tcg-op.c | 42
cpu_init(cpu_model) were replaced by cpu_create(cpu_type) so
no users are left, remove it.
Signed-off-by: Igor Mammedov
---
CC: Richard Henderson (maintainer:Alpha)
CC: Peter Maydell
CC: "Edgar E. Iglesias"
This will be required for storing vector constants.
Signed-off-by: Richard Henderson
---
tcg/tcg-pool.inc.c | 115 +++--
1 file changed, 93 insertions(+), 22 deletions(-)
diff --git a/tcg/tcg-pool.inc.c
On 01/16/2018 02:22 PM, Laurent Vivier wrote:
> M680x0 doesn't support the same set of instructions
> as ColdFire, so we can't use "any" CPU type to execute
> m68020 instructions.
> We select CPU type ("m68040" or "any" for ColdFire)
> according to the ELF header. If we can't, we
> use by default
From: Halil Pasic
Before cpu-models were introduced to QEMU with 2.8 the so called
non-hypervisor-managed STFL facilities (aka transparent facilities) were
handled transparently.
With the advent cpu models, for host model (means -cpu host), we started
fencing these of
On 01/17/18 12:44, Marc-André Lureau wrote:
> Python GDB support may use Python 2 or 3.
>
> Inferior.read_memory() may return a buffer with Python 2 or a
> memoryview with Python 3 (see also
> https://sourceware.org/gdb/onlinedocs/gdb/Inferiors-In-Python.html)
>
> The elf.add_vmcoreinfo_note()
On 16/01/2018 22:05, Mark Cave-Ayland wrote:
On 16/01/18 14:23, Marcel Apfelbaum wrote:
Hi Philippe,
On 16/01/2018 2:54, Philippe Mathieu-Daudé wrote:
CC'ing PCI maintainers.
Hi Mark,
On 01/15/2018 05:58 PM, Mark Cave-Ayland wrote:
This inbuilt device contains a single 4-byte register, of
On 01/17/2018 10:32 AM, Daniel P. Berrange wrote:
> On Wed, Jan 17, 2018 at 10:18:19AM -0300, Philippe Mathieu-Daudé wrote:
>> Signed-off-by: Philippe Mathieu-Daudé
>> ---
>> include/qemu/compiler.h | 2 ++
>> 1 file changed, 2 insertions(+)
>>
>> diff --git
On 01/17/2018 03:37 PM, Cornelia Huck wrote:
> On Wed, 17 Jan 2018 15:18:48 +0100
> Christian Borntraeger wrote:
>
>> We need to handle the bpb control on reset and migration. Normally
>> stfle.82 is transparent (and the normal guest part works without
>> hypervisor
On 17.01.2018 15:37, Cornelia Huck wrote:
> On Wed, 17 Jan 2018 15:18:48 +0100
> Christian Borntraeger wrote:
>
>> We need to handle the bpb control on reset and migration. Normally
>> stfle.82 is transparent (and the normal guest part works without
>> hypervisor
On 01/17/2018 08:47 AM, Marc-André Lureau wrote:
> The following changes since commit 8e5dc9ba49743b46d955ec7dacb04e42ae7ada7c:
>
> Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20180116' into
> staging (2018-01-16 17:36:39 +)
>
> are available in the Git repository at:
>
>
On 01/17/2018 04:10 PM, David Hildenbrand wrote:
>
>>> And exactly for this reason I tend to nack patch nr 3 (if that is of any
>>> weight :) ).
>>
>> I have communicated the mistake to asll relevant parties - it will not
>> happen again
>> (famous last words).
>
> An I already saw it happen
This will be required for storing vector constants.
Signed-off-by: Richard Henderson
---
tcg/tcg-pool.inc.c | 115 +++--
1 file changed, 93 insertions(+), 22 deletions(-)
diff --git a/tcg/tcg-pool.inc.c
On 17 January 2018 at 15:43, Igor Mammedov wrote:
> Series is finishing work on generalizing cpu_model parsing
> and limiting parts that deal with inconsistent cpu_model
> naming to "-cpu" CLI option processing in vl.c/*-user.main.c
> and FOO_cpu_class_by_name() callbacks.
>
Reviewed-by: Alex Bennée
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
target/arm/cpu.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
Changes since v10:
* Squashed a fixup patch which escaped my attention while preparing
the patch set. Ho hum.
Changes since v9:
* Detect whether __attribute__((vector_size(16))) operations are
supported by the host compiler. This includes the case affecting
ppc64 where gcc-4.8.5
Signed-off-by: Richard Henderson
---
target/arm/translate-a64.c | 43 ++-
1 file changed, 38 insertions(+), 5 deletions(-)
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index b97bc9b83c..219cc1e19d
On Wed, Jan 17, 2018 at 10:58:21AM -0300, Philippe Mathieu-Daudé wrote:
> On 01/17/2018 07:25 AM, Daniel P. Berrange wrote:
> > On Wed, Jan 17, 2018 at 10:26:36AM +0800, Fam Zheng wrote:
> >> On 01/12/2018 08:49 PM, Philippe Mathieu-Daudé wrote:
> >>> Hi,
> >>>
> >>> This series is to be clearer
On 17.01.2018 15:18, Christian Borntraeger wrote:
> From: Halil Pasic
>
> Before cpu-models were introduced to QEMU with 2.8 the so called
> non-hypervisor-managed STFL facilities (aka transparent facilities) were
> handled transparently.
>
> With the advent cpu
it will be used for for 2 purposes, 1st is to
provide to cpu name resolving class for machine 'none'
cpu_parse_cpu_model(machine_class->default_cpu_type, cpu_model)
and later to drop a bunch of ifdefs *-user/main.c that
set default cpu_model.
Use default value from linux-user for
it will be used for for 2 purposes, 1st is to
provide to cpu name resolving class for machine 'none'
cpu_parse_cpu_model(machine_class->default_cpu_type, cpu_model)
and later to drop a bunch of ifdefs *-user/main.c that
set default cpu_model.
linux-user defaults to catch all 'any' which is
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