On 02/23/2018 09:00 AM, Peter Maydell wrote:
>> +
>> +uint32_t HELPER(sve_while)(void *vd, uint32_t count, uint32_t pred_desc)
>
> This could really use a comment about what part of the overall
> instruction it's doing.
Ok.
>> +
>> +/* For the helper, compress the different conditions into
This patch moves the settings related migration-test from the
migration-test.c file to a seperate header file. It also renames the
x86-a-b-bootblock.s file extension from .s to .S, allowing gcc
pre-processor to include the C-style header file correctly.
Signed-off-by: Wei Huang
This patch moves the auto detection functions for cross compilation from
roms/Makefile to rules.mak. So the functions can be shared among Makefiles
in QEMU.
Signed-off-by: Wei Huang
---
roms/Makefile | 24 +++-
rules.mak | 15 +++
2 files
This patchset adds a migration test for aarch64. It leverages
Dave Gilbert's recent patch "tests/migration: Add source to PC boot block"
to create a new test case for aarch64.
V4->V5:
* Extract cross compilation detection code into rules.mak for sharing
* Minor comment and code revision in
On 02/23/2018 07:36 AM, Alex Bennée wrote:
> Half-precision flush to zero behaviour is controlled by a separate
> FZ16 bit in the FPCR. To handle this we pass a pointer to
> fp_status_fp16 when working on half-precision operations. The value of
> the presented FPCR is calculated from an amalgam of
Split out the pause command into the actual pause and the wait.
Not every usage presently needs to resubmit a pause request.
The intent with the next commit will be to explicitly disallow
redundant or meaningless pause/resume requests, so the tests
need to become more judicious to reflect that.
If speed is '0' it's not actually "less than" the previous speed.
Kick the job in this case too.
Signed-off-by: John Snow
---
blockjob.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/blockjob.c b/blockjob.c
index 3f52f29f75..24833ef30f 100644
---
This property will be used to opt-in to the new BlockJobs workflow
that allows a tighter, more explicit control over transitions from
one runstate to another.
While we're here, fix up the documentation for block_job_create
a little bit.
Signed-off-by: John Snow
---
blockjob.c
Which commands ("verbs") are appropriate for jobs in which state is
also somewhat burdensome to keep track of.
As of this commit, it looks rather useless, but begins to look more
interesting the more states we add to the STM table.
A recurring theme is that no verb will apply to an 'undefined'
Hi,
This series failed build test on ppcbe host. Please find the details below.
Type: series
Message-id: 20180223235142.21501-1-js...@redhat.com
Subject: [Qemu-devel] [RFC v4 00/21] blockjobs: add explicit job management
=== TEST SCRIPT BEGIN ===
#!/bin/bash
# Testing script will be invoked
On 02/22/2018 04:11 PM, Michael Clark wrote:
> QEMU RISC-V Emulation Support (RV64GC, RV32GC)
>
> This is hopefully the "fix remaining issues in-tree" release.
FWIW, I'm happy with this.
For those patches that I haven't given an explicit R-b, e.g. most of hw/, I
didn't see anything obviously
On 02/22/2018 03:00 AM, Andrew Jones wrote:
> On Wed, Feb 21, 2018 at 10:44:17PM -0600, Wei Huang wrote:
>> This patch adds migration test support for aarch64. The test code, which
>> implements the same functionality as x86, is booted as a kernel in qemu.
>> Here are the design choices we make
On 02/23/2018 07:36 AM, Alex Bennée wrote:
> @@ -168,6 +168,7 @@ typedef struct {
> * Qn = regs[n].d[1]:regs[n].d[0]
> * Dn = regs[n].d[0]
> * Sn = regs[n].d[0] bits 31..0
> + * Hn = regs[n].d[0] bits 15..0 for even n, and bits 31..16 for odd n
Everything past here --^ is
The state transition table has mostly been implied. We're about to make
it a bit more complex, so let's make the STM explicit instead.
Perform state transitions with a function that for now just asserts the
transition is appropriate.
Transitions:
Undefined -> Created: During job initialization.
Add a new state ABORTING.
This makes transitions from normative states to error states explicit
in the STM, and serves as a disambiguation for which states may complete
normally when normal end-states (CONCLUDED) are added in future commits.
Notably, Paused/Standby jobs do not transition
We're about to add several new states, and booleans are becoming
unwieldly and difficult to reason about. It would help to have a
more explicit bookkeeping of the state of blockjobs. To this end,
add a new "status" field and add our existing states in a redundant
manner alongside the bools they
On 02/23/2018 07:36 AM, Alex Bennée wrote:
> case 0x9: /* FMUL, FMULX */
> -if (!extract32(size, 1, 1)) {
> +if (size == 1 ||
> +(size < 2 && !arm_dc_feature(s, ARM_FEATURE_V8_FP16))) {
> unallocated_encoding(s);
You get to drop the check here...
> +
On 02/23/2018 07:36 AM, Alex Bennée wrote:
> This adds the full range of half-precision floating point to integral
> instructions.
>
> Signed-off-by: Alex Bennée
>
> ---
> v3
> - fix re-base conflicts
> - move comment to previous commit
> - don't double test
On 02/23/2018 07:36 AM, Alex Bennée wrote:
> Only one half-precision instruction has been added to this group.
>
> Signed-off-by: Alex Bennée
>
> ---
> v2
> - checkpatch fixes
> v3
> - use vfp_expand_imm
> ---
> target/arm/translate-a64.c | 35
Move threads and other common TPM test code into tpm-emu.c.
Signed-off-by: Stefan Berger
Reviewed-by: Marc-André Lureau
---
tests/Makefile.include | 2 +-
tests/tpm-crb-test.c | 174 +
This patch series adds a test case for the TPM TIS interface.
Stefan
The following changes since commit a6e0344fa0e09413324835ae122c4cadd7890231:
Merge remote-tracking branch 'remotes/kraxel/tags/ui-20180220-pull-request'
into staging (2018-02-20 14:05:00 +)
are available in the git
I see this happening in ppc64le and x86_64 with QEMU
v2.11.0-1684-ga6e0344fa0. The keystrokes are being sent to tty1:
in x86_64:
./v2.11.0-1684-ga6e0344fa0/bin/qemu-system-x86_64 -enable-kvm -m 512
-kernel vmlinuz -initrd initramfs.img -chardev
serial,id=s1,path=/dev/pts/10 -mon chardev=s1 -qmp
Add a new state that specifically demarcates when we begin to permanently
demolish a job after it has performed all work. This makes the transition
explicit in the STM table and highlights conditions under which a job may
be demolished.
Transitions:
Created -> Null: Early failure event before
For jobs that have reached their CONCLUDED state, prior to having their
last reference put down (meaning jobs that have completed successfully,
unsuccessfully, or have been canceled), allow the user to dismiss the
job's lingering status report via block-job-dismiss.
This gives management APIs the
The completed_single function is getting a little mucked up with
checking to see which callbacks exist, so let's factor them out.
Signed-off-by: John Snow
---
blockjob.c | 35 ++-
1 file changed, 26 insertions(+), 9 deletions(-)
diff --git
Expose the "manual" property via QAPI for the backup-related jobs.
As of this commit, this allows the management API to request the
"concluded" and "dismiss" semantics for backup jobs.
Signed-off-by: John Snow
---
blockdev.c | 19 ---
Reviewed-by: jiewen@intel.com
> -Original Message-
> From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of
> marcandre.lur...@redhat.com
> Sent: Friday, February 23, 2018 9:23 PM
> To: edk2-de...@lists.01.org
> Cc: qemu-devel@nongnu.org; javi...@redhat.com;
On 02/23/2018 07:36 AM, Alex Bennée wrote:
> Neither of these operations alter the floating point status registers
> so we can do a pure bitwise operation, either squashing any sign
> bit (ABS) or inverting it (NEG).
>
> Signed-off-by: Alex Bennée
>
> ---
> v3
> -
On 02/22/2018 04:11 PM, Michael Clark wrote:
> The RISC-V HTIF (Host Target Interface) console device requires access
> to the symbol table to locate the 'tohost' and 'fromhost' symbols.
>
> Signed-off-by: Michael Clark
> ---
> hw/core/loader.c | 18 --
>
On 02/22/2018 04:11 PM, Michael Clark wrote:
> HTIF (Host Target Interface) provides console emulation for QEMU. HTIF
> allows identical copies of BBL (Berkeley Boot Loader) and linux to run
> on both Spike and QEMU. BBL provides HTIF console access via the
> SBI (Supervisor Binary Interface) and
This patch adds migration test support for aarch64. The test code, which
implements the same functionality as x86, is booted as a kernel in qemu.
Here are the design choices we make for aarch64:
* We choose this -kernel approach because aarch64 QEMU doesn't provide a
built-in fw like x86
The x86 boot block header currently is generated with a shell script.
To better support other CPUs (e.g. aarch64), we convert the script
into Makefile. This allows us to 1) support cross-compilation easily,
and 2) avoid creating a script file for every architecture.
Signed-off-by: Wei Huang
Assert only the lower cs on bus 0 and upper cs on bus 1 when both buses and
chip selects are enabled (e.g reading/writing with stripe).
Signed-off-by: Francisco Iglesias
---
hw/ssi/xilinx_spips.c | 41 +
1 file changed, 37
This series seeks to address two distinct but closely related issues
concerning the job management API.
(1) For jobs that complete when a monitor is not attached and receiving
events or notifications, there's no way to discern the job's final
return code. Jobs must remain in the query
add a new state "CONCLUDED" that identifies a job that has ceased all
operations. The wording was chosen to avoid any phrasing that might
imply success, error, or cancellation. The task has simply ceased all
operation and can never again perform any work.
("finished", "done", and "completed"
On 02/23/2018 07:36 AM, Alex Bennée wrote:
> I re-use the existing handle_2misc_fcmp_zero handler and tweak it
> slightly to deal with the half-precision case.
>
> Signed-off-by: Alex Bennée
>
> ---
> v3
> - use size directly wuth read/write_vec_element
> - drop
On 02/23/2018 09:25 AM, Peter Maydell wrote:
> On 17 February 2018 at 18:22, Richard Henderson
> wrote:
>> Signed-off-by: Richard Henderson
>> ---
>> target/arm/helper-sve.h| 14 +++
>> target/arm/helper.h| 19
Move the TPM TIS related register and flag #defines into
include/hw/acpi/tpm.h for access by the test case.
Write a test case that covers the TIS functionality.
Add the tests cases to the MAINTAINERS file.
Signed-off-by: Stefan Berger
Reviewed-by: Marc-André Lureau
On Sat, Feb 24, 2018 at 10:31 AM, Richard Henderson <
richard.hender...@linaro.org> wrote:
> On 02/22/2018 04:11 PM, Michael Clark wrote:
> > QEMU RISC-V Emulation Support (RV64GC, RV32GC)
> >
> > This is hopefully the "fix remaining issues in-tree" release.
>
> FWIW, I'm happy with this.
>
> For
On 02/23/2018 11:05 AM, Kevin Wolf wrote:
Am 23.02.2018 um 17:43 hat Eric Blake geschrieben:
OFFSET_VALID | DATA might be excusable because I can see that it's
convenient that a protocol driver refers to itself as *file instead of
returning NULL there and then the offset is valid (though it
Signed-off-by: John Snow
---
tests/qemu-iotests/056 | 195 +
tests/qemu-iotests/056.out | 4 +-
2 files changed, 197 insertions(+), 2 deletions(-)
diff --git a/tests/qemu-iotests/056 b/tests/qemu-iotests/056
index
Presently, even if a job is canceled post-completion as a result of
a failing peer in a transaction, it will still call .commit because
nothing has updated or changed its return code.
The reason why this does not cause problems currently is because
backup's implementation of .commit checks for
Some jobs upon finalization may need to perform some work that can
still fail. If these jobs are part of a transaction, it's important
that these callbacks fail the entire transaction.
We allow for a new callback in addition to commit/abort/clean that
allows us the opportunity to have fairly
For jobs that are stuck waiting on others in a transaction, it would
be nice to know that they are no longer "running" in that sense, but
instead are waiting on other jobs in the transaction.
Jobs that are "waiting" in this sense cannot be meaningfully altered
any longer as they have left their
On 02/23/2018 07:36 AM, Alex Bennée wrote:
> This includes FMAXNMP, FADDP, FMAXP, FMINNMP, FMINP.
>
> Signed-off-by: Alex Bennée
>
> ---
> v2
> - checkpatch fixes
> ---
> target/arm/translate-a64.c | 208
> +
> 1 file
On 02/23/2018 07:36 AM, Alex Bennée wrote:
> It looks like the ARM ARM has simplified the pseudo code for the
> calculation which is done on a fixed point 9 bit integer maths. So
> while adding f16 we can also clean this up to be a little less heavy
> on the floating point and just return the
On 02/23/2018 01:59 AM, Peter Maydell wrote:
> On 22 February 2018 at 20:14, Richard Henderson
> wrote:
>> On 02/22/2018 08:41 AM, Peter Maydell wrote:
>>> On 16 February 2018 at 21:56, Richard Henderson
>>> wrote:
>
+if
model all independent jobs as single job transactions.
It's one less case we have to worry about when we add more states to the
transition machine. This way, we can just treat all job lifetimes exactly
the same. This helps tighten assertions of the STM graph and removes some
conditionals that
This allows us to easily force the option for all jobs belonging
to a transaction to ensure consistency with how all those jobs
will be handled.
This is purely a convenience.
Signed-off-by: John Snow
---
blockdev.c| 7 ++-
blockjob.c| 10
On 02/23/2018 03:59 AM, Alex Bennée wrote:
>> Not using float16_eq etc?
>
> These don't actually exist.
Ah.
> But I guess we could make stubs for them
> based on the generic float_compare support. But would it buy us much?
...
>>> +return ADVSIMD_CMPRES(compare == float_relation_greater ||
Use 8 dummy cycles (4 dummy bytes) with the QIOR/QIOR4 commands in legacy mode
for matching what is expected by Micron (Numonyx) flashes (the default target
flash type of the QSPI).
Signed-off-by: Francisco Iglesias
Tested-by: Alistair Francis
Hi,
The first patch in this series attempts to correct the slave selection when
using the striping functionality in the QSPI. The second patch in the series
updates the QIOR/QIOR4 commands to use 8 dummy cycles in the QSPI for matching
Micron (Numonyx) flashes (the default target flash type of
Instead of automatically transitioning from PENDING to CONCLUDED, gate
the .prepare() and .commit() phases behind an explicit acknowledgement
provided by the QMP monitor if manual completion mode has been requested.
This allows us to perform graph changes in prepare and/or commit so that
graph
Simply apply a function transaction-wide.
A few more uses of this in forthcoming patches.
Signed-off-by: John Snow
---
blockjob.c | 24 +++-
1 file changed, 15 insertions(+), 9 deletions(-)
diff --git a/blockjob.c b/blockjob.c
index 431ce9c220..8f02c03880
For jobs utilizing the new manual workflow, we intend to prohibit
them from modifying the block graph until the management layer provides
an explicit ACK via block-job-finalize to move the process forward.
To distinguish this runstate from "ready" or "waiting," we add a new
"pending" event.
For
On 02/23/2018 07:36 AM, Alex Bennée wrote:
> This includes FMOV, FABS, FNEG, FSQRT and FRINT[NPMZAXI]. We re-use
> existing helpers to achieve this.
>
> Signed-off-by: Alex Bennée
>
> ---
> v3
> - make fabs a bitwise operation
> - use read_vec_element_i32 to read
Hi,
This series failed build test on s390x host. Please find the details below.
N/A. Internal error while reading log file
---
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Changed KVM_CPUID_FLAG_SIGNIFCANT_INDEX to KVM_CPUID_FLAG_SIGNIFICANT_INDEX
Signed-off-by: Babu Moger
---
linux-headers/asm-x86/kvm.h | 2 +-
target/i386/kvm.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/linux-headers/asm-x86/kvm.h
Remove generic non-intel check while validating hyperthreading support.
Certain AMD CPUs can support hyperthreading now.
CPU family with TOPOEXT feature can support hyperthreading now.
Signed-off-by: Babu Moger
---
target/i386/cpu.c | 15 +--
1 file changed, 9
Enable TOPOEXT feature on EPYC CPU. This is required to support
hyperthreading on VM guests. Also extend xlevel to 0x801E.
These are supported via CPUID_8000_001E extended functions.
Signed-off-by: Babu Moger
---
target/i386/cpu.c | 5 +++--
1 file changed, 3
From: Stanislav Lanci
Populate threads/core_id/apic_ids/socket_id when CPUID_EXT3_TOPOEXT
feature is supported. This is required to support hyperthreading
feature on AMD CPUS. These are supported via CPUID_8000_001E extended
functions.
Signed-off-by: Stanislav Lanci
On 02/20/2018 10:03 AM, Peter Maydell wrote:
> Add a function load_ramdisk_as() which behaves like the existing
> load_ramdisk() but allows the caller to specify the AddressSpace
> to use. This matches the pattern we have already for various
> other loader functions.
>
> Signed-off-by: Peter
On 02/23/2018 06:59 AM, Laurent Vivier wrote:
> Using local m68k floatx80_getman(), floatx80_getexp(), floatx80_scale()
> [copied from previous:
> Written by Andreas Grabher for Previous, NeXT Computer Emulator.]
>
> Signed-off-by: Laurent Vivier
> ---
>
These series enable TOPOEXT feature on AMD CPU. These are required to support
hyperthreading on kvm guests. Addresses the issues reported by these bugs
https://bugzilla.redhat.com/show_bug.cgi?id=1481253
https://bugs.launchpad.net/qemu/+bug/1703506
v2:
Fixed few more minor issues per Gary Hooks
On 02/20/2018 10:03 AM, Peter Maydell wrote:
> Instead of loading guest images to the system address space, use the
> CPU's address space. This is important if we're trying to load the
> file to memory or via an alias memory region that is provided by an
> SoC object and thus not mapped into the
On 02/23/2018 06:59 AM, Laurent Vivier wrote:
> Using a local m68k floatx80_mod()
> [copied from previous:
> Written by Andreas Grabher for Previous, NeXT Computer Emulator.]
>
> The quotient byte of the FPSR is updated with
> the result of the operation.
>
> Signed-off-by: Laurent Vivier
Hi Fam,
On 02/23/18 17:17 -0800, no-re...@patchew.org wrote:
> Hi,
>
> This series failed build test on s390x host. Please find the details below.
>
> N/A. Internal error while reading log file
What does this message mean? Where can I get the log file?
Thanks,
Haozhong
Hi,
This series failed build test on s390x host. Please find the details below.
N/A. Internal error while reading log file
---
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Please send your feedback to patchew-de...@freelists.org
On 02/23/2018 06:59 AM, Laurent Vivier wrote:
> @@ -4550,8 +4556,8 @@ int64_t floatx80_to_int64(floatx80 a, float_status
> *status)
> if ( shiftCount ) {
> float_raise(float_flag_invalid, status);
> if (! aSign
> - || (( aExp == 0x7FFF )
Hi Igor and all,
> -Original Message-
> From: Igor Mammedov [mailto:imamm...@redhat.com]
> Sent: Thursday, February 8, 2018 7:30 PM
> To: Tan, Jianfeng
> Cc: Paolo Bonzini; Jason Wang; Maxime Coquelin; qemu-devel@nongnu.org;
> Michael S . Tsirkin
> Subject: Re: [Qemu-devel] [RFC] exec:
On 02/23/2018 07:36 AM, Alex Bennée wrote:
> This covers the encoding group:
>
> Advanced SIMD scalar three same FP16
>
> As all the helpers are already there it is simply a case of calling the
> existing helpers in the scalar context.
>
> Signed-off-by: Alex Bennée
>
On 02/23/2018 06:59 AM, Laurent Vivier wrote:
> Move fpu/softfloat-macros.h to include/fpu/
>
> Export floatx80 functions to be used by target floatx80
> specific implementations.
>
> Exports:
> propagateFloatx80NaN(), extractFloatx80Frac(),
> extractFloatx80Exp(), extractFloatx80Sign(),
>
From: Stanislav Lanci
Adds information about cache size and topology from cpuid 0x801D leaf
for different cache types on AMD processors.
Signed-off-by: Stanislav Lanci
Signed-off-by: Babu Moger
---
target/i386/cpu.c | 76
> -Original Message-
> From: Tan, Jianfeng
> Sent: Saturday, February 24, 2018 11:08 AM
> To: 'Igor Mammedov'
> Cc: Paolo Bonzini; Jason Wang; Maxime Coquelin; qemu-devel@nongnu.org;
> Michael S . Tsirkin
> Subject: RE: [Qemu-devel] [RFC] exec: eliminate ram naming issue as
> migration
>
On 02/23/2018 07:36 AM, Alex Bennée wrote:
> Now that the softfloat re-factoring has been merged I re-based this
> directly from master. Alternatively you can grab the full tree from:
>
> https://github.com/stsquad/qemu/tree/arm-fp16-v3
>
> I've tested with the following RISU test binaries:
>
Hi,
This series failed build test on ppcbe host. Please find the details below.
Type: series
Message-id: 20180218144021.11641-1-vinc...@bernat.im
Subject: [Qemu-devel] [RFC, PATCH, v1] hw/audio/opl2lpt: add support for OPL2LPT
=== TEST SCRIPT BEGIN ===
#!/bin/bash
# Testing script will be
On 02/20/2018 10:03 AM, Peter Maydell wrote:
> Instead of loading kernels, device trees, and the like to
> the system address space, use the CPU's address space. This
> is important if we're trying to load the file to memory or
> via an alias memory region that is provided by an SoC
> object and
Hi,
This series failed docker-mingw@fedora build test. Please find the testing
commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.
Type: series
Message-id: 1518702707-7077-1-git-send-email-vsement...@virtuozzo.com
Subject: [Qemu-devel] [PATCH
Hi,
This series failed docker-quick@centos6 build test. Please find the testing
commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.
Type: series
Message-id: 20180220180325.29818-1-peter.mayd...@linaro.org
Subject: [Qemu-devel] [PATCH 00/19] Add
Public bug reported:
There is some instructions translation error on target i386 in many versions,
such as 2.11.1, 2.10.2, 2.7.1 and so on.
The error translation instructions include les, lds. I has got a patch, but I
have no idea how to apply it.
** Affects: qemu
Importance: Undecided
On 23 February 2018 at 16:49, Daniel P. Berrangé wrote:
> If it is going to live in QEMU source tree, then avoiding introducing a new
> license is desirable.
It isn't -- risu has its own repository.
thanks
-- PMM
Eric Blake writes:
> On 02/11/2018 03:35 AM, Markus Armbruster wrote:
>> Whenever qapi-schema.json changes, we run six programs eleven times to
>> update eleven files. Similar for qga/qapi-schema.json. This is
>> silly. Replace the six programs by a single program that
Marc-Andre Lureau writes:
> Hi
>
> On Mon, Feb 12, 2018 at 8:48 PM, Eric Blake wrote:
>> On 02/11/2018 03:35 AM, Markus Armbruster wrote:
>>>
>>> A massive number of objects depends on QAPI-generated headers. In my
>>> "build everything" tree, it's
On 17 February 2018 at 18:22, Richard Henderson
wrote:
> Signed-off-by: Richard Henderson
> ---
> target/arm/helper-sve.h| 14 +++
> target/arm/helper.h| 19 ++
> target/arm/translate-sve.c | 41
On 02/23/2018 05:08 AM, Peter Maydell wrote:
>> +# SVE unary bit operations (predicated)
>> +# Note esz != 0 for FABS and FNEG.
>> +CLS0100 .. 011 000 101 ... . . @rd_pg_rn
>> +CLZ0100 .. 011 001 101 ... . . @rd_pg_rn
>> +CNT_zpz
Michael Roth writes:
> Quoting Markus Armbruster (2018-02-11 03:35:52)
>> Signed-off-by: Markus Armbruster
>> Reviewed-by: Marc-André Lureau
>> ---
>> scripts/qapi/common.py | 15 +--
>> 1 file changed, 9
On 02/23/2018 05:48 AM, Peter Maydell wrote:
>> +void HELPER(sve_fexpa_d)(void *vd, void *vn, uint32_t desc)
>> +{
>> +static const uint64_t coeff[] = {
>> +0x0, 0x02C9A3E778061, 0x059B0D3158574, 0x0874518759BC8,
>> +0x0B5586CF9890F, 0x0E3EC32D3D1A2,
On 02/23/2018 06:18 AM, Peter Maydell wrote:
>> +mm = (mm & 0xff) * (-1ull / 0xff);
>
> What is this expression doing? I guess from context that it's
> replicating the low 8 bits of mm across the 64-bit value,
> but this is too obscure to do without a comment or wrapping
> it in a helper
Eric Blake writes:
> On 02/11/2018 03:35 AM, Markus Armbruster wrote:
>> The include directive permits modular QAPI schemata, but the generated
>> code is monolithic all the same. To permit generating modular code,
>> the front end needs to pass more information on inclusions
Michael Roth writes:
> Quoting Markus Armbruster (2018-02-11 03:35:57)
>> The use of QAPIGen is rather shallow so far: most of the output
>> accumulation is not converted. Take the next step: convert output
>> accumulation in the code-generating visitor classes.
Eric Blake writes:
> On 02/11/2018 03:35 AM, Markus Armbruster wrote:
>> Linking code from multiple separate QAPI schemata into the same
>> program is possible, but involves some weirdness around built-in
>> types:
>>
>> * We generate code for built-in types into .c only with
On 02/23/2018 06:24 AM, Peter Maydell wrote:
> On 17 February 2018 at 18:22, Richard Henderson
> wrote:
>> Signed-off-by: Richard Henderson
>> ---
>> target/arm/helper-sve.h| 2 ++
>> target/arm/sve_helper.c| 81
>>
Eric Blake writes:
> On 02/11/2018 03:36 AM, Markus Armbruster wrote:
>> Move qapi-schema.json to qapi/, so it's next to its modules, and all
>> files get generated to qapi/, not just the ones generated for modules.
>>
>> Consistently name the generated files qapi-MODULE.EXT:
On 23 February 2018 at 11:29, Mark Cave-Ayland
wrote:
> All memory region ROM images have a base address of 0 which causes the
> overlapping
> address check to fail if more than one memory region ROM image is present, or
> an
> existing ROM image is loaded at
On 17 February 2018 at 18:22, Richard Henderson
wrote:
> Signed-off-by: Richard Henderson
> ---
> target/arm/helper-sve.h| 2 +
> target/arm/sve_helper.c| 31
> target/arm/translate-sve.c | 92
>
Am 23.02.2018 um 17:43 hat Eric Blake geschrieben:
> > OFFSET_VALID | DATA might be excusable because I can see that it's
> > convenient that a protocol driver refers to itself as *file instead of
> > returning NULL there and then the offset is valid (though it would be
> > pointless to actually
Am 23.02.2018 um 17:43 hat Max Reitz geschrieben:
> On 2018-02-23 17:19, Kevin Wolf wrote:
> > Am 23.02.2018 um 00:25 hat Max Reitz geschrieben:
> >> On 2018-02-21 14:53, Kevin Wolf wrote:
> >>> With the conversion to a QAPI options object, the function is now
> >>> prepared to be used in a
On 17 February 2018 at 18:22, Richard Henderson
wrote:
> Signed-off-by: Richard Henderson
> ---
> target/arm/translate-sve.c | 35 +++
> target/arm/sve.decode | 8
> 2 files changed, 43
Michael Roth writes:
> Quoting Markus Armbruster (2018-02-11 03:35:43)
>> These classes encapsulate accumulating and writing output.
>>
>> Convert C code generation to QAPIGenC and QAPIGenH. The conversion is
>> rather shallow: most of the output accumulation is not
Michael Roth writes:
> Quoting Markus Armbruster (2018-02-11 03:35:47)
>> argparse is nicer to use than getopt, and gives us --help almost for
>> free.
>>
>> Signed-off-by: Markus Armbruster
>> ---
>> scripts/qapi-gen.py| 48
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