It seems that the following commit for libvirt fixed the problem.
https://github.com/libvirt/libvirt/blob/960326237764f8970250a3608e7b2b880e030715/src/qemu/qemu_migration.c
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.
On Wed, 8 Aug 2018 11:33:23 +0200
Auger Eric wrote:
> Hi Igor,
>
> On 07/18/2018 03:00 PM, Igor Mammedov wrote:
> [...]
> >>>
> >>> I think Igor wants one contiguous region for RAM, where additional
> >>> space can be reserved for hotplugging.
> >> This is not compliant with 2012 ARM white p
On Thu 09 Aug 2018 12:11:36 AM CEST, Leonid Bloch wrote:
> The caches are now recalculated upon image resizing. This is done
> because the new default behavior of assigning L2 cache relatively to
> the image size, implies that the cache will be adapted accordingly
> after an image resize.
>
> Signe
On Wed, 8 Aug 2018 11:44:14 +0200
Auger Eric wrote:
> Hi Igor,
>
> On 07/18/2018 04:04 PM, Igor Mammedov wrote:
> > On Tue, 3 Jul 2018 09:19:51 +0200
> > Eric Auger wrote:
> >
> >> From: Shameer Kolothum
> >>
> >> We introduce an helper to create a memory node.
> >>
> >> Signed-off-by: Eri
On 06/08/2018 16:33, Emanuele Giuseppe Esposito wrote:
> qgraph API for the qtest driver framework
>
> This series of patches introduce a different qtest driver
> organization, viewing machines, drivers and tests as node in a
> graph, each having one or multiple edges relations.
>
> The idea is t
On Thu 09 Aug 2018 12:11:34 AM CEST, Leonid Bloch wrote:
> Signed-off-by: Leonid Bloch
I have already reviewed this patch in the previous version of the series
(same with patch 5 I think).
If you have to resend a patch that has already been reviewed please add
the "Reviewed-by: ..." line next to
On 8/9/18 12:00 PM, Alberto Garcia wrote:
On Thu 09 Aug 2018 12:11:34 AM CEST, Leonid Bloch wrote:
Signed-off-by: Leonid Bloch
I have already reviewed this patch in the previous version of the series
(same with patch 5 I think).
If you have to resend a patch that has already been reviewed pl
On Thu, 2 Aug 2018 10:39:22 -0300
Eduardo Habkost wrote:
> On Thu, Aug 02, 2018 at 12:09:37PM +0200, Igor Mammedov wrote:
> > On Tue, 31 Jul 2018 12:03:22 -0300
> > Eduardo Habkost wrote:
> >
> > > On Tue, Jul 31, 2018 at 11:53:40AM +0200, Igor Mammedov wrote:
> > > > On Mon, 30 Jul 2018 17
Richard Henderson writes:
> Used the wrong temporary in the computation of subtractive overflow.
>
> Cc: qemu-sta...@nongnu.org (3.0.1)
> Tested-by: Laurent Desnogues
> Reviewed-by: Laurent Desnogues
> Reported-by: Laurent Desnogues
> Signed-off-by: Richard Henderson
Reviewed-by: Alex Benn
On Wed, Aug 08, 2018 at 04:23:04PM -0600, Alex Williamson wrote:
> So again, I think this comes down to new iommu driver support and new
> iommu apis and new vfio apis to enable some sort of atomic update
> interface,
Oh absolutely. My point is some guest OS can start using atomic updates
at any t
On 08/09/2018 10:57 AM, Paolo Bonzini wrote:
On 06/08/2018 16:33, Emanuele Giuseppe Esposito wrote:
qgraph API for the qtest driver framework
This series of patches introduce a different qtest driver
organization, viewing machines, drivers and tests as node in a
graph, each having one or mul
On Wed, Aug 08, 2018 at 11:45:43AM +0800, Peter Xu wrote:
> On Wed, Aug 08, 2018 at 12:58:32AM +0300, Michael S. Tsirkin wrote:
> > At least with VTD, it seems entirely possible to change e.g. a PMD
> > atomically to point to a different set of PTEs, then flush.
> > That will allow removing memory
On Thu 09 Aug 2018 12:11:37 AM CEST, Leonid Bloch wrote:
> The default cache-clean-interval is set to 10 minutes, in order to lower
> the overhead of the qcow2 caches (before the default was 0, i.e.
> disabled).
>
> Signed-off-by: Leonid Bloch
> --- a/qapi/block-core.json
> +++ b/qapi/block-core.
On Thu, Aug 09, 2018 at 12:23:43PM +0300, Michael S. Tsirkin wrote:
> On Wed, Aug 08, 2018 at 11:45:43AM +0800, Peter Xu wrote:
> > On Wed, Aug 08, 2018 at 12:58:32AM +0300, Michael S. Tsirkin wrote:
> > > At least with VTD, it seems entirely possible to change e.g. a PMD
> > > atomically to point
On 09/08/2018 11:20, Emanuele wrote:
>>
> Why this? Shouldn't it be:
>
> if (g_strcmp0(old_path, path)) {
> qtest_end(); /* handles global_qtest = NULL */
> g_free(old_path); /* handles NULL */
> old_path = path;
> global_qtest = qtest_start(path);
> } else
Ye
Richard Henderson writes:
> The pseudocode for this operation is an increment + compare loop,
> so comparing <= the maximum integer produces an all-true predicate.
>
> Rather than bound in both the inline code and the helper, pass the
> helper the number of predicate bits to set instead of the
Hi Igor,
On 08/09/2018 10:45 AM, Igor Mammedov wrote:
> On Wed, 8 Aug 2018 11:33:23 +0200
> Auger Eric wrote:
>
>> Hi Igor,
>>
>> On 07/18/2018 03:00 PM, Igor Mammedov wrote:
>> [...]
>
> I think Igor wants one contiguous region for RAM, where additional
> space can be reserved for ho
On Wed, 8 Aug 2018 23:17:48 +0300
"Michael S. Tsirkin" wrote:
> On Wed, Aug 08, 2018 at 05:15:48PM +0200, Igor Mammedov wrote:
> > Reuse CPU hotplug IO registers for passing a CST entry
> > containing package for shalowest C1 using mwait and
> > read it out in guest with new CCST AML method.
>
Richard Henderson writes:
> Cc: qemu-sta...@nongnu.org (3.0.1)
> Signed-off-by: Richard Henderson
Reviewed-by: Alex Bennée
> ---
> target/arm/sve_helper.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/target/arm/sve_helper.c b/target/arm/sve_helper.c
> index c3cb
On 06/08/2018 16:33, Emanuele Giuseppe Esposito wrote:
> Add qgraph nodes for sdhci-pci and generic-sdhci (memory mapped) drivers.
> Both drivers implement (produce) the same interface sdhci, that provides the
> readw - readq - writeq functions.
>
> Signed-off-by: Emanuele Giuseppe Esposito
> ---
Richard Henderson writes:
> With PC, there are 33 registers. Three per line lines up nicely
> without overflowing 80 columns.
>
> Cc: qemu-sta...@nongnu.org (3.0.1)
> Signed-off-by: Richard Henderson
Reviewed-by: Alex Bennée
> ---
> target/arm/translate-a64.c | 13 ++---
> 1 file
On Wed, 8 Aug 2018 23:20:25 +0300
"Michael S. Tsirkin" wrote:
> On Wed, Aug 08, 2018 at 05:15:45PM +0200, Igor Mammedov wrote:
> > It's an alternative approach to
> > 1) [PATCH hack dontapply v2 0/7] Dynamic _CST generation
> > which instead of dynamic AML loading uses static AML with
> > dynami
On Thu, Aug 09, 2018 at 05:37:58PM +0800, Peter Xu wrote:
> On Thu, Aug 09, 2018 at 12:23:43PM +0300, Michael S. Tsirkin wrote:
> > On Wed, Aug 08, 2018 at 11:45:43AM +0800, Peter Xu wrote:
> > > On Wed, Aug 08, 2018 at 12:58:32AM +0300, Michael S. Tsirkin wrote:
> > > > At least with VTD, it seems
On 09/08/2018 12:10, Laurent Vivier wrote:
>> libqgraph-pci-obj-y = $(libqos-pc-obj-y)
>> libqgraph-pci-obj-y += $(libqgraph-machines-obj-y)
>> +libqgraph-pci-obj-y += tests/libqos/sdhci.o
> The file also implements memory mapped SDHCI, should we split the file
> in two files, one added to libqgr
On 08/09/2018 11:44 AM, Paolo Bonzini wrote:
On 09/08/2018 11:20, Emanuele wrote:
Why this? Shouldn't it be:
if (g_strcmp0(old_path, path)) {
qtest_end(); /* handles global_qtest = NULL */
g_free(old_path); /* handles NULL */
old_path = path;
global_qtest = q
On 8/9/18 12:33 PM, Alberto Garcia wrote:
On Thu 09 Aug 2018 12:11:37 AM CEST, Leonid Bloch wrote:
The default cache-clean-interval is set to 10 minutes, in order to lower
the overhead of the qcow2 caches (before the default was 0, i.e.
disabled).
Signed-off-by: Leonid Bloch
--- a/qapi/bloc
Richard Henderson writes:
> Also fold the FPCR/FPSR state onto the same line as PSTATE,
> and mention but do not dump disabled FPU state.
>
> Cc: qemu-sta...@nongnu.org (3.0.1)
> Signed-off-by: Richard Henderson
Reviewed-by: Alex Bennée
Tested-by: Alex Bennée
> ---
> target/arm/translate-
Richard Henderson writes:
> With PC, there are 33 registers. Three per line lines up nicely
> without overflowing 80 columns.
>
> Cc: qemu-sta...@nongnu.org (3.0.1)
> Signed-off-by: Richard Henderson
Reviewed-by: Alex Bennée
> ---
> target/arm/translate-a64.c | 13 ++---
> 1 file
On Thu 09 Aug 2018 12:52:34 PM CEST, Leonid Bloch wrote:
> On 8/9/18 12:33 PM, Alberto Garcia wrote:
>> On Thu 09 Aug 2018 12:11:37 AM CEST, Leonid Bloch wrote:
>>> The default cache-clean-interval is set to 10 minutes, in order to lower
>>> the overhead of the qcow2 caches (before the default was
Richard Henderson writes:
> This allows the default (and maximum) vector length to be set
> from the command-line. Which is extraordinarily helpful in
> debuging problems depending on vector length without having to
> bake knowledge of PR_SET_SVE_VL into every guest binary.
>
> Cc: qemu-sta...
Richard Henderson writes:
> The expression (int) imm + (uint32_t) len_align turns into uint32_t
> and thus with negative imm produces a memory operation at the wrong
> offset. None of the numbers involved are particularly large, so
> change everything to use int.
>
> Cc: qemu-sta...@nongnu.org
On 09/08/2018 12:15, Paolo Bonzini wrote:
> On 09/08/2018 12:10, Laurent Vivier wrote:
>>> libqgraph-pci-obj-y = $(libqos-pc-obj-y)
>>> libqgraph-pci-obj-y += $(libqgraph-machines-obj-y)
>>> +libqgraph-pci-obj-y += tests/libqos/sdhci.o
>> The file also implements memory mapped SDHCI, should we sp
* Peter Maydell (peter.mayd...@linaro.org) wrote:
> The data in an mbuf buffer is not necessarily at the start of the
> allocated buffer. (For instance m_adj() allows data to be trimmed
> from the start by just advancing the pointer and reducing the length.)
> This means that the allocated buffer s
On 06/08/2018 16:33, Emanuele Giuseppe Esposito wrote:
> Convert tests/sdhci-test in first qgraph test node, sdhci-test. This test
> consumes an sdhci interface and checks that its function return the
> expected values.
>
> Note that this test does not allocate any sdhci structure, it's all done b
On 9 August 2018 at 12:12, Dr. David Alan Gilbert wrote:
> * Peter Maydell (peter.mayd...@linaro.org) wrote:
>> diff --git a/slirp/mbuf.c b/slirp/mbuf.c
>> index 0c189e1a7bf..1b7868355a3 100644
>> --- a/slirp/mbuf.c
>> +++ b/slirp/mbuf.c
>> @@ -154,7 +154,7 @@ m_inc(struct mbuf *m, int size)
>>
* Peter Maydell (peter.mayd...@linaro.org) wrote:
> On 9 August 2018 at 12:12, Dr. David Alan Gilbert wrote:
> > * Peter Maydell (peter.mayd...@linaro.org) wrote:
> >> diff --git a/slirp/mbuf.c b/slirp/mbuf.c
> >> index 0c189e1a7bf..1b7868355a3 100644
> >> --- a/slirp/mbuf.c
> >> +++ b/slirp/mbuf.
Define FeatureWordType.
Expand FeatureWordInfo to support both CPUID type feature word as well as
MSR type's.
Change feature_word_info[] accordingly.
Signed-off-by: Robert Hoo
---
target/i386/cpu.c | 133 ++
target/i386/cpu.h | 5 ++
2 files
Add kvm_get_supported_feature_msrs() to get supported MSR feature index list.
Add kvm_arch_get_supported_msr_feature() to get each MSR features value.
kvm_get_supported_feature_msrs() is called in kvm_arch_init().
kvm_arch_get_supported_msr_feature() is called by
x86_cpu_get_supported_feature_word
KVM side has added the framework (kvm.git:d1d93fa90) to support MSR based
features.
Here is the QEMU part, including data structure changes/expanding, referring
functions changes, and the implementations on
KVM_GET_MSR_FEATURE_INDEX_LIST and KVM_GET_MSRS system ioctl.
Robert Hoo (3):
x86: Data
Add an util function feature_word_description(), which help construct the string
describing the feature word (both CPUID and MSR types).
report_unavailable_features(): add MSR_FEATURE_WORD type support.
x86_cpu_get_feature_words(): limit to CPUID_FEATURE_WORD only.
x86_cpu_get_supported_feature_wo
The MEN Chameleon Bus (MCB) is an on-chip bus system exposing IP Cores of an
FPGA to a outside bus system like PCIe.
Signed-off-by: Johannes Thumshirn
---
default-configs/pci.mak | 1 +
hw/Makefile.objs| 1 +
hw/mcb/Makefile.objs| 1 +
hw/mcb/mcb.c| 180
This series adds support for emulating FPGAs by Men Mikroelektronik
Nürnberg and expose the FPGA itself as a bus. The IP-Cores implemented
in the FPGA are represented as devices hanging off that bus. This is the
same aproach that is used in the Linux kernel as well for these devices.
The main inte
Add MEN z125 UART over MEN Chameleon Bus emulation.
Signed-off-by: Johannes Thumshirn
---
hw/char/Makefile.objs | 1 +
hw/char/serial-mcb.c | 100 ++
2 files changed, 101 insertions(+)
create mode 100644 hw/char/serial-mcb.c
diff --git a/hw/ch
Hi,
A series of leaks spotted by ASAN. Some of them might be worth for 3.0...
Marc-André Lureau (4):
tests: fix crumple/recursive leak
tests: fix bdrv-drain leak
monitor: fix oob command leak
RFC: fix megasas leak
hw/scsi/megasas.c | 1 +
monitor.c | 2 ++
tests/
tests/cdrom-test -p /x86_64/cdrom/boot/megasas
Produces the following ASAN leak.
==25700==ERROR: LeakSanitizer: detected memory leaks
Direct leak of 16 byte(s) in 1 object(s) allocated from:
#0 0x7f06f8faac48 in malloc (/lib64/libasan.so.5+0xeec48)
#1 0x7f06f87a73c5 in g_malloc (/lib64/l
Add 16z069 Watchdog over MEN Chameleon BUS emulation.
Signed-off-by: Johannes Thumshirn
---
hw/watchdog/Makefile.objs | 1 +
hw/watchdog/wdt_z069.c| 215 ++
2 files changed, 216 insertions(+)
create mode 100644 hw/watchdog/wdt_z069.c
diff --git
Spotted by ASAN:
=
==5378==ERROR: LeakSanitizer: detected memory leaks
Direct leak of 65536 byte(s) in 1 object(s) allocated from:
#0 0x7f788f83bc48 in malloc (/lib64/libasan.so.5+0xeec48)
#1 0x7f788c9923c5 in g_malloc (/lib6
From: Leonid Shatz
Signed-off-by: Leonid Shatz
Reviewed-by: Darren Kenny
Signed-off-by: Liran Alon
---
hw/display/vmware_vga.c | 7 +--
1 file changed, 1 insertion(+), 6 deletions(-)
diff --git a/hw/display/vmware_vga.c b/hw/display/vmware_vga.c
index 0bbb78b9a6fd..60a672530840 100644
--
Hi,
This patch series aim to fix many issues in vmware-svga emulation
which have prevented it from being fully functional in a wide-variety
of guests.
Patches 1-5 are just code refactoring patches.
Patches 6-11 aim to fix multiple command parsing issues which caused
FIFO to desync and thus fail
Signed-off-by: Johannes Thumshirn
---
hw/mcb/Makefile.objs | 1 +
hw/mcb/mcb-pci.c | 305 +++
2 files changed, 306 insertions(+)
create mode 100644 hw/mcb/mcb-pci.c
diff --git a/hw/mcb/Makefile.objs b/hw/mcb/Makefile.objs
index 32427c987c44.
Spotted by ASAN, during make check...
Direct leak of 40 byte(s) in 1 object(s) allocated from:
#0 0x7f8e27262c48 in malloc (/lib64/libasan.so.5+0xeec48)
#1 0x7f8e26a5f3c5 in g_malloc (/lib64/libglib-2.0.so.0+0x523c5)
#2 0x555ab67078a8 in qstring_from_str
/home/elmarco/src/qq/qobject/q
From: Leonid Shatz
While we continue to ignore SVGA_CMD_RECT_ROP_FILL, SVGA_CMD_RECT_ROP_COPY
and SVGA_CMD_FENCE commands, we should account for command length, not only
arguments following command code.
Signed-off-by: Leonid Shatz
Reviewed-by: Darren Kenny
Signed-off-by: Liran Alon
---
hw/d
From: Leonid Shatz
For better readability of debug output, show these values in decimal notation,
as they are defined in source by decimal integers.
Signed-off-by: Leonid Shatz
Reviewed-by: Darren Kenny
Signed-off-by: Liran Alon
---
hw/display/vmware_vga.c | 6 +++---
1 file changed, 3 inser
Spotted by ASAN:
=
==27907==ERROR: LeakSanitizer: detected memory leaks
Direct leak of 4120 byte(s) in 1 object(s) allocated from:
#0 0x7f913458ce50 in calloc (/lib64/libasan.so.5+0xeee50)
#1 0x7f9133fd641d in g_malloc0 (/lib
Future patches will add handling of commands that are parsed but
deliberately ignored. This change adds required framework for
avoiding printing parsing error messages for these commands,
when we encounter them in the FIFO.
Reviewed-by: Darren Kenny
Signed-off-by: Liran Alon
---
hw/display/vmwa
From: Leonid Shatz
Prefer variable names of cursor structure from VMware SVGA DevKit.
In addition, make sure to use the AND mask bpp parameter in
SVGA_CMD_DEFINE_CURSOR.
Signed-off-by: Leonid Shatz
Reviewed-by: Darren Kenny
Signed-off-by: Liran Alon
---
hw/display/vmware_vga.c | 26 +
From: Leonid Shatz
Remove switch-case invalid handling of SVGA_CMD_SURFACE_FILL
and SVGA_CMD_SURFACE_COPY deprecated commands as their
handling is obviously not complete. We'd rather leave it to default
(unknown) command handling and have an error message displayed.
Signed-off-by: Leonid Shatz
From: Leonid Shatz
Should not change semantics.
Signed-off-by: Leonid Shatz
Reviewed-by: Darren Kenny
Signed-off-by: Liran Alon
---
hw/display/vmware_vga.c | 60 -
1 file changed, 34 insertions(+), 26 deletions(-)
diff --git a/hw/display/vmwar
From: Leonid Shatz
SVGA_CMD_UPDATE_VERBOSE has one more extra argument to fetch from command fifo,
as compared to SVGA_CMD_UPDATE command. From Linux kernel
drivers/gpu/drm/vmwgfx/device_include/svga_reg.h:
"Just like SVGA_CMD_UPDATE, but also provide a per-rectangle
'reason' value, an opaque coo
From: Leonid Shatz
Some guests are using 64x64 32bpp cursor pixel array, the old size of 1024
integers
was not sufficient to store such large masks.
Signed-off-by: Leonid Shatz
Reviewed-by: Darren Kenny
Signed-off-by: Liran Alon
---
hw/display/vmware_vga.c | 2 +-
1 file changed, 1 insertio
From: Leonid Shatz
These commands are neither mentioned nor documented in VMware SVGA
development-kit and Linux vmware-svga driver source code.
Thus, they should be subject to future deletion, if not encountered in practice.
Signed-off-by: Leonid Shatz
Reviewed-by: Darren Kenny
Signed-off-by:
From: Leonid Shatz
Import FIFO register definitions from VMware SVGA Device Developer Kit.
Report number of available registers so that guest device driver can
reserve enough space for registers before command FIFO.
Signed-off-by: Leonid Shatz
Reviewed-by: Darren Kenny
Signed-off-by: Liran Alo
Reviewed-by: Darren Kenny
Signed-off-by: Liran Alon
---
hw/display/vmware_vga.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/hw/display/vmware_vga.c b/hw/display/vmware_vga.c
index fab6443a87e2..675c8755ab48 100644
--- a/hw/display/vmware_vga.c
+++ b/hw/display/vmware_v
From: Leonid Shatz
Indicate support of SVGA_REG_PITCHLOCK in device capabilities.
Value written by driver to SVGA_REG_PITCHLOCK is used to overwrite
the default line length derived from display width and bpp. Due to
lack of clear documentation, we resume using default formula for
line length when
Supporting extended FIFO registers is required to support
SVGA_FIFO_FENCE which allows guest to receive interrupt when FIFO is
processed up to a specified fence.
Thus, as a preperation for supporting SVGA_FIFO_FENCE, add extened
FIFO registers support. Note that exposing SVGA_CAP_EXTENDED_FIFO
req
From: Leonid Shatz
We parse the command structure, but ignore the hint given by command.
Without doing so, command FIFO could get out of sync and cause
vmware-svga device to hang.
>From Linux kernel drivers/gpu/drm/vmwgfx/device_include/svga_reg.h:
/*
* SVGA_CMD_FRONT_ROP_FILL --
From: Leonid Shatz
This is necessary in order for device to raise interrupts.
Future patches will add functionality to device which will
need this ability.
Signed-off-by: Leonid Shatz
Reviewed-by: Darren Kenny
Signed-off-by: Liran Alon
---
hw/display/vmware_vga.c | 1 +
1 file changed, 1 ins
From: Leonid Shatz
Signed-off-by: Leonid Shatz
Reviewed-by: Darren Kenny
Signed-off-by: Liran Alon
---
hw/display/vmware_vga.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/hw/display/vmware_vga.c b/hw/display/vmware_vga.c
index 389248b4badf..1803a565fa07 100644
--- a/hw/display/vmwa
From: Leonid Shatz
Should not change semantics.
This is done as a preparation for future patches.
Signed-off-by: Leonid Shatz
Reviewed-by: Darren Kenny
Signed-off-by: Liran Alon
---
hw/display/vmware_vga.c | 8
1 file changed, 8 insertions(+)
diff --git a/hw/display/vmware_vga.c b/
From: Leonid Shatz
This should be better handled by switch default case, which will output
debugging
message about encountering this command, instead of silently discarding.
If such command is ever encountered, it serves as indicator of broken FIFO
command decoding chain.
Signed-off-by: Leonid
Marc-André Lureau writes:
> Hi,
>
> This series is a rebased subset of "[PATCH v3 00/38] RFC: monitor: add
> asynchronous command type" with code cleanups and improvements that
> are worth to consider for 3.0.
>
> The series applies on master, and will conflict with the pending
> series "[PATCH 0
From: Leonid Shatz
This adds missing implementation of cursors having rgb and alpha-blending
component.
Although more work is required in QEMU framework to fully support alpha-blending
functionality for cursors, the suggested fix shows well defined cursor shape
instead
of crashing video device
From: Leonid Shatz
Based on Linux kernel
drivers/gpu/drm/vmwgfx/device_include/svga_reg.h.
Signed-off-by: Leonid Shatz
Reviewed-by: Darren Kenny
Signed-off-by: Liran Alon
---
hw/display/vmware_vga.c | 12
1 file changed, 12 insertions(+)
diff --git a/hw/display/vmware_vga.c b/h
From: Leonid Shatz
Add missing functionality of interrupt mask and status registers.
Writing to interrupt status register clears interrupt request.
Signed-off-by: Leonid Shatz
Reviewed-by: Darren Kenny
Signed-off-by: Liran Alon
---
hw/display/vmware_vga.c | 52 +++
On Tue, 7 Aug 2018 08:52:37 -0500
Eric Blake wrote:
> On 08/07/2018 05:51 AM, Tomáš Golembiovský wrote:
> > On Linux the functionality depends on libudev.
> >
> > Example from Linux:
> >
> > {
> >"name": "dm-2",
> >"mountpoint": "/",
> >...
> >"disk": [
> >
From: Leonid Shatz
This adds tracking of guest cursor position with the help of FIFO
registers reporting pointing device coordindates.
Signed-off-by: Leonid Shatz
Reviewed-by: Darren Kenny
Signed-off-by: Liran Alon
---
hw/display/vmware_vga.c | 38 +-
1 fi
If vmsvga supports interrupts (SVGA_CAP_IRQMASK), some guests wait for
FIFO to become not full by sleeping until FIFO_PROGRESS interrupt occurs.
This is the most efficient thing to do when the FIFO fills up.
To support these guests, add support for SVGA_IRQFLAG_FIFO_PROGRESS.
See usage example by
From: Leonid Shatz
According to Linux kernel
drivers/gpu/drm/vmwgfx/device_include/svga_reg.h:
/*
* SVGA_CMD_FENCE --
*
*Insert a synchronization fence. When the SVGA device reaches
*this command, it will copy the 'fence' value into the
*SVGA_FIFO_FENCE register. It will also c
Add kvm_get_supported_feature_msrs() to get supported MSR feature index list.
Add kvm_arch_get_supported_msr_feature() to get each MSR features value.
kvm_get_supported_feature_msrs() is called in kvm_arch_init().
kvm_arch_get_supported_msr_feature() is called by
x86_cpu_get_supported_feature_word
We don't support GMR regions while reporting caps, but some guests may try
to send us some GMR queries and we do our best to ignore them while avoiding
FIFO command crash.
Reported-by: Leonid Shatz
Reviewed-by: Darren Kenny
Signed-off-by: Liran Alon
---
hw/display/vmware_vga.c | 55 +++
From: Leonid Shatz
AND/XOR mask is a standard method for defining hardware cursor images.
These are also the names suggested by VMware SVGA DevKit.
Signed-off-by: Leonid Shatz
Reviewed-by: Darren Kenny
Signed-off-by: Liran Alon
---
hw/display/vmware_vga.c | 22 +++---
1 file
From: Leonid Shatz
This in only code refactoring without change in semantics.
Signed-off-by: Leonid Shatz
Reviewed-by: Darren Kenny
Signed-off-by: Liran Alon
---
hw/display/vmware_vga.c | 45 +
1 file changed, 25 insertions(+), 20 deletions(-)
dif
KVM side has added the framework (kvm.git:d1d93fa90) to support MSR based
features.
Here is the QEMU part, including data structure changes/expanding, referring
functions changes, and the implementations on
KVM_GET_MSR_FEATURE_INDEX_LIST and KVM_GET_MSRS system ioctl.
Changelog:
v2: coding style
Add an util function feature_word_description(), which help construct the string
describing the feature word (both CPUID and MSR types).
report_unavailable_features(): add MSR_FEATURE_WORD type support.
x86_cpu_get_feature_words(): limit to CPUID_FEATURE_WORD only.
x86_cpu_get_supported_feature_wo
Marc-André Lureau writes:
> We can easily avoid the burden of checking if the lexer was
> initialized prior to calling destroy by the caller, let's do it.
>
> This allows simplification in state tracking in later patches of the
> qmp-async RFC series.
Please include the patch in that series, whe
Hi Dave,
I’m not sure e1000e was ever tested with Slirp. It might be a bug existing from
the beginning.
Dmitry
> On 6 Aug 2018, at 22:14, Dr. David Alan Gilbert wrote:
>
> Hi Sam, Jan, Dmitry,
> Any idea where this is coming from; my backtrace shows it's a free in
> slirp, but only happenin
From: Leonid Shatz
Report SVGA_CAP_DISPLAY_TOPOLOGY capability and support single
legacy screen at fixed offset of (0,0).
This is a pre-requesite for supporting PITCHLOCK feature which is
required by Linux kernel vmsvga driver (See Linux kernel
vmw_driver_load()).
Signed-off-by: Leonid Shatz
R
Define FeatureWordType.
Expand FeatureWordInfo to support both CPUID type feature word as well as
MSR type's.
Change feature_word_info[] accordingly.
Signed-off-by: Robert Hoo
---
target/i386/cpu.c | 133 ++
target/i386/cpu.h | 5 ++
2 files
On Thu 09 Aug 2018 12:11:35 AM CEST, Leonid Bloch wrote:
> Sufficient L2 cache can noticeably improve the performance when using
> large images with frequent I/O. The memory overhead is not significant
> in most cases, as the cache size is only 1 MB for each 8 GB of virtual
> image size (with the d
+return TRUE;
+}
+
+QPCIDevice *qpci_device_find(QPCIBus *bus, int devfn)
+{
+QPCIDevice *dev;
+
+dev = g_malloc0(sizeof(*dev));
+
+if (!qpci_device_set(dev, bus, devfn)) {
g_free(dev);
return NULL;
}
@@ -66,6 +83,21 @@ QPCIDevice *qpci_device_find(QPCI
Perhaps we can call that "memory" rather than "guest_allocator", as it
gives access to the memory of the guest?
and qos_node_produces("x86_64/pc", "memory"); (or "guest_allocator")?
and perhaps later, a qos_add_test("test-memory-allocator", "memory",
test_memory_allocator, NULL)?
I don't know,
On 09/08/2018 14:17, Emanuele wrote:
>
>>> + return TRUE;
>>> +}
>>> +
>>> +QPCIDevice *qpci_device_find(QPCIBus *bus, int devfn)
>>> +{
>>> + QPCIDevice *dev;
>>> +
>>> + dev = g_malloc0(sizeof(*dev));
>>> +
>>> + if (!qpci_device_set(dev, bus, devfn)) {
>>> g_free(dev);
>>>
On 09/08/2018 14:23, Emanuele wrote:
>> Perhaps we can call that "memory" rather than "guest_allocator", as it
>> gives access to the memory of the guest?
>> and qos_node_produces("x86_64/pc", "memory"); (or "guest_allocator")?
>>
>> and perhaps later, a qos_add_test("test-memory-allocator", "mem
On 08/09/2018 02:29 PM, Laurent Vivier wrote:
On 09/08/2018 14:17, Emanuele wrote:
+ return TRUE;
+}
+
+QPCIDevice *qpci_device_find(QPCIBus *bus, int devfn)
+{
+ QPCIDevice *dev;
+
+ dev = g_malloc0(sizeof(*dev));
+
+ if (!qpci_device_set(dev, bus, devfn)) {
g_free(dev
Quoting David Gibson (2018-08-08 19:23:35)
> On Wed, Aug 08, 2018 at 09:29:19PM +0530, Bharata B Rao wrote:
> > VMStateDescription vmstate_spapr_cpu_state was added by commit
> > b94020268e0b6 (spapr_cpu_core: migrate per-CPU data) to migrate per-CPU
> > data with the required vmstate registration
Marc-André Lureau writes:
> These 2 tests exhibited two qmp bugs that were fixed in 2.7
> (series from commit e64c75a9752c5d0fd64eb2e684c656a5ea7d03c6 to
> commit 1382d4abdf9619985e4078e37e49e487cea9935e)
>
> Signed-off-by: Marc-André Lureau
> ---
> tests/qmp-test.c | 38 +++
On 06/08/2018 16:33, Emanuele Giuseppe Esposito wrote:
> Add arm/raspi2 machine to the graph. This machine contains a generic-sdhci, so
> its constructor must take care of setting it properly when called.
>
> Signed-off-by: Emanuele Giuseppe Esposito
> ---
> tests/Makefile.include| 1 +
On 09/08/2018 14:33, Emanuele wrote:
> Ok, makes sense for qpci_device_init, but I still need to perform that
> check for qpci_device_find.
Yes, you're right.
Thanks,
Laurent
On 06/08/2018 16:33, Emanuele Giuseppe Esposito wrote:
> Add pci-bus-spapr node, that produces pci-bus. Move QPCIBusSPAPR struct
> declaration in its header (since it will be needed by other drivers)
> and introduce a setter method for drivers that do not need to allocate
> but have to initialize Q
Create a new include file for the pl081's device struct,
type macros, etc, so that it can be instantiated using
the "embedded struct" coding style.
Signed-off-by: Peter Maydell
---
include/hw/dma/pl080.h | 62 ++
hw/dma/pl080.c | 34 ++-
1 - 100 of 350 matches
Mail list logo
