On 18/10/2018 16:57, Daniel P. Berrangé wrote:
> This adds a config file for git-publish, primarily so that patches get
> sent with the "web" subject prefix to distinguish them from patches to
> the main git repo.
>
> Signed-off-by: Daniel P. Berrangé
> ---
>
> I picked Paolo & Thomas as CC
On Mon, Oct 15, 2018 at 11:26:39AM +0800, Mao Zhongyi wrote:
> According to qdev-properties.h, properties of pointer type
> should be avoid, so convert qdev property to link, Whilst we
> are here, also update some hardcoded strings with already
> defineded macros.
Patch series breaks "make
On Fri, Oct 12, 2018 at 11:08:09PM -0700, Li Qiang wrote:
> Signed-off-by: Li Qiang
Added to audio patch queue.
thanks,
Gerd
On 15.10.18 20:59, Cleber Rosa wrote:
>
>
> On 10/15/18 10:14 AM, Max Reitz wrote:
>> There are two imports that need to be modified when running the iotests
>> under Python 3: One is StringIO, which no longer exists; instead, the
>> StringIO class comes from the io module, so import it from
On 15.10.18 21:53, Eduardo Habkost wrote:
> On Mon, Oct 15, 2018 at 04:14:47PM +0200, Max Reitz wrote:
>> Since byte strings are no longer the default in Python 3, we have to
>> explicitly use them where we need to, which is mostly when working with
>> structures. It also means that we need to
On 2018-10-16 15:50, Paolo Bonzini wrote:
> They are not consecutive with DAC1_FRAME* and DAC2_FRAME*; Coverity
> still complains about es1370_read, while es1370_write was fixed in
> commit cf9270e5220671f49cc238deaf6136669cc07ae1.
>
> Fixes: 154c1d1f960c5147a3f8ef00907504112f271cd8
>
On 16.10.18 00:19, Philippe Mathieu-Daudé wrote:
> Hi Max,
>
> On 15/10/2018 16:14, Max Reitz wrote:
>> This series prepares the iotests to work with both Python 2 and 3. In
>> some places, it adds version-specific code and decides what to do based
>> on the version (for instance, whether to
Hi Daniel, Markus.
On 09/10/2018 15:04, Daniel P. Berrangé wrote:
...
> .gitignore | 4 +
> MAINTAINERS | 1 +
> Makefile| 7 +-
> Makefile.objs | 4 +
> authz/Makefile.objs | 1 +
> authz/list.c| 315
On Fri, Oct 19, 2018 at 11:18:07AM +0200, Philippe Mathieu-Daudé wrote:
> Hi Daniel, Markus.
>
> On 09/10/2018 15:04, Daniel P. Berrangé wrote:
> ...
> > .gitignore | 4 +
> > MAINTAINERS | 1 +
> > Makefile| 7 +-
> > Makefile.objs | 4
Hi Eric,
> From: Auger Eric [mailto:eric.au...@redhat.com]
> Sent: Thursday, October 18, 2018 11:16 PM
>
> Hi Yi,
>
> On 10/18/18 12:30 PM, Liu, Yi L wrote:
> > Hi Eric,
> >
> >> From: Eric Auger [mailto:eric.au...@redhat.com]
> >> Sent: Friday, September 21, 2018 4:18 PM
> >> Subject: [RFC v2
Hi Eric,
On 10/18/2018 03:30 PM, Eric Auger wrote:
This is a header update against kvmarm next branch
git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm kvmarm/next
to get the KVM_ARM_GET_MAX_VM_PHYS_SHIFT ioctl. This allows to retrieve
the IPA address range KVM supports.
On 15.10.18 22:07, Eduardo Habkost wrote:
> On Mon, Oct 15, 2018 at 04:14:49PM +0200, Max Reitz wrote:
>> In Python 3, several functions now return iterators instead of lists.
>> This includes range(), items(), map(), and filter(). This means that if
>> we really want a list, we have to wrap
On 2018-10-18 20:10, Paolo Bonzini wrote:
> --with-gtkabi does not exist anymore; remove it from the configure invocation.
>
> Signed-off-by: Paolo Bonzini
> ---
> tests/docker/test-mingw | 3 +--
> 1 file changed, 1 insertion(+), 2 deletions(-)
>
> diff --git a/tests/docker/test-mingw
For the Aarch64, there is one machine 'virt', it is primarily meant to
run on KVM and execute virtualization workloads, but we need an
environment as faithful as possible to physical hardware, to support
firmware and OS development for pysical Aarch64 machines.
See the patch commit comments for
For the Aarch64, there is one machine 'virt', it is primarily meant to
run on KVM and execute virtualization workloads, but we need an
environment as faithful as possible to physical hardware, for supporting
firmware and OS development for pysical Aarch64 machines.
This patch introduces new
On 18 October 2018 at 21:31, Paolo Bonzini wrote:
> The exception.pad field is going to be renamed to pending in an upcoming
> header file update. Remove the unnecessary initialization; it was
> introduced to please valgrind (commit 7e680753cfa2) but they were later
> rendered unnecessary by
On 15.10.18 22:30, Eduardo Habkost wrote:
> On Mon, Oct 15, 2018 at 04:14:50PM +0200, Max Reitz wrote:
>> Python 3.2 introduced the inheritable attribute for FDs. At the same
>> time, it changed the default so that all FDs are not inheritable by
>> default, that only inheritable FDs are inherited
On 15.10.18 23:13, Cleber Rosa wrote:
>
>
> On 10/15/18 10:14 AM, Max Reitz wrote:
>> In Python 3, / is always a floating-point division. We usually do not
>> want this, and as Python 2.7 understands // as well, change all integer
>> divisions to use that.
>>
>> Signed-off-by: Max Reitz
>> ---
On 09/10/2018 15:04, Daniel P. Berrangé wrote:
> From: "Daniel P. Berrange"
>
> The 'qemu_acl' type was a previous non-QOM based attempt to provide an
> authorization facility in QEMU. Because it is non-QOM based it cannot be
> created via the command line and requires special monitor commands
Reviewed-by: David Hildenbrand
Signed-off-by: Richard Henderson
---
target/s390x/mem_helper.c | 92 +--
1 file changed, 41 insertions(+), 51 deletions(-)
diff --git a/target/s390x/mem_helper.c b/target/s390x/mem_helper.c
index bacae4f503..e106f61b4e 100644
Changes since v1:
* Added QEMU_ERROR to wrap __attribute__((error)) -- patch 12.
r~
The following changes since commit 77f7c747193662edfadeeb3118d63eed0eac51a6:
Merge remote-tracking branch
'remotes/huth-gitlab/tags/pull-request-2018-10-17' into staging (2018-10-18
13:40:19 +0100)
are
From: "Emilio G. Cota"
When we implemented per-vCPU TCG contexts, we forgot to also
distribute the tcg_time counter, which has remained as a global
accessed without any serialization, leading to potentially missed
counts.
Fix it by distributing the field over the TCG contexts, embedding
it into
From: "Emilio G. Cota"
This plugs two 4-byte holes in 64-bit.
Signed-off-by: Emilio G. Cota
Message-Id: <20181010144853.13005-4-c...@braap.org>
Signed-off-by: Richard Henderson
---
tcg/tcg.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tcg/tcg.h b/tcg/tcg.h
index
From: "Emilio G. Cota"
Currently we rely on atomic operations for cross-CPU invalidations.
There are two cases that these atomics miss: cross-CPU invalidations
can race with either (1) vCPU threads flushing their TLB, which
happens via memset, or (2) vCPUs calling tlb_reset_dirty on their TLB,
From: "Emilio G. Cota"
As far as I can tell tlb_flush does not need to be called
this early. tlb_flush is eventually called after the CPU
has been realized.
This change paves the way to the introduction of tlb_init,
which will be called from cpu_exec_realizefn.
Reviewed-by: Alex Bennée
From: "Emilio G. Cota"
Updates can come from other threads, so readers that do not
take tlb_lock must use atomic_read to avoid undefined
behaviour (UB).
This completes the conversion to tlb_lock. This conversion results
on average in no performance loss, as the following experiments
(run on an
Reviewed-by: Emilio G. Cota
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
target/arm/helper-a64.c| 16
target/arm/translate-a64.c | 38 ++
2 files changed, 26 insertions(+), 28 deletions(-)
diff --git
Philippe Mathieu-Daudé writes:
> When using an incorrect backend for the debugcon, QEMU exits silently
> without any error indication, which is confusing.
> Add a message that the character backend is invalid.
>
> Signed-off-by: Philippe Mathieu-Daudé
Queued, thanks!
Reviewed-by: Emilio G. Cota
Signed-off-by: Richard Henderson
---
target/ppc/helper.h | 2 +-
target/ppc/mem_helper.c | 33 ++--
target/ppc/translate.c | 115 +---
3 files changed, 88 insertions(+), 62 deletions(-)
diff --git
On 10/18/18 3:34 AM, Peter Maydell wrote:
> Hi; I get compile failures, I'm afraid:
>
> FreeBSD's compiler gives warnings:
> In file included from /var/tmp/qemu-test.bVaUEj/accel/tcg/user-exec.c:28:
> /var/tmp/qemu-test.bVaUEj/include/qemu/atomic128.h:148:23: warning:
> unknown attribute 'error'
From: "Emilio G. Cota"
Reviewed-by: Richard Henderson
Reviewed-by: Alex Bennée
Signed-off-by: Emilio G. Cota
Message-Id: <20181009174557.16125-5-c...@braap.org>
Signed-off-by: Richard Henderson
---
accel/tcg/cputlb.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git
On 19/10/2018 08:30, Artem Pisarenko wrote:
>> This is wrong at least for QEMU_CLOCK_HOST.
>> …
>> Reading the host clock here is not protected by the checkpoint.
>> Therefore it may incur the inconsistency when replaying the execution.
>
> That's why I didn't like idea of this patch and asked
On 19/10/2018 03:05, Emilio G. Cota wrote:
> I'm calling this series a v3 because it supersedes the two series
> I previously sent about using atomics for interrupt_request:
> https://lists.gnu.org/archive/html/qemu-devel/2018-09/msg02013.html
> The approach in that series cannot work reliably;
On 18/10/2018 22:31, Paolo Bonzini wrote:
> The following changes since commit 77f7c747193662edfadeeb3118d63eed0eac51a6:
>
> Merge remote-tracking branch
> 'remotes/huth-gitlab/tags/pull-request-2018-10-17' into staging (2018-10-18
> 13:40:19 +0100)
>
> are available in the git repository
Public bug reported:
hw/usb/dev-mtp.c:1616:52: warning: logical ‘or’ of collectively
exhaustive tests is always true [-Wlogical-op]
Source code is
if ((ret == -1) && (errno != EINTR || errno != EAGAIN ||
errno != EWOULDBLOCK)) {
Maybe better
GCC7+ will no longer advertise support for 16-byte __atomic operations
if only cmpxchg is supported, as for x86_64. Fortunately, x86_64 still
has support for __sync_compare_and_swap_16 and we can make use of that.
AArch64 does not have, nor ever has had such support, so open-code it.
Reviewed-by: Emilio G. Cota
Signed-off-by: Richard Henderson
---
target/arm/helper-a64.c | 259 +---
1 file changed, 133 insertions(+), 126 deletions(-)
diff --git a/target/arm/helper-a64.c b/target/arm/helper-a64.c
index 7f6ad3000b..6e4e1b8a19 100644
---
On 10/18/18 6:05 PM, Emilio G. Cota wrote:
> We don't pass a pointer to qemu_global_mutex anymore.
>
> Cc: Peter Crosthwaite
> Cc: Richard Henderson
> Signed-off-by: Emilio G. Cota
> ---
> include/qom/cpu.h | 10 --
> cpus-common.c | 2 +-
> cpus.c| 5 -
> 3
On 19/10/2018 03:06, Emilio G. Cota wrote:
> Soon we will call cpu_has_work without the BQL.
>
> Cc: David Gibson
> Cc: Alexander Graf
> Cc: qemu-...@nongnu.org
> Signed-off-by: Emilio G. Cota
> ---
> target/ppc/translate_init.inc.c | 77 +++--
> 1 file changed, 73
Le 19/10/2018 à 04:16, Cortland Setlow Tölva a écrit :
> On Thu, Oct 18, 2018 at 11:48 AM Laurent Vivier wrote:
>>
>> Le 08/10/2018 à 18:35, Cortland Tölva a écrit :
>>> Userspace submits a USB Request Buffer to the kernel, optionally
>>> discards it, and finally reaps the URB. Thunk buffers
From: "Emilio G. Cota"
We forgot to initialize n in commit 15fa08f845 ("tcg: Dynamically
allocate TCGOps", 2017-12-29).
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Emilio G. Cota
Message-Id: <20181010144853.13005-3-c...@braap.org>
Signed-off-by: Richard Henderson
---
tcg/tcg.c | 2 +-
From: "Emilio G. Cota"
Consistently access u16.high with atomics to avoid
undefined behaviour in MTTCG.
Note that icount_decr.u16.low is only used in icount mode,
so regular accesses to it are OK.
Reviewed-by: Richard Henderson
Signed-off-by: Emilio G. Cota
Message-Id:
From: "Emilio G. Cota"
Paves the way for the addition of a per-TLB lock.
Reviewed-by: Alex Bennée
Reviewed-by: Richard Henderson
Signed-off-by: Emilio G. Cota
Message-Id: <20181009174557.16125-4-c...@braap.org>
Signed-off-by: Richard Henderson
---
include/exec/exec-all.h | 8
Rather than test NOCHAIN before linking, do not emit the
goto_tb opcode at all. We already do this for goto_ptr.
Signed-off-by: Richard Henderson
---
accel/tcg/cpu-exec.c | 2 +-
tcg/tcg-op.c | 9 -
2 files changed, 9 insertions(+), 2 deletions(-)
diff --git
Reviewed-by: David Hildenbrand
Signed-off-by: Richard Henderson
---
target/s390x/mem_helper.c | 128 ++
1 file changed, 61 insertions(+), 67 deletions(-)
diff --git a/target/s390x/mem_helper.c b/target/s390x/mem_helper.c
index e106f61b4e..b5858d2fa2 100644
Reviewed-by: Emilio G. Cota
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
target/i386/mem_helper.c | 9 -
1 file changed, 4 insertions(+), 5 deletions(-)
diff --git a/target/i386/mem_helper.c b/target/i386/mem_helper.c
index 30c26b9d9c..6cc53bcb40 100644
---
On 10/18/18 6:05 PM, Emilio G. Cota wrote:
> This lock will soon protect more fields of the struct. Give
> it a more appropriate name.
>
> Cc: Peter Crosthwaite
> Cc: Richard Henderson
> Signed-off-by: Emilio G. Cota
> ---
> include/qom/cpu.h | 5 +++--
> cpus-common.c | 14
> …
> This is wrong at least for QEMU_CLOCK_HOST.
> …
> Reading the host clock here is not protected by the checkpoint.
> Therefore it may incur the inconsistency when replaying the execution.
That's why I didn't like idea of this patch and asked for any possible side
effects beforehand. So, here
On Wed, Oct 17, 2018 at 10:26:54AM +0200, Markus Armbruster wrote:
> Calling error_report() in a function that takes an Error ** argument
> is suspicious. add_channel() does that, and then exit()s. Its caller
> main(), via qemu_opts_foreach(), is fine with it, but clean it up
> anyway.
>
> Cc:
On Wed, Oct 17, 2018 at 10:26:51AM +0200, Markus Armbruster wrote:
> Calling error_report() in a function that takes an Error ** argument
> is suspicious. vnc_init_func() does that, and then fails without
> setting an error. Its caller main(), via qemu_opts_foreach(), is fine
> with it, but
> Signed-off-by: Artem Pisarenko
> Message-Id: <
549dbf4ebfa4c82051d01a264c27f88929fc277b.1539764043.git.artem.k.pisare...@gmail.com
>
Actually this version has nothing common with my person. Neither original
idea, nor content. Except maybe of my involvement in its discussion, commit
message and
From: "Emilio G. Cota"
As far as I can tell tlb_flush does not need to be called
this early. tlb_flush is eventually called after the CPU
has been realized.
This change paves the way to the introduction of tlb_init,
which will be called from cpu_exec_realizefn.
Cc: Guan Xuetao
Reviewed-by:
When op raises an exception, it may not have initialized the output
temps that would be written back by wout or cout.
Reviewed-by: David Hildenbrand
Signed-off-by: Richard Henderson
---
target/s390x/translate.c | 20 +++-
1 file changed, 15 insertions(+), 5 deletions(-)
diff
Isolate the computation of an index from an address into a
helper before we change that function.
Reviewed-by: Alex Bennée
Signed-off-by: Richard Henderson
[ cota: convert tlb_vaddr_to_host; use atomic_read on addr_write ]
Signed-off-by: Emilio G. Cota
Message-Id:
Reviewed-by: David Hildenbrand
Signed-off-by: Richard Henderson
---
target/s390x/mem_helper.c | 40 +++
target/s390x/translate.c | 25 +---
2 files changed, 38 insertions(+), 27 deletions(-)
diff --git a/target/s390x/mem_helper.c
On 10/18/18 6:05 PM, Emilio G. Cota wrote:
> Instead of open-coding it.
>
> While at it, make sure that all accesses to the list are
> performed while holding the list's lock.
>
> Cc: Peter Crosthwaite
> Cc: Richard Henderson
> Signed-off-by: Emilio G. Cota
> ---
> include/qom/cpu.h | 6
It's perfect valid C to terminate a statement with "," instead of ";" -
it just has a different meaning. Consider this:
#include
int main()
{
if (0)
printf("Hello!\n"),
printf("Good bye!\n");
return 0;
}
At a first glance, you'd expect this program to print "Good
On 10/18/18 6:05 PM, Emilio G. Cota wrote:
> It will gain a user once we protect more of CPUState under cpu->lock.
>
> This completes the conversion to cpu_mutex_lock/unlock in the file.
>
> Signed-off-by: Emilio G. Cota
> ---
> include/qom/cpu.h | 9 +
> cpus-common.c | 17
On Wed, Oct 17, 2018 at 10:26:49AM +0200, Markus Armbruster wrote:
> While errors in the keyboard layout named with -k are fatal, errors in
> included files are reported, but otherwise ignored:
>
> $ cat worst
> include bad
> include worse
> $ ls -l bad worse
> ls: cannot
On Wed, Oct 17, 2018 at 10:26:50AM +0200, Markus Armbruster wrote:
> From: Fei Li
>
> Signed-off-by: Fei Li
> Cc: Gerd Hoffmann
> Signed-off-by: Markus Armbruster
> Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Gerd Hoffmann
The following changes since commit 77f7c747193662edfadeeb3118d63eed0eac51a6:
Merge remote-tracking branch
'remotes/huth-gitlab/tags/pull-request-2018-10-17' into staging (2018-10-18
13:40:19 +0100)
are available in the git repository at:
git://github.com/bonzini/qemu.git
The inotify userspace API for reading events is quite horrible, so it is
useful to wrap it in a more friendly API to avoid duplicating code
across many users in QEMU. Wrapping it also allows introduction of a
platform portability layer, so that we can add impls for non-Linux based
equivalents in
On 17 October 2018 at 22:39, Edgar E. Iglesias wrote:
> From: "Edgar E. Iglesias"
>
> Add a model of Xilinx Versal SoC.
>
> Signed-off-by: Edgar E. Iglesias
> ---
> default-configs/aarch64-softmmu.mak | 1 +
> hw/arm/Makefile.objs| 1 +
> hw/arm/xlnx-versal.c
On 19 October 2018 at 15:40, Thomas Huth wrote:
> Anyway, it's also not only about speeding up the compilation process for
> people who don't want to use the corresponding targets, this is also
> very useful for downstream distributions of QEMU who want to make sure
> to not compile-in more
On 19 October 2018 at 04:21, Jason Wang wrote:
> The following changes since commit 77f7c747193662edfadeeb3118d63eed0eac51a6:
>
> Merge remote-tracking branch
> 'remotes/huth-gitlab/tags/pull-request-2018-10-17' into staging (2018-10-18
> 13:40:19 +0100)
>
> are available in the git
On 19/10/2018 16:43, Peter Maydell wrote:
> I think if we want to support this for downstreams we need
> to look at something better than the default-configs/
> mechanism for it. (Perhaps the kconfig-alike Paolo mentioned
> in a previous thread?)
True, but having more CONFIG_* symbols does not
On 19/10/2018 16:50, Emilio G. Cota wrote:
> On Fri, Oct 19, 2018 at 08:59:24 +0200, Paolo Bonzini wrote:
>> On 19/10/2018 03:05, Emilio G. Cota wrote:
>>> I'm calling this series a v3 because it supersedes the two series
>>> I previously sent about using atomics for interrupt_request:
>>>
The null-machine code used to be target specific since it used the
target-specific cpu_init() function in the past. But in the recent
commit 2278b93941d42c30e2950 ("Use cpu_create(type) instead of
cpu_init(cpu_model)") this has been change, so that the code now
uses the common cpu_create()
On 19/10/2018 14:24, Roman Kapl wrote:
> From: Rudolf Marek
>
> Fix the SYSCALL instruction in 64-bit (long mode). The RF flag
> should be cleared in R11 as well as in the RFLAGS. Intel
> and AMD CPUs behave same. AMD has this documented in the
> APM vol 3.
>
> Signed-off-by: Roman Kapl
>
No one is using this function anymore, so we can safely remove it.
Signed-off-by: Alberto Garcia
Reviewed-by: Max Reitz
---
block.c | 21 -
include/block/block.h | 1 -
2 files changed, 22 deletions(-)
diff --git a/block.c b/block.c
index
Use MAP_STACK in qemu_alloc_stack() on OpenBSD.
Added to our 6.4 release.
MAP_STACK Indicate that the mapping is used as a stack. This
flag must be used in combination with MAP_ANON and
MAP_PRIVATE.
Implement MAP_STACK option for mmap(). Synchronous faults
On Fri, Oct 19, 2018 at 12:02:57PM +0200, Philippe Mathieu-Daudé wrote:
> On 09/10/2018 15:04, Daniel P. Berrangé wrote:
> > From: "Daniel P. Berrange"
> >
> > Add an authorization backend that talks to PAM to check whether the user
> > identity is allowed. This only uses the PAM account
If the user only wants to compile targets that do not require the
"register" device, we should also not compile register.c. Add a proper
CONFIG_REGISTER switch to be able to choose this more flexibly.
Signed-off-by: Thomas Huth
---
default-configs/arm-softmmu.mak| 1 +
On 10/13/18 8:53 PM, Richard Henderson wrote:
Choose return false or raise exception. Except...
I wonder if we might write this as
int shamt = a->shamt;
if (shamt == 0) {
shamt = 64;
}
Good catch. I'll add a comment, that a shamt of 0 is intended for RV128.
IN_ISDIR is not a bit that one can request when registering a
watch with inotify_add_watch. Rather it is a bit that is set
automatically when reading events from the kernel.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Daniel P. Berrangé
---
hw/usb/dev-mtp.c | 3 +--
1 file changed, 1
An update to
v2: https://lists.gnu.org/archive/html/qemu-devel/2018-06/msg04469.html
v3: https://lists.gnu.org/archive/html/qemu-devel/2018-06/msg05660.html
v4: https://lists.gnu.org/archive/html/qemu-devel/2018-08/msg02961.html
v5:
When an object is in turn owned by another user object, it is not
desirable to expose this in the QOM object hierarchy, as it is
just an internal implementation detail, we should be free to change
without exposure.
Reviewed-by: Philippe Mathieu-Daudé
Tested-by: Philippe Mathieu-Daudé
On 11 October 2018 at 21:52, Richard Henderson
wrote:
> Instead of shifts and masks, use direct loads and stores from the neon
> register file. Mirror the iteration structure of the ARM pseudocode
> more closely. Correct the parameters of the VLD2 A2 insn.
So is this actually fixing a bug
Commit 97f40301f1d "error: Functions to report warnings and
informational messages" copied the "use error_setg() instead"
admonition from the error reporting functions to new functions even
though it doesn't actually apply there. Drop it. Also drop it from
vreport(), where it doesn't apply
On Fri, Oct 19, 2018 at 11:41:45AM +0200, Philippe Mathieu-Daudé wrote:
> On 09/10/2018 15:04, Daniel P. Berrangé wrote:
> > Add a QAuthZListFile object type that implements the QAuthZ interface. This
> > built-in implementation is a proxy around the QAtuhZList object type,
> > initializing it
On 2018-10-19 14:26, Paolo Bonzini wrote:
> Other people are doing a much better work than myself at handling some
> subsystems. For those files it is better if I downgrade myself to
> reviewer or recognize that I am not actually doing any work there.
>
> Cc: Daniel P. Berrange
> Cc: Gerd
On 19/10/2018 14:55, Daniel P. Berrangé wrote:
> On Fri, Oct 19, 2018 at 12:02:57PM +0200, Philippe Mathieu-Daudé wrote:
>> On 09/10/2018 15:04, Daniel P. Berrangé wrote:
>>> From: "Daniel P. Berrange"
>>>
>>> Add an authorization backend that talks to PAM to check whether the user
>>> identity
On 19/10/2018 14:26, Paolo Bonzini wrote:
> Other people are doing a much better work than myself at handling some
> subsystems. For those files it is better if I downgrade myself to
> reviewer or recognize that I am not actually doing any work there.
>
> Cc: Daniel P. Berrange
> Cc: Gerd
On 11 October 2018 at 21:51, Richard Henderson
wrote:
> Signed-off-by: Richard Henderson
> ---
> target/arm/translate.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/target/arm/translate.c b/target/arm/translate.c
> index 736880ee71..d59ffa1c67 100644
> ---
On 11 October 2018 at 21:52, Richard Henderson
wrote:
> Signed-off-by: Richard Henderson
> ---
> target/arm/translate.c | 81 ++
> 1 file changed, 26 insertions(+), 55 deletions(-)
> -/* VLD2/3/4 to all lanes: bit 5 indicates register
We've got many devices that can not be created directly by the user
and which are only used on some few target architectures. When the
user does not compile the corresponding qemu-softmmu-xxx target, we
should also not compile these devices. Add some CONFIG switches to
make our build system a
If the user only wants to compile targets that do not require the
"split-irq" device, we should also not compile split-irq.c. Add a proper
CONFIG_SPLIT_IRQ switch to be able to choose this more flexibly.
Signed-off-by: Thomas Huth
---
default-configs/arm-softmmu.mak | 1 +
hw/core/Makefile.objs
On Fri, Oct 19, 2018 at 11:33:06AM +0200, Philippe Mathieu-Daudé wrote:
> Hi Daniel,
>
> On 09/10/2018 15:04, Daniel P. Berrangé wrote:
> > From: "Daniel P. Berrange"
> >
> > Add a QAuthZList object type that implements the QAuthZ interface. This
> > built-in implementation maintains a trivial
In many cases a single VM will just need to whilelist a single identity
as the allowed user of network services. This is especially the case for
TLS live migration (optionally with NBD storage) where we just need to
whitelist the x509 certificate distinguished name of the source QEMU
host.
Via
gnutls 3.0.0 was released in 2011 and all the distros that are build
target platforms for QEMU [1] include it:
RHEL-7: 3.1.18
Debian (Stretch): 3.5.8
Debian (Jessie): 3.3.8
OpenBSD (ports): 3.5.18
FreeBSD (ports): 3.5.18
OpenSUSE Leap 15: 3.6.2
Ubuntu (Xenial): 3.4.10
macOS
On 19 October 2018 at 14:14, Thomas Huth wrote:
> If the user only wants to compile targets that do not require the
> "split-irq" device, we should also not compile split-irq.c. Add a proper
> CONFIG_SPLIT_IRQ switch to be able to choose this more flexibly.
>
> Signed-off-by: Thomas Huth
> ---
>
On 19 October 2018 at 14:14, Thomas Huth wrote:
> If the user only wants to compile targets that do not require the
> "register" device, we should also not compile register.c. Add a proper
> CONFIG_REGISTER switch to be able to choose this more flexibly.
>
> Signed-off-by: Thomas Huth
> ---
>
On 10/19/18 7:28 AM, Peter Maydell wrote:
> On 19 October 2018 at 02:56, Richard Henderson
> wrote:
>> Only the EL0 and EL1 TLBs are affected by the EL1 register,
>> so flush only 2 of the 8 TLBs.
>>
>> In testing a boot of the Ubuntu installer to the first menu, this
>> accounts for nearly all
nettle 2.7.1 was released in 2013 and all the distros that are build
target platforms for QEMU [1] include it:
RHEL-7: 2.7.1
Debian (Stretch): 3.3
Debian (Jessie): 2.7.1
OpenBSD (ports): 3.4
FreeBSD (ports): 3.4
OpenSUSE Leap 15: 3.4
Ubuntu (Xenial): 3.2
macOS (Homebrew): 3.4
On 11 October 2018 at 21:51, Richard Henderson
wrote:
> The conversion to gvec is by no means complete, but it brings aa32
> to parity with the work already done for aa64. Plus some misc changes,
> at least one of which has been sitting on a branch for 2 years. ;-P
>
> I've run the result
On 10/19/18 6:50 AM, Peter Maydell wrote:
> On 11 October 2018 at 21:52, Richard Henderson
> wrote:
>> Instead of shifts and masks, use direct loads and stores from the neon
>> register file. Mirror the iteration structure of the ARM pseudocode
>> more closely. Correct the parameters of the
On 10/13/18 8:53 PM, Richard Henderson wrote:
On 10/12/18 10:30 AM, Bastian Koppelmann wrote:
+static bool trans_c_addi(DisasContext *ctx, arg_c_addi *a, uint16_t insn)
+{
+if (a->imm == 0) {
+return true;
+}
return false, I think.
Those are HINTS, which means the
On 10/19/18 5:04 AM, Philippe Mathieu-Daudé wrote:
> Hi Richard,
>
> On 17/10/2018 00:31, Richard Henderson wrote:
>> Create struct ARMISARegisters, to be accessed during translation.
>>
>> Signed-off-by: Richard Henderson
>> ---
>> target/arm/cpu.h | 32
>> hw/intc/armv7m_nvic.c
On 10/19/18 8:28 AM, Bastian Koppelmann wrote:
>
> On 10/13/18 8:53 PM, Richard Henderson wrote:
>> On 10/12/18 10:30 AM, Bastian Koppelmann wrote:
>>> +static bool trans_c_addi(DisasContext *ctx, arg_c_addi *a, uint16_t insn)
>>> +{
>>> + if (a->imm == 0) {
>>> + return true;
>>> +
On 10/19/18 7:39 AM, Markus Armbruster wrote:
Commit 97f40301f1d "error: Functions to report warnings and
informational messages" copied the "use error_setg() instead"
admonition from the error reporting functions to new functions even
though it doesn't actually apply there. Drop it. Also drop
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