Pavel Dovgalyuk writes:
> When debugging with the watchpoints, qemu may need to create
> TB with single instruction. This is achieved by setting cpu->cflags_next_tb.
> But when this block is about to execute, it may be interrupted by another
> thread. In this case cflags will be lost and next
Refuse to push the attention button in case the guest is busy with some
hotplug operation (as indicated by the power indicator blinking).
Signed-off-by: Gerd Hoffmann
---
hw/pci/pcie.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/hw/pci/pcie.c b/hw/pci/pcie.c
index
This new ioctl let user to split an exising memory region into two
parts. The first part reuses the existing memory region but have a
shrinked size. The second part is a newly created one.
Signed-off-by: Yu Zhang
Signed-off-by: Chao Peng
---
arch/x86/kvm/x86.c | 3 +-
Currently support to exit to userspace for private/shared memory
conversion.
Signed-off-by: Sean Christopherson
Signed-off-by: Yu Zhang
Signed-off-by: Chao Peng
---
arch/x86/kvm/mmu/mmu.c | 20
include/uapi/linux/kvm.h | 15 +++
2 files changed, 35
On 11/11/21 11:03 AM, Philippe Mathieu-Daudé wrote:
If the MachineClass::name pointer is not explicitly set, it is NULL.
Per the C standard, passing a NULL pointer to printf "%s" format is
undefined. Some implementations display it as 'NULL', other as 'null'.
Since we are comparing the formatted
On 11/11/2021 01:35, Xiaojuan Yang wrote:
LoongArch is a new RISC ISA, support 32bit mode
or 64bit mode. Now we only add 64bit support.
More detailed info you can see
https://github.com/loongson/LoongArch-Documentation
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
We don't need to handle KeyboardInterruptError specifically; we can
instead tighten the scope of the broad Exception handlers to only catch
"Exception", which has the effect of allowing all BaseException classes
that do not inherit from Exception to be raised through.
KeyboardInterruptError and a
Hi Jamie,
On 11/11/21 15:11, Jamie Iles wrote:
> On Linux, read() will only ever read a maximum of 0x7000 bytes
> regardless of what is asked. If the file is larger than 0x7000
> bytes the read will need to be broken up into multiple chunks.
>
> Cc: Luc Michel
> Signed-off-by: Jamie
On Thu, Nov 11, 2021 at 12:32:36PM +0100, Igor Mammedov wrote:
> On Thu, 11 Nov 2021 03:34:37 -0500
> "Michael S. Tsirkin" wrote:
>
> > On Wed, Nov 10, 2021 at 04:11:40PM -0500, Igor Mammedov wrote:
> > > From: Julia Suvorova
> > >
> > > The changes are the result of
> > >
On 11.11.2021 16.13, Chao Peng wrote:
Currently support to exit to userspace for private/shared memory
conversion.
Signed-off-by: Sean Christopherson
Signed-off-by: Yu Zhang
Signed-off-by: Chao Peng
---
arch/x86/kvm/mmu/mmu.c | 20
include/uapi/linux/kvm.h | 15
These buffers can be anything, not an array of chars,
so use the 'void *' type for them.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/nvme/nvme.h | 4 ++--
hw/nvme/ctrl.c | 10 +-
2 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/hw/nvme/nvme.h b/hw/nvme/nvme.h
index
Signed-off-by: LIU Zhiwei
---
target/riscv/cpu_bits.h | 2 ++
target/riscv/csr.c | 8 +---
2 files changed, 7 insertions(+), 3 deletions(-)
diff --git a/target/riscv/cpu_bits.h b/target/riscv/cpu_bits.h
index 9913fa9f77..5106f0e769 100644
--- a/target/riscv/cpu_bits.h
+++
Signed-off-by: LIU Zhiwei
Reviewed-by: Richard Henderson
---
target/riscv/helper.h | 2 +-
target/riscv/insn_trans/trans_rvv.c.inc | 4 ++--
target/riscv/vector_helper.c| 8 +---
3 files changed, 8 insertions(+), 6 deletions(-)
diff --git
On Tue, 9 Nov 2021 at 22:52, Leif Lindholm wrote:
>
> On Tue, Nov 09, 2021 at 21:21:46 +, Peter Maydell wrote:
> > The other thing we should nail down is how the user is going to
> > select which flavour of machine they want to provide. Three
> > options:
> > (1) no control, QEMU just
On Nov 11 16:45, Philippe Mathieu-Daudé wrote:
> Some trivial notes I took while reviewing CVE-2021-3947:
> https://lore.kernel.org/qemu-devel/2021153125.2258176-1-phi...@redhat.com/
>
> Based-on: <2021153125.2258176-1-phi...@redhat.com>
>
> *** BLURB HERE ***
>
> Philippe Mathieu-Daudé
On 11/11/21 2:35 AM, Xiaojuan Yang wrote:
+void *irq[N_IRQS];
qemu_irq, not void*.
+QEMUTimer *timer; /* Internal timer */
You can add this into the CPUArchState structure, rather than reference via pointer. It
is always present with the cpu.
Neither of these are needed for
On 11/11/21 15:11, Jamie Iles wrote:
> Various loader functions return an int which limits images to 2GB which
> is fine for things like a BIOS/kernel image, but if we want to be able
> to load memory images or large ramdisks then any file over 2GB would
> silently fail to load.
>
> Cc: Luc
These errors are expected, so they shouldn't clog up terminal output. In
the event that they're *not* expected, we'll be seeing an awful lot more
output concerning the nature of the failure.
Reported-by: Thomas Huth
Signed-off-by: John Snow
---
scripts/device-crash-test | 6 ++
1 file
When ConnectError is used to wrap an Exception that was initialized
without an error message, we are treated to a traceback with a rubbish
line like this:
... ConnectError: Failed to establish session:
Correct this to use the name of an exception as a fallback message:
... ConnectError: Failed
Kevin Wolf writes:
> While introducing a non-QemuOpts code path for device creation for JSON
> -device, we noticed that QMP device_add doesn't check its input
> correctly (accepting arguments that should have been rejected), and that
> users may be relying on this behaviour (libvirt did until it
On 11/11/2021 01:34, Xiaojuan Yang wrote:
Sorry only part of the v2 patch succeed. I consulted GNU sysadmin,
He said our mail server was getting temporarily banned by fail2ban. Now the ban
was removed. I resend the v2 series patch. For uefi is preparing to submit to
the community only uefi
On 11/11/2021 12:49, Richard Henderson wrote:
On 11/11/21 6:58 AM, LIU Zhiwei wrote:
Signed-off-by: LIU Zhiwei
---
target/riscv/csr.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/target/riscv/csr.c b/target/riscv/csr.c
index 8f8f170768..43eaa6c710 100644
---
The read from PC for translation is in cpu_get_tb_cpu_state, before translation.
Signed-off-by: LIU Zhiwei
Reviewed-by: Richard Henderson
---
target/riscv/cpu_helper.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c
As pc will be written by the xepc in exception return, just ignore
pc in translation.
Signed-off-by: LIU Zhiwei
Reviewed-by: Richard Henderson
---
target/riscv/helper.h | 4 ++--
target/riscv/insn_trans/trans_privileged.c.inc | 7 ++-
target/riscv/op_helper.c
Paolo Bonzini writes:
> From: Maxim Levitsky
>
> Signed-off-by: Maxim Levitsky
> [Extracted from Maxim's patch into a separate commit. - Paolo]
> Signed-off-by: Paolo Bonzini
Reviewed-by: Alex Bennée
--
Alex Bennée
On 11/11/21 12:38, Philippe Mathieu-Daudé wrote:
Simpler:
gdbserver_state.supported_sstep_flags = SSTEP_ENABLE;
+/*
+ * In replay mode all events written into the log should be replayed.
+ * That is why NOIRQ flag is removed in this mode.
+ */
if (replay_mode ==
On Thu, Nov 11, 2021 at 12:11:19PM -0500, Michael S. Tsirkin wrote:
> On Thu, Nov 11, 2021 at 09:35:37AM +, Daniel P. Berrangé wrote:
> > On Thu, Nov 11, 2021 at 03:20:07AM -0500, Michael S. Tsirkin wrote:
> > > On Thu, Nov 11, 2021 at 08:53:06AM +0100, Gerd Hoffmann wrote:
> > > > Hi,
> > >
On 11/11/21 19:08, Klaus Jensen wrote:
> On Nov 11 16:31, Philippe Mathieu-Daudé wrote:
>> Both 'buf_len' and 'off' arguments are under guest control.
>> Since nvme_c2h() doesn't check out of boundary access, the
>> caller must check for eventual buffer overrun on 'trans_len'.
>>
>> Cc:
Pavel Dovgalyuk writes:
> Watchpoint may be processed in two phases. First one is detecting
> the instruction with target memory access. And the second one is
> executing only one instruction and setting the debug interrupt flag.
> Hardware interrupts can break this sequence when they happen
On 11/11/21 2:35 AM, Xiaojuan Yang wrote:
@@ -179,12 +181,22 @@ static void loongarch_cpu_reset(DeviceState *dev)
LoongArchCPU *cpu = LOONGARCH_CPU(cs);
LoongArchCPUClass *lacc = LOONGARCH_CPU_GET_CLASS(cpu);
CPULoongArchState *env = >env;
+uint64_t data;
/rth7680/qemu.git tags/pull-tcg-2021
for you to fetch changes up to d58f01733b94845b0c2232018a2bedb6a2347ec5:
tcg/s390x: Fix tcg_out_vec_op argument type (2021-11-11 11:47:58 +0100)
appease coverity vs extract2
update docs
Upon reading/writing the migration data there is no real reason to limit
the read/write system call from the file to be 8 bytes.
In addition, there is no reason to depend on the file offset alignment.
The offset is just some logical value which depends also on the region
index and has nothing to
Signed-off-by: Chao Peng
---
hw/core/machine-hmp-cmds.c | 3 +++
hw/core/machine-qmp-cmds.c | 1 +
qapi/machine.json | 3 +++
qapi/qom.json | 3 +++
4 files changed, 10 insertions(+)
diff --git a/hw/core/machine-hmp-cmds.c b/hw/core/machine-hmp-cmds.c
index
Call memfd_register_guest() module API to setup private_ops for a given
private memslot.
Signed-off-by: Sean Christopherson
Signed-off-by: Yu Zhang
Signed-off-by: Chao Peng
---
arch/x86/kvm/Makefile| 2 +-
arch/x86/kvm/memfd.c | 63
On Linux, read() will only ever read a maximum of 0x7000 bytes
regardless of what is asked. If the file is larger than 0x7000
bytes the read will need to be broken up into multiple chunks.
Cc: Luc Michel
Signed-off-by: Jamie Iles
---
hw/core/loader.c | 40
Signed-off-by: Chao Peng
---
accel/kvm/kvm-all.c| 49 ++
include/sysemu/kvm.h | 1 +
target/arm/kvm.c | 5 +
target/i386/kvm/kvm.c | 27 +++
target/mips/kvm.c | 5 +
target/ppc/kvm.c | 5 +
On 11/11/2021 01:35, Xiaojuan Yang wrote:
This patch realize the IPI interrupt controller.
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
hw/loongarch/ipi.c | 144 +++
hw/loongarch/ls3a5000_virt.c | 1 +
hw/loongarch/meson.build
On 11/11/2021 01:35, Xiaojuan Yang wrote:
This patch realize the PCH-PIC interrupt controller.
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
hw/intc/Kconfig | 4 +
hw/intc/loongarch_pch_pic.c | 283
hw/intc/meson.build
We need not specially process vtype when XLEN changes.
Signed-off-by: LIU Zhiwei
Reviewed-by: Richard Henderson
---
target/riscv/cpu.h | 1 +
target/riscv/cpu_helper.c| 3 +--
target/riscv/csr.c | 13 -
target/riscv/machine.c | 5 +++--
When sew <= 32bits, not need to extend scalar reg.
When sew > 32bits, if xlen is less that sew, we should sign extend
the scalar register, except explicitly specified by the spec.
Signed-off-by: LIU Zhiwei
---
target/riscv/insn_trans/trans_rvv.c.inc | 44 ++---
1 file
Signed-off-by: LIU Zhiwei
Reviewed-by: Richard Henderson
---
target/riscv/csr.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/target/riscv/csr.c b/target/riscv/csr.c
index 9f41954894..74c0b788fd 100644
--- a/target/riscv/csr.c
+++ b/target/riscv/csr.c
@@ -1445,6 +1445,9 @@ static bool
Paolo Bonzini writes:
> From: Maxim Levitsky
>
> handle_query_qemu_sstepbits is reporting NOIRQ and NOTIMER bits
> even if they are not supported (as is the case with record/replay).
> Instead, store the supported singlestep flags and reject
> any unsupported bits in handle_set_qemu_sstep.
With this patch hot-plugged pci devices will only be visible to the
guest if the guests hotplug driver has enabled slot power.
This should fix the hot-plug race which one can hit when hot-plugging
a pci device at boot, while the guest is in the middle of the pci bus
scan.
Signed-off-by: Gerd
On 11/11/21 11:03 AM, Philippe Mathieu-Daudé wrote:
All methods related to MachineState are prefixed with "machine_".
smp_parse() does not need to be an exception. Rename it and
const'ify the SMPConfiguration argument, since it doesn't need
to be modified.
Signed-off-by: Philippe Mathieu-Daudé
On 11/11/21 11:03 AM, Philippe Mathieu-Daudé wrote:
There is a single MachineClass object, registered with
type_register_static(_machine_info). Since the same
object is used multiple times (an MachineState object
is instantiated in both test_generic and test_with_dies),
we should restore its
On 11/11/21 11:03 AM, Philippe Mathieu-Daudé wrote:
We can simply use a local variable (and pass its pointer) instead
of a pointer to a compound literal.
Signed-off-by: Philippe Mathieu-Daudé
---
tests/unit/test-smp-parse.c | 64 ++---
1 file changed, 32
Paolo Bonzini writes:
> On 11/11/21 07:11, Markus Armbruster wrote:
>> Paolo Bonzini writes:
>>
On 11/3/21 09:02, Markus Armbruster wrote:
> I wonder whether we really have to step through three states
>
>x-exit-preconfig cont
> preconfig ---> pre run
After the return from tcp_chr_recv, tcp_chr_sync_read calls into a
function which eventually makes a system call and may clobber errno.
Make a copy of errno right after tcp_chr_recv and restore the errno on
return from tcp_chr_sync_read.
Signed-off-by: Roman Kagan
---
chardev/char-socket.c | 3
Replace the array of pm_mask/pm_base with scalar variables.
Remove the cached array value in DisasContext.
Signed-off-by: LIU Zhiwei
Reviewed-by: Richard Henderson
---
target/riscv/translate.c | 32
1 file changed, 8 insertions(+), 24 deletions(-)
diff --git
Signed-off-by: LIU Zhiwei
Reviewed-by: Richard Henderson
---
target/riscv/insn_trans/trans_rvv.c.inc | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/target/riscv/insn_trans/trans_rvv.c.inc
b/target/riscv/insn_trans/trans_rvv.c.inc
index 6fa673f4b2..6cc83356d9 100644
---
On Thu, Nov 11, 2021 at 09:35:37AM +, Daniel P. Berrangé wrote:
> On Thu, Nov 11, 2021 at 03:20:07AM -0500, Michael S. Tsirkin wrote:
> > On Thu, Nov 11, 2021 at 08:53:06AM +0100, Gerd Hoffmann wrote:
> > > Hi,
> > >
> > > > Given it's a bugfix, and given that I hear through internal
Paolo Bonzini writes:
> From: Maxim Levitsky
>
> Use the KVM_GUESTDBG_BLOCKIRQ debug flag if supported.
>
> Signed-off-by: Maxim Levitsky
> [Extracted from Maxim's patch into a separate commit. - Paolo]
> Signed-off-by: Paolo Bonzini
Reviewed-by: Alex Bennée
--
Alex Bennée
On 11/11/21 4:18 PM, Frédéric Pétrot wrote:
Still missing the update for write_sstatus, which I think is simply an update to
sstatus_v1_10_mask.
I take the liberty to jump in as I face the issue of updating that mask in
the
128-bit patches: sstatus_v1_10_mask is a target_ulong, and when
On Thu, Nov 11, 2021 at 06:08:11PM +, Daniel P. Berrangé wrote:
> On Thu, Nov 11, 2021 at 12:11:19PM -0500, Michael S. Tsirkin wrote:
> > On Thu, Nov 11, 2021 at 09:35:37AM +, Daniel P. Berrangé wrote:
> > > On Thu, Nov 11, 2021 at 03:20:07AM -0500, Michael S. Tsirkin wrote:
> > > > On
Add an expire time for pending delete, once the time is over allow
pressing the attention button again.
This makes pcie hotplug behave more like acpi hotplug, where one can
try sending an 'device_del' monitor command again in case the guest
didn't respond to the first attempt.
Signed-off-by:
On 11/11/21 2:35 AM, Xiaojuan Yang wrote:
+++ b/target/loongarch/cpu.h
@@ -369,8 +369,21 @@ enum {
EXCP_BREAK,
EXCP_INE,
EXCP_FPE,
-
-EXCP_LAST = EXCP_FPE,
+EXCP_IPE,
+EXCP_TLBL,
+EXCP_TLBS,
+EXCP_INST_NOTAVAIL,
+EXCP_TLBM,
+EXCP_TLBPE,
+
Existing memslots functions are extended to pass a bool ‘private’
parameter to indicate whether the operation is on guest private memory
address space or not.
Signed-off-by: Sean Christopherson
Signed-off-by: Yu Zhang
Signed-off-by: Chao Peng
---
arch/x86/include/asm/kvm_host.h | 5 +++--
The new seal is only allowed if there's no pre-existing pages in the fd
and there's no existing mapping of the file. After the seal is set, no
read/write/mmap from userspace is allowed.
Signed-off-by: Kirill A. Shutemov
Signed-off-by: Yu Zhang
Signed-off-by: Chao Peng
---
Signed-off-by: Chao Peng
---
linux-headers/asm-x86/kvm.h | 5 +
linux-headers/linux/kvm.h | 29 +
2 files changed, 30 insertions(+), 4 deletions(-)
diff --git a/linux-headers/asm-x86/kvm.h b/linux-headers/asm-x86/kvm.h
index a6c327f8ad..f9aadf0ebb 100644
---
On 11/11/21 11:03 AM, Philippe Mathieu-Daudé wrote:
smp_machine_class_init() is the actual TypeInfo::class_init().
Declare it as such in smp_machine_info, and avoid to call it
manually in each test. Move smp_machine_info definition just
before we register the type to avoid a forward declaration.
On 25.10.21 12:17, Emanuele Giuseppe Esposito wrote:
block.h currently contains a mix of functions:
some of them run under the BQL and modify the block layer graph,
others are instead thread-safe and perform I/O in iothreads.
It is not easy to understand which function is part of which
group
Error propagation between the generic vhost code and the specific backends is
not quite consistent: some places follow "return -1 and set errno" convention,
while others assume "return negated errno". Furthermore, not enough care is
taken not to clobber errno.
As a result, on certain code paths
vhost-user-blk realize only attempts to reconnect if the previous
connection attempt failed on "a problem with the connection and not an
error related to the content (which would fail again the same way in the
next attempt)".
However this distinction is very subtle, and may be inadvertently
As its name suggests, ChardevClass.chr_sync_read is supposed to do a
blocking read. The only implementation of it, tcp_chr_sync_read, does
set the underlying io channel to the blocking mode indeed.
Therefore a failure return with EAGAIN is not expected from this call.
So do not retry it in
Hi Philippe,
On Thu, Nov 11, 2021 at 03:55:48PM +0100, Philippe Mathieu-Daudé wrote:
> Hi Jamie,
>
> On 11/11/21 15:11, Jamie Iles wrote:
> > On Linux, read() will only ever read a maximum of 0x7000 bytes
> > regardless of what is asked. If the file is larger than 0x7000
> > bytes the
On Thu, Nov 11, 2021 at 01:09:05PM +0100, Gerd Hoffmann wrote:
> Hi,
>
> > When the acpihp driver is used the linux kernel will just call the aml
> > methods and I suspect the pci device will stay invisible then because
> > nobody flips the slot power control bit (with native-hotplug=on, for
>
In some cases, we must restore the guest PC to the address of the start of
the TB, such as when the instruction counter hits zero. So extend pc register
according to current xlen for these cases.
Signed-off-by: LIU Zhiwei
Reviewed-by: Richard Henderson
---
target/riscv/cpu.c| 22
Some trivial notes I took while reviewing CVE-2021-3947:
https://lore.kernel.org/qemu-devel/2021153125.2258176-1-phi...@redhat.com/
Based-on: <2021153125.2258176-1-phi...@redhat.com>
*** BLURB HERE ***
Philippe Mathieu-Daudé (2):
hw/nvme/ctrl: Have nvme_addr_write() take const buffer
On Wed, Nov 10, 2021 at 04:53:33PM +0100, Christian Schoenebeck wrote:
> On Mittwoch, 10. November 2021 16:14:19 CET Stefan Hajnoczi wrote:
> > On Wed, Nov 10, 2021 at 02:14:43PM +0100, Christian Schoenebeck wrote:
> > > On Mittwoch, 10. November 2021 11:05:50 CET Stefan Hajnoczi wrote:
> > > As
Am 11.11.2021 um 13:08 hat Hanna Reitz geschrieben:
> Hi,
>
> v1 cover letter:
> https://lists.nongnu.org/archive/html/qemu-devel/2021-11/msg01287.html
>
> In v2 I’ve addressed the comments I’ve received from Kevin and Vladimir.
> To this end, I’ve retained only the non-controversial part in
On Nov 11 16:31, Philippe Mathieu-Daudé wrote:
> Both 'buf_len' and 'off' arguments are under guest control.
> Since nvme_c2h() doesn't check out of boundary access, the
> caller must check for eventual buffer overrun on 'trans_len'.
>
> Cc: qemu-sta...@nongnu.org
> Reported-by: Qiuhao Li
>
On 11/11/2021 01:35, Xiaojuan Yang wrote:
Hi Xiaojuan,
This is a model of the PCIe Host Bridge found on a Loongson-5000
processor. It includes a interrupt controller, some interface for
pci and nonpci devices we only emulate part devices for tcg mode.
It support for MSI and MSIX interrupt
On 11/9/21 18:50, Paolo Bonzini wrote:
> The device is created by the machine based on the sgx-epc property.
> It should not be created by users.
>
> Reported-by: Thomas Huth
> Signed-off-by: Paolo Bonzini
> ---
> hw/i386/sgx-epc.c | 1 +
> 1 file changed, 1 insertion(+)
Reviewed-by: Philippe
Various loader functions return an int which limits images to 2GB which
is fine for things like a BIOS/kernel image, but if we want to be able
to load memory images or large ramdisks then any file over 2GB would
silently fail to load.
Cc: Luc Michel
Signed-off-by: Jamie Iles
---
Most of the loader code currently uses a ssize_t or 64 bit integer type
to store image lengths, but many functions that handle loading return an
int with a negative value on error or length on success. Once an image
exceeds 2GB this will cause an integer overflow and so can end up
loading
Signed-off-by: Chao Peng
---
hw/core/machine.c | 38 ++
hw/i386/pc.c| 22 --
include/hw/boards.h | 2 ++
softmmu/vl.c| 16 ++--
4 files changed, 66 insertions(+), 12 deletions(-)
diff --git
Signed-off-by: Chao Peng
---
include/exec/address-spaces.h | 2 ++
softmmu/physmem.c | 13 +
2 files changed, 15 insertions(+)
diff --git a/include/exec/address-spaces.h b/include/exec/address-spaces.h
index db8bfa9a92..b3f45001c0 100644
---
On 11/11/2021 01:35, Xiaojuan Yang wrote:
Loongson-3A5000 support 14 interrupts from 64 - 77(Timer->75 IPI->76)
Loongson-3A5000 and ls7a form a legacy model and extended model irq
hierarchy.Tcg mode emulate a simplified extended model which
has no Legacy I/O Interrupt Controller(LIOINTC) and
On 11/11/2021 01:35, Xiaojuan Yang wrote:
This patch realize PCH-MSI interrupt controller.
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
hw/intc/Kconfig | 5 ++
hw/intc/loongarch_pch_msi.c | 73 +
hw/intc/meson.build
Fix the (hypothetical) potential problem when the value parsed out of
the vhost module parameter in sysfs overflows the return value from
vhost_kernel_memslots_limit.
Signed-off-by: Roman Kagan
---
hw/virtio/vhost-backend.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
The generic vhost code expects that many of the VhostOps methods in the
respective backends set errno on errors. However, none of the existing
backends actually bothers to do so. In a number of those methods errno
from the failed call is clobbered by successful later calls to some
library
On 11/11/21 12:05 PM, Laurent Vivier wrote:
+QEMU_BUILD_BUG_ON(sizeof(*hde) < sizeof(*tde));
Oof, this triggers on i386 host, aarch64 guest.
Sorry about that, I'll revise.
r~
On 11/11/21 16:43, Philippe Mathieu-Daudé wrote:
> On 11/11/21 16:36, Jamie Iles wrote:
>> Hi Philippe,
>>
>> On Thu, Nov 11, 2021 at 03:55:48PM +0100, Philippe Mathieu-Daudé wrote:
>>> Hi Jamie,
>>>
>>> On 11/11/21 15:11, Jamie Iles wrote:
On Linux, read() will only ever read a maximum of
When pc is written, it is sign-extended to fill the widest supported XLEN.
Signed-off-by: LIU Zhiwei
Reviewed-by: Richard Henderson
---
target/riscv/translate.c | 16
1 file changed, 12 insertions(+), 4 deletions(-)
diff --git a/target/riscv/translate.c
Write mask is representing the bits we care about.
Signed-off-by: LIU Zhiwei
Reviewed-by: Richard Henderson
---
target/riscv/insn_trans/trans_rvi.c.inc | 4 ++--
target/riscv/op_helper.c| 3 ++-
2 files changed, 4 insertions(+), 3 deletions(-)
diff --git
The 'buf' argument is not modified, so better pass it as const type.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/nvme/ctrl.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/nvme/ctrl.c b/hw/nvme/ctrl.c
index 634b290e069..c7cce63372a 100644
--- a/hw/nvme/ctrl.c
+++
Only check the range that has passed the address translation.
Signed-off-by: LIU Zhiwei
Reviewed-by: Richard Henderson
---
target/riscv/vector_helper.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target/riscv/vector_helper.c b/target/riscv/vector_helper.c
index
Use cached cur_pmmask and cur_pmbase to infer the
current PM mode.
This may decrease the TCG IR by one when pm_enabled
is true and pm_base_enabled is false.
Signed-off-by: LIU Zhiwei
Reviewed-by: Richard Henderson
---
target/riscv/cpu.h| 3 ++-
target/riscv/cpu_helper.c | 25
Signed-off-by: LIU Zhiwei
Reviewed-by: Richard Henderson
---
target/riscv/cpu.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
index 52ce670cbe..b48c7c346c 100644
--- a/target/riscv/cpu.h
+++ b/target/riscv/cpu.h
@@ -105,7 +105,7 @@
On 02/11/2021 14:46, Peter Maydell wrote:
On Mon, 1 Nov 2021 at 20:31, Mark Cave-Ayland
wrote:
The recent ESCC reset changes cause a regression when attemping to use a real
SS-5 Sun PROM instead of OpenBIOS. The Sun PROM doesn't send an explicit reset
command to the ESCC but gets stuck in a
On 11/11/21 2:35 AM, Xiaojuan Yang wrote:
This includes:
- CSRRD
- CSRWR
- CSRXCHG
- IOCSR{RD/WR}.{B/H/W/D}
I think IOCSR should be in a separate patch.
It's completely unrelated to the other CSRs.
+target_ulong helper_csr_rdq(CPULoongArchState *env, uint64_t csr)
+{
+int64_t v;
+
+
On Donnerstag, 11. November 2021 17:31:52 CET Stefan Hajnoczi wrote:
> On Wed, Nov 10, 2021 at 04:53:33PM +0100, Christian Schoenebeck wrote:
> > On Mittwoch, 10. November 2021 16:14:19 CET Stefan Hajnoczi wrote:
> > > On Wed, Nov 10, 2021 at 02:14:43PM +0100, Christian Schoenebeck wrote:
> > > >
On 11/11/21 2:35 AM, Xiaojuan Yang wrote:
+static bool trans_tlbwr(DisasContext *ctx, arg_tlbwr *a)
+{
+gen_helper_check_plv(cpu_env);
+gen_helper_tlbwr(cpu_env);
+tcg_gen_movi_tl(cpu_pc, ctx->base.pc_next + 4);
+ctx->base.is_jmp = DISAS_EXIT;
+return true;
+}
I think you
On Thu, Nov 11, 2021 at 16:55:09 +, Peter Maydell wrote:
> On Tue, 9 Nov 2021 at 22:52, Leif Lindholm wrote:
> >
> > On Tue, Nov 09, 2021 at 21:21:46 +, Peter Maydell wrote:
> > > The other thing we should nail down is how the user is going to
> > > select which flavour of machine they
This allows to power off pci devices. In "off" state the devices will
not be visible. No pci config space access, no pci bar access, no dma.
Default state is "on", so this patch (alone) should not change behavior.
Use case: Allows hotplug controllers implement slot power. Hotplug
controllers
v2:
- rebase to latest master, solve conflicts.
- drop 'RfC' from subject.
Gerd Hoffmann (6):
pci: implement power state
pcie: implement slot power control for pcie root ports
pcie: add power indicator blink check
pcie: factor out pcie_cap_slot_unplug()
pcie: fast unplug when slot
Signed-off-by: Chao Peng
---
accel/kvm/kvm-all.c | 9 +
include/sysemu/kvm_int.h | 1 +
2 files changed, 10 insertions(+)
diff --git a/accel/kvm/kvm-all.c b/accel/kvm/kvm-all.c
index 0125c17edb..d336458e9e 100644
--- a/accel/kvm/kvm-all.c
+++ b/accel/kvm/kvm-all.c
@@ -138,6 +138,7
Currently only memfd is supported.
Signed-off-by: Chao Peng
---
backends/hostmem-memfd.c | 12 +---
backends/hostmem.c | 24
include/exec/memory.h| 3 +++
include/exec/ram_addr.h | 3 ++-
include/qemu/memfd.h | 5 +
include/sysemu/hostmem.h
On 11/11/21 11:03 AM, Philippe Mathieu-Daudé wrote:
Declare structures const when we don't need to modify
them at runtime.
Signed-off-by: Philippe Mathieu-Daudé
---
tests/unit/test-smp-parse.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
Reviewed-by: Richard Henderson
When I switched machine.py over to using AQMP, I caused a regression in
device-crash-test that caused many spurious errors to be printed during
the test, obscuring real test failure cases.
This series fixes the vast majority of false positives, though there is
one remaining bug in machine.py
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