Add the Special Purpose Registers HASHKEYR and HASHPKEYR, which were
introduced by the Power ISA 3.1B. They are used by the new instructions
hashchk(p) and hashst(p).
The ISA states that the Operating System should generate the value for
these registers when creating a process, so it's its
Implementation for instructions hashstp and hashchkp, the privileged
versions of hashst and hashchk, which were added in Power ISA 3.1B.
Signed-off-by: Víctor Colombo
---
target/ppc/excp_helper.c | 2 ++
target/ppc/helper.h| 2 ++
Implementation for instructions hashst and hashchk, which were added
in Power ISA 3.1B.
It was decided to implement the hash algorithm from ground up in this
patch exactly as described in Power ISA.
Signed-off-by: Víctor Colombo
---
target/ppc/excp_helper.c | 82
This patch series implements the 4 instructions added in Power ISA
3.1B:
- hashchk
- hashst
- hashchkp
- hashstp
It's built on top of ppc-next. Working branch for ease of use can be
found here:
https://github.com/PPC64/qemu/tree/vccolombo-hash-to-send-v4
What do you think about the choice to
On Fri, 15 Jul 2022 at 09:43, Klaus Jensen wrote:
>
> From: Klaus Jensen
>
> Hi,
>
> The following changes since commit 8482ab545e52f50facacfe1118b22b97462724ab:
>
> Merge tag 'qga-win32-pull-2022-07-13' of github.com:kostyanf14/qemu into
> staging (2022-07-14 14:52:16 +0100)
>
> are
Replace '1 << shift' with 'MAKE_64BIT_MASK(shift, 1)' to fix
unintentional integer overflow errors in tlb_helper file.
Fix coverity CID: 1489759 1489762
Signed-off-by: Xiaojuan Yang
Reviewed-by: Richard Henderson
---
target/loongarch/tlb_helper.c | 4 ++--
1 file changed, 2 insertions(+), 2
The boundary size of cpucfg array should be 0 to ARRAY_SIZE(cpucfg)-1.
So, using index bigger than max boundary to access cpucfg[] must be
forbidden.
Fix coverity CID: 1489760
Signed-off-by: Xiaojuan Yang
Reviewed-by: Richard Henderson
---
target/loongarch/op_helper.c | 2 +-
1 file changed,
Fix such errors:
1. We should not use 'unsigned long' type as argument when we use
find_first_bit(), and we use ctz64() to replace find_first_bit()
to fix this bug.
2. It is not standard to use '1ULL << irq' to generate a irq mask.
So, we replace it with 'MAKE_64BIT_MASK(irq, 1)'.
Fix coverity
In loongarch_cpu_class_by_name(char *cpu_model) function,
the argument cpu_model already has the suffix '-loongarch-cpu',
so we should remove the LOONGARCH_CPU_TYPE_NAME(cpu_model) macro.
And add the assertion that 'cpu_model' resolves to a class of the
appropriate type.
Signed-off-by: Xiaojuan
On Fri, Jul 15, 2022 at 09:47:27AM +0530, Ani Sinha wrote:
> > Instead of all this mess, can't we just spawn e.g. "git clone --depth 1"?
> > And if the directory exists I would fetch and checkout.
>
> There are two reasons I can think of why I do not like this idea:
>
> (a) a git clone of a
Fix out-of-bounds errors when access excp_names[] array. the valid
boundary size of excp_names should be 0 to ARRAY_SIZE(excp_names)-1.
However, the general code do not consider the max boundary.
Fix coverity CID: 1489758
Signed-off-by: Xiaojuan Yang
Reviewed-by: Richard Henderson
---
This series fix some coverity errors and loongarch_cpu_class_by_name function
for LoongArch virt machine.
Only the loongarch_pch_pic patch(number 2/5) need to be reviewed in this v3
verison, and other patches have been reviewed.
Changes for v3:
1. In loongarch_pch_pic file, We should not use
We should config cpucfg[20] to set value for the scache's ways, sets,
and size arguments when loongarch cpu init. However, the old code
wirte 'sets argument' twice, so we change one of them to 'size argument'.
Signed-off-by: Xiaojuan Yang
---
target/loongarch/cpu.c | 2 +-
1 file changed, 1
The SVQ vring used idx usually match with the guest visible one, as long
as all the guest buffers (GPA) maps to exactly one buffer within qemu's
VA. However, as we can see in virtqueue_map_desc, a single guest buffer
could map to many buffers in SVQ vring.
The solution is to stop using the
On Fri, Jul 15, 2022 at 6:13 AM Jason Wang wrote:
>
> On Fri, Jul 15, 2022 at 12:32 AM Eugenio Pérez wrote:
> >
> > Finally offering the possibility to enable SVQ from the command line.
> >
> > Signed-off-by: Eugenio Pérez
> > Acked-by: Markus Armbruster
> > ---
> > qapi/net.json| 9
Migration with SVQ already migrate the inflight descriptors, so the
destination can perform the work.
This makes easier to migrate between backends or to recover them in
vhost devices that support set in flight descriptors.
Signed-off-by: Eugenio Pérez
---
hw/virtio/vhost-vdpa.c | 24
The SVQ vring used idx usually match with the guest visible one, as long
as all the guest buffers (GPA) maps to exactly one buffer within qemu's
VA. However, as we can see in virtqueue_map_desc, a single guest buffer
could map to many buffers in SVQ vring.
The solution is to stop using the
On 12.07.22 23:19, Emanuele Giuseppe Esposito wrote:
bdrv_child_cb_change_aio_ctx() is identical to
bdrv_child_cb_can_set_aio_ctx(), as we only need
to recursively go on the parent bs.
Note: bdrv_child_try_change_aio_context() is not called by
anyone at this point.
Signed-off-by: Emanuele
This reverts commit 47281859f66bdab1974fb122cab2cbb4a1c9af7f.
Signed-off-by: Akihiko Odaki
---
include/qemu/main-loop.h | 13 -
1 file changed, 13 deletions(-)
diff --git a/include/qemu/main-loop.h b/include/qemu/main-loop.h
index 5518845299d..0aa36a4f17e 100644
---
On Fri, 15 Jul 2022 at 12:40, Akihiko Odaki wrote:
>
> As ui/cocoa does no longer override main(), ui/gtk and ui/sdl
> can be enabled even ui/cocoa is enabled.
>
> Signed-off-by: Akihiko Odaki
> ---
Reviewed-by: Peter Maydell
thanks
-- PMM
On Fri, 15 Jul 2022 at 12:40, Akihiko Odaki wrote:
>
> This reverts commit 47281859f66bdab1974fb122cab2cbb4a1c9af7f.
>
> Signed-off-by: Akihiko Odaki
> ---
> include/qemu/main-loop.h | 13 -
> 1 file changed, 13 deletions(-)
Reviewed-by: Peter Maydell
thanks
-- PMM
On Fri, 15 Jul 2022 at 12:40, Akihiko Odaki wrote:
>
> This work is based on:
> https://patchew.org/QEMU/20220317125534.38706-1-philippe.mathieu.da...@gmail.com/
>
> Simplify the initialization dance by running qemu_init() in the main
> thread before the Cocoa event loop starts. The secondary
On 12.07.22 23:19, Emanuele Giuseppe Esposito wrote:
child_job_change_aio_ctx() is very similar to
child_job_can_set_aio_ctx(), but it implements a new transaction
so that if all check pass, the new transaction's .commit()
will take care of changin the BlockJob AioContext.
On 12.07.22 23:19, Emanuele Giuseppe Esposito wrote:
blk_root_change_aio_ctx() is very similar to blk_root_can_set_aio_ctx(),
but implements a new transaction so that if all check pass, the new
transaction's .commit will take care of changing the BlockBackend
AioContext.
Hi
On Tue, Jul 12, 2022 at 6:58 PM Warner Losh wrote:
>
>
>
> On Tue, Jul 12, 2022 at 3:36 AM wrote:
>>
>> From: Marc-André Lureau
>>
>> Add a new meson subproject to provide common code and scripts for QEMU
>> and tools. Initially, it will offer QAPI/QMP code generation and
>> common
On Thu, 14 Jul 2022 19:28:19 +0100
Joao Martins wrote:
> It is assumed that the whole GPA space is available to be DMA
> addressable, within a given address space limit, except for a
> tiny region before the 4G. Since Linux v5.4, VFIO validates
> whether the selected GPA is indeed valid i.e. not
On 7/13/22 13:54, Víctor Colombo wrote:
This patch series implements the 4 instructions added in Power ISA
3.1B:
- hashchk
- hashst
- hashchkp
- hashstp
To build it, you need to apply the following patches on top of master:
<20220701133507.740619-2-lucas.couti...@eldorado.org.br>
On Fri, 15 Jul 2022 at 14:19, Akihiko Odaki wrote:
>
> On 2022/07/15 22:10, Peter Maydell wrote:
> > On Fri, 15 Jul 2022 at 12:40, Akihiko Odaki wrote:
> >>
> >> This work is based on:
> >> https://patchew.org/QEMU/20220317125534.38706-1-philippe.mathieu.da...@gmail.com/
> >>
> >> Simplify the
This work is based on:
https://patchew.org/QEMU/20220317125534.38706-1-philippe.mathieu.da...@gmail.com/
Simplify the initialization dance by running qemu_init() in the main
thread before the Cocoa event loop starts. The secondary thread only
runs only qemu_main_loop() and qemu_cleanup().
This
This work is based on:
https://patchew.org/QEMU/20220317125534.38706-1-philippe.mathieu.da...@gmail.com/
Simplify the initialization dance by running qemu_init() in the main
thread before the Cocoa event loop starts. The secondary thread only
runs only qemu_main_loop() and qemu_cleanup().
This
As ui/cocoa does no longer override main(), ui/gtk and ui/sdl
can be enabled even ui/cocoa is enabled.
Signed-off-by: Akihiko Odaki
---
meson.build | 10 ++
1 file changed, 2 insertions(+), 8 deletions(-)
diff --git a/meson.build b/meson.build
index bc5569ace15..7baec7896ef 100644
---
Currently in mmu_notifier validate path, hva range is recorded and then
checked in the mmu_notifier_retry_hva() from page fault path. However
for the to be introduced private memory, a page fault may not have a hva
As this patch appeared in v7, just wondering did you see an actual bug
because
Hi Richard
On Tue, Jul 12, 2022 at 3:38 PM Marc-André Lureau <
marcandre.lur...@redhat.com> wrote:
> Hi
>
> On Tue, Jul 12, 2022 at 10:10 AM Richard Henderson
> wrote:
> >
> > On 7/12/22 09:24, Richard Henderson wrote:
> > > On 7/11/22 13:26, marcandre.lur...@redhat.com wrote:
> > >> From:
On 7/15/22 12:57, Igor Mammedov wrote:
> On Thu, 14 Jul 2022 19:28:19 +0100
> Joao Martins wrote:
>
>> It is assumed that the whole GPA space is available to be DMA
>> addressable, within a given address space limit, except for a
>> tiny region before the 4G. Since Linux v5.4, VFIO validates
>>
The architecture requires that for faults on loads and stores which
do writeback, the syndrome information does not have the ISS
instruction syndrome information (i.e. ISV is 0). We got this wrong
for the load and store instructions covered by disas_ldst_reg_imm9().
Calculate iss_valid correctly
On 6/28/22 10:39, Leandro Lupori wrote:
According to PowerISA 3.1B, Book III 6.7.6 programming note, the
page directory base addresses are expected to be aligned to their
size. Real hardware seems to rely on that and will access the
wrong address if they are misaligned. This results in a
On 7/15/22 11:11, Janis Schoetterl-Glausch wrote:
On 7/14/22 22:17, Pierre Morel wrote:
On 7/14/22 16:57, Janis Schoetterl-Glausch wrote:
On 6/20/22 16:03, Pierre Morel wrote:
S390x CPU Topology allows a non uniform repartition of the CPU
inside the topology containers, sockets, books
On 2022/07/15 22:10, Peter Maydell wrote:
On Fri, 15 Jul 2022 at 12:40, Akihiko Odaki wrote:
This work is based on:
https://patchew.org/QEMU/20220317125534.38706-1-philippe.mathieu.da...@gmail.com/
Simplify the initialization dance by running qemu_init() in the main
thread before the Cocoa
On 7/15/22 10:10, Marc-André Lureau wrote:
[...]
ms->pv = true;
+rc = s390_pv_query_info();
+if (rc) {
+goto out_err;
Maybe it's not necessary to make it fatal on error?
lgtm otherwise
Hmm, yes and no.
The info API is fenced by the dump CAP so I don't ever expect an
On Fri, Jul 15, 2022 at 12:18 PM Janosch Frank
wrote:
> On 7/15/22 10:10, Marc-André Lureau wrote:
> [...]
> >> ms->pv = true;
> >>
> >> +rc = s390_pv_query_info();
> >> +if (rc) {
> >> +goto out_err;
> >>
> >
> > Maybe it's not necessary to make it fatal on error?
> >
> >
On Thu, Jul 14 2022, Daniel P. Berrangé wrote:
> The deprecation notes are currently only displayed at runtime when the
> user activates a CPU. The QMP query displays a simple flag for
> deprecation, while '-cpu help' displays nothing unless the deprecation
> info is duplicated into the 'notes'
On Thu, Jul 14 2022, Daniel P. Berrangé wrote:
> The deprecation notes are currently only displayed at runtime when the
> user activates a CPU. The QMP query displays a simple flag for
> deprecation, while '-cpu help' displays nothing unless the deprecation
> info is duplicated into the 'notes'
From: Niklas Cassel
The serial prop on the controller is actually describing the nvme
subsystem serial, which has to be identical for all controllers within
the same nvme subsystem.
This is enforced since commit a859eb9f8f64 ("hw/nvme: enforce common
serial per subsystem").
Fix the
On Fri, Jul 15, 2022 at 1:34 PM Eugenio Perez Martin
wrote:
>
> On Fri, Jul 15, 2022 at 6:08 AM Jason Wang wrote:
> >
> > On Fri, Jul 15, 2022 at 12:32 AM Eugenio Pérez wrote:
> > >
> > > Do a simple forwarding of CVQ buffers, the same work SVQ could do but
> > > through callbacks. No
On Fri, Jul 15, 2022 at 10:51 AM Jason Wang wrote:
>
> On Fri, Jul 15, 2022 at 1:40 PM Eugenio Perez Martin
> wrote:
> >
> > On Fri, Jul 15, 2022 at 6:03 AM Jason Wang wrote:
> > >
> > > On Fri, Jul 15, 2022 at 12:32 AM Eugenio Pérez
> > > wrote:
> > > >
> > > > Since the vhost-vdpa device is
On 7/14/22 22:17, Pierre Morel wrote:
>
>
> On 7/14/22 16:57, Janis Schoetterl-Glausch wrote:
>> On 6/20/22 16:03, Pierre Morel wrote:
>>> S390x CPU Topology allows a non uniform repartition of the CPU
>>> inside the topology containers, sockets, books and drawers.
>>>
>>> We use numa to place
On 7/14/22 22:05, Pierre Morel wrote:
>
>
> On 7/14/22 20:43, Janis Schoetterl-Glausch wrote:
>> On 6/20/22 16:03, Pierre Morel wrote:
>>> Hi,
>>>
>>> This new spin is essentially for coherence with the last Linux CPU
>>> Topology patch, function testing and coding style modifications.
>>>
>>>
On 13/07/22 1:38 pm, Het Gala wrote:
On 16/06/22 10:56 pm, Dr. David Alan Gilbert wrote:
* Het Gala (het.g...@nutanix.com) wrote:
> First of all, I apologise for the late reply. I was on a leave after
internship ended
at Nutanix. Hope to learn a lot from you all in the process of
Hi
On Wed, Jul 13, 2022 at 5:18 PM Janosch Frank wrote:
> Introduce an interface over which we can get information about UV data.
>
> Signed-off-by: Janosch Frank
> ---
> hw/s390x/pv.c | 61 ++
> hw/s390x/s390-virtio-ccw.c | 5
>
On Thu, 14 Jul 2022 at 22:14, Maheswara Kurapati
wrote:
> On 7/14/22 8:10 AM, Peter Maydell wrote:
> > On Thu, 14 Jul 2022 at 14:04, Maheswara Kurapati
> > wrote:
> >> This fix adds object properties for the FAN_COMMAND_1 (3Bh),
> >> STATUS_FANS_1_2 (81h),
> >> READ_FAN_SPEED_1 (90h) registers
From: Jinhao Fan
Implement Doorbel Buffer Config command (Section 5.7 in NVMe Spec 1.3)
and Shadow Doorbel buffer & EventIdx buffer handling logic (Section 7.13
in NVMe Spec 1.3). For queues created before the Doorbell Buffer Config
command, the nvme_dbbuf_config function tries to associate each
From: Darren Kenny
Using the Parfait source code analyser and issue was found in
hw/nvme/ctrl.c where the macros NVME_CAP_SET_CMBS and NVME_CAP_SET_PMRS
are called with a ternary operatore in the second parameter, resulting
in a potentially unexpected expansion of the form:
x ? a: b &
On Fri, Jul 15, 2022 at 10:44 AM Jason Wang wrote:
>
> On Fri, Jul 15, 2022 at 1:34 PM Eugenio Perez Martin
> wrote:
> >
> > On Fri, Jul 15, 2022 at 6:08 AM Jason Wang wrote:
> > >
> > > On Fri, Jul 15, 2022 at 12:32 AM Eugenio Pérez
> > > wrote:
> > > >
> > > > Do a simple forwarding of CVQ
On Fri, Jul 15, 2022 at 1:39 PM Eugenio Perez Martin
wrote:
>
> On Fri, Jul 15, 2022 at 5:59 AM Jason Wang wrote:
> >
> > On Fri, Jul 15, 2022 at 12:32 AM Eugenio Pérez wrote:
> > >
> > > It allows the Shadow Control VirtQueue to wait for the device to use the
> > > available buffers.
> > >
> >
On Thu, Jul 14 2022, Daniel P. Berrangé wrote:
> The deprecation notes are currently only displayed at runtime when the
> user activates a CPU. The QMP query displays a simple flag for
> deprecation, while '-cpu help' displays nothing unless the deprecation
> info is duplicated into the 'notes'
Hi
On Thu, Jul 14, 2022 at 1:46 PM Janosch Frank wrote:
> On 7/13/22 17:35, Marc-André Lureau wrote:
> > Hi
> >
> > On Wed, Jul 13, 2022 at 7:30 PM Janosch Frank
> wrote:
> >>
> >> On 7/13/22 17:09, Marc-André Lureau wrote:
> >>> Hi
> >>>
> >>> On Wed, Jul 13, 2022 at 5:07 PM Janosch Frank
>
From: Klaus Jensen
Hi,
The following changes since commit 8482ab545e52f50facacfe1118b22b97462724ab:
Merge tag 'qga-win32-pull-2022-07-13' of github.com:kostyanf14/qemu into
staging (2022-07-14 14:52:16 +0100)
are available in the Git repository at:
git://git.infradead.org/qemu-nvme.git
From: Niklas Cassel
Since commit 916b0f0b5264 ("hw/nvme: change nvme-ns 'shared' default")
the default value of nvme-ns param 'shared' is set to true, regardless
if there is a nvme-subsys node or not.
On a system without a nvme-subsys node, a namespace will never be able
to be attached to more
From: Jinhao Fan
Add property "ioeventfd" which is enabled by default. When this is
enabled, updates on the doorbell registers will cause KVM to signal
an event to the QEMU main loop to handle the doorbell updates.
Therefore, instead of letting the vcpu thread run both guest VM and
IO emulation,
On Fri, Jul 15, 2022 at 1:40 PM Eugenio Perez Martin
wrote:
>
> On Fri, Jul 15, 2022 at 6:03 AM Jason Wang wrote:
> >
> > On Fri, Jul 15, 2022 at 12:32 AM Eugenio Pérez wrote:
> > >
> > > Since the vhost-vdpa device is exposing _F_LOG,
> >
> > I may miss something but I think it doesn't?
> >
>
On Thu, Jul 14 2022, Daniel P. Berrangé wrote:
> When querying '-cpu help' there is no presentation of fact that a
> CPU may be deprecated. The user just has to try it and see if they
> get a depecation message at runtime. The QMP command for querying
> CPUs report a deprecation bool flag, but
On Thu, 14 Jul 2022 at 10:14, Paolo Bonzini wrote:
>
> The following changes since commit 8e3d85d36b77f11ad7bded3a2d48c1f0cc334f82:
>
> Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging
> (2022-07-12 14:12:15 +0100)
>
> are available in the Git repository at:
>
>
On Jul 14 20:06, Peter Delevoryas wrote:
> Hey Cedric, Klaus, and Corey,
>
Hi Peter,
Regardless of the issues you are facing its awesome to see this being
put to work like this!
> So I realized something about the current state of multi-master i2c:
>
> We can't do transfers between two Aspeed
From: Jinhao Fan
When shadow doorbell buffer is enabled, doorbell registers are lazily
updated. The actual queue head and tail pointers are stored in Shadow
Doorbell buffers.
Add trace events for updates on the Shadow Doorbell buffers and EventIdx
buffers. Also add trace event for the Doorbell
On 15/07/2022 10:23, Daniel Henrique Barboza wrote:
On 7/13/22 13:54, Víctor Colombo wrote:
This patch series implements the 4 instructions added in Power ISA
3.1B:
- hashchk
- hashst
- hashchkp
- hashstp
To build it, you need to apply the following patches on top of master:
On 7/15/22 11:31, Janis Schoetterl-Glausch wrote:
On 7/14/22 22:05, Pierre Morel wrote:
On 7/14/22 20:43, Janis Schoetterl-Glausch wrote:
On 6/20/22 16:03, Pierre Morel wrote:
Hi,
This new spin is essentially for coherence with the last Linux CPU
Topology patch, function testing and
As ui/cocoa does no longer override main(), ui/gtk and ui/sdl
can be enabled even ui/cocoa is enabled.
Signed-off-by: Akihiko Odaki
Reviewed-by: Peter Maydell
---
meson.build | 10 ++
1 file changed, 2 insertions(+), 8 deletions(-)
diff --git a/meson.build b/meson.build
index
On 12.07.22 23:19, Emanuele Giuseppe Esposito wrote:
Replace all direct usage of ->can_set_aio_ctx and ->set_aio_ctx,
and call bdrv_child_try_change_aio_context() in
bdrv_try_set_aio_context(), the main function called through
the whole block layer.
From this point onwards, ->can_set_aio_ctx
This work is based on:
https://patchew.org/QEMU/20220317125534.38706-1-philippe.mathieu.da...@gmail.com/
Simplify the initialization dance by running qemu_init() in the main
thread before the Cocoa event loop starts. The secondary thread only
runs only qemu_main_loop() and qemu_cleanup().
This
This reverts commit 47281859f66bdab1974fb122cab2cbb4a1c9af7f.
Signed-off-by: Akihiko Odaki
Reviewed-by: Peter Maydell
---
include/qemu/main-loop.h | 13 -
1 file changed, 13 deletions(-)
diff --git a/include/qemu/main-loop.h b/include/qemu/main-loop.h
index
This work is based on:
https://patchew.org/QEMU/20220317125534.38706-1-philippe.mathieu.da...@gmail.com/
Simplify the initialization dance by running qemu_init() in the main
thread before the Cocoa event loop starts. The secondary thread only
runs only qemu_main_loop() and qemu_cleanup().
This
On Thu, 14 Jul 2022 at 16:45, Cédric Le Goater wrote:
>
> The following changes since commit 08c9f7eec7002dac2da52c8265eb319aba381c86:
>
> Merge tag 'darwin-20220712' of https://github.com/philmd/qemu into staging
> (2022-07-14 09:30:55 +0100)
>
> are available in the Git repository at:
>
>
On Thu, 14 Jul 2022 at 10:44, Andrey Makarov wrote:
>
> In v3:
>
> - changed naming of orgate & removed hard-coded constants
>
>
> Signed-off-by: Andrey Makarov
> diff --git a/tests/qtest/bcm2835-dma-test.c b/tests/qtest/bcm2835-dma-test.c
> new file mode 100644
> index 00..111adfe7f2
On 7/15/22 18:03, Peter Maydell wrote:
The architecture requires that for faults on loads and stores which
do writeback, the syndrome information does not have the ISS
instruction syndrome information (i.e. ISV is 0). We got this wrong
for the load and store instructions covered by
On Thu, 14 Jul 2022 at 19:28, Hao Wu wrote:
>
> Originally we read in from SMBus when RXF_STS is cleared. However,
> the driver clears RXF_STS before setting RXF_CTL, causing the SM bus
> module to read incorrect amount of bytes in FIFO mode when the number
> of bytes read changed. This patch
Queued in gitlab.com/danielhb/qemu/tree/ppc-next. Thanks,
Daniel
On 6/28/22 10:39, Leandro Lupori wrote:
Changes from v2:
- Improved comments on patch 2
- Improved commit message on patch 3
- Now emulating CPU behavior on misaligned page table base addresses
Leandro Lupori (3):
ppc: Check
On 12.07.22 23:19, Emanuele Giuseppe Esposito wrote:
Together with all _can_set_ and _set_ APIs, as they are not needed
anymore.
Signed-off-by: Emanuele Giuseppe Esposito
---
block.c| 196 -
block/block-backend.c | 33
vhost-vdpa control virtqueue needs to know the maximum entries supported
by the virtio-net device, so we know if it is possible to apply the
filter.
Signed-off-by: Eugenio Pérez
---
include/hw/virtio/virtio-net.h | 3 +++
hw/net/virtio-net.c| 1 -
2 files changed, 3 insertions(+), 1
VirtQueueElement comes from the guest, but we're heading SVQ to be able
to modify the element presented to the device without the guest's
knowledge.
To do so, make SVQ accept sg buffers directly, instead of using
VirtQueueElement.
Add vhost_svq_add_element to maintain element convenience.
Calculate max *used* GPA against the CPU maximum possible address
and error out if the former surprasses the latter. This ensures
max used GPA is reacheable by configured phys-bits. Default phys-bits
on Qemu is TCG_PHYS_ADDR_BITS (40) which is enough for the CPU to
address 1Tb (0xff ) or
Future code needs to call it from vhost_svq_add.
No functional change intended.
Signed-off-by: Eugenio Pérez
---
hw/virtio/vhost-shadow-virtqueue.c | 28 ++--
1 file changed, 14 insertions(+), 14 deletions(-)
diff --git a/hw/virtio/vhost-shadow-virtqueue.c
It's done for both in and out descriptors so it's better placed here.
Acked-by: Jason Wang
Signed-off-by: Eugenio Pérez
---
hw/virtio/vhost-shadow-virtqueue.c | 38 +-
1 file changed, 27 insertions(+), 11 deletions(-)
diff --git a/hw/virtio/vhost-shadow-virtqueue.c
This will allow SVQ to add context to the different queue elements.
This patch only store the actual element, no functional change intended.
Signed-off-by: Eugenio Pérez
---
hw/virtio/vhost-shadow-virtqueue.h | 8 ++--
hw/virtio/vhost-shadow-virtqueue.c | 16
2 files
A guest's buffer continuos on GPA may need multiple descriptors on
qemu's VA, so SVQ should track its length sepparatedly.
Signed-off-by: Eugenio Pérez
---
hw/virtio/vhost-shadow-virtqueue.h | 6 ++
hw/virtio/vhost-shadow-virtqueue.c | 4 ++--
2 files changed, 8 insertions(+), 2
This allows external parts of SVQ to forward custom buffers to the
device.
Signed-off-by: Eugenio Pérez
---
hw/virtio/vhost-shadow-virtqueue.h | 3 +++
hw/virtio/vhost-shadow-virtqueue.c | 6 +++---
2 files changed, 6 insertions(+), 3 deletions(-)
diff --git
This allows external vhost-net devices to modify the state of the
VirtIO device model once the vhost-vdpa device has acknowledged the
control commands.
Signed-off-by: Eugenio Pérez
---
include/hw/virtio/virtio-net.h | 4 ++
hw/net/virtio-net.c| 84 --
This function allows external SVQ users to return guest's available
buffers.
Signed-off-by: Eugenio Pérez
---
hw/virtio/vhost-shadow-virtqueue.h | 3 +++
hw/virtio/vhost-shadow-virtqueue.c | 16
2 files changed, 19 insertions(+)
diff --git a/hw/virtio/vhost-shadow-virtqueue.h
To know the device features is needed for CVQ SVQ, so SVQ knows if it
can handle all commands or not. Extract from
vhost_vdpa_get_max_queue_pairs so we can reuse it.
Signed-off-by: Eugenio Pérez
Acked-by: Jason Wang
---
net/vhost-vdpa.c | 30 --
1 file changed, 20
Introduce the control virtqueue support for vDPA shadow virtqueue. This
is needed for advanced networking features like rx filtering.
Virtio-net control VQ copies the descriptors to qemu's VA, so we avoid
TOCTOU with the guest's or device's memory every time there is a device
model change.
Do a simple forwarding of CVQ buffers, the same work SVQ could do but
through callbacks. No functional change intended.
Signed-off-by: Eugenio Pérez
---
include/hw/virtio/vhost-vdpa.h | 3 ++
hw/virtio/vhost-vdpa.c | 3 +-
net/vhost-vdpa.c | 58
It allows the Shadow Control VirtQueue to wait for the device to use the
available buffers.
Signed-off-by: Eugenio Pérez
---
hw/virtio/vhost-shadow-virtqueue.h | 1 +
hw/virtio/vhost-shadow-virtqueue.c | 22 ++
2 files changed, 23 insertions(+)
diff --git
Shadow CVQ will copy buffers on qemu VA, so we avoid TOCTOU attacks from
the guest that could set a different state in qemu device model and vdpa
device.
To do so, it needs to be able to map these new buffers to the device.
Signed-off-by: Eugenio Pérez
Acked-by: Jason Wang
---
Since the vhost-vdpa device is exposing _F_LOG, adding a migration blocker if
it uses CVQ.
Signed-off-by: Eugenio Pérez
---
include/hw/virtio/vhost-vdpa.h | 1 +
hw/virtio/vhost-vdpa.c | 14 ++
2 files changed, 15 insertions(+)
diff --git a/include/hw/virtio/vhost-vdpa.h
Finally offering the possibility to enable SVQ from the command line.
Signed-off-by: Eugenio Pérez
Acked-by: Markus Armbruster
---
qapi/net.json| 9 +-
net/vhost-vdpa.c | 72 ++--
2 files changed, 77 insertions(+), 4 deletions(-)
diff --git
On Fri, Jul 15, 2022 at 09:49:58AM +0200, Klaus Jensen wrote:
> On Jul 14 20:06, Peter Delevoryas wrote:
> > Hey Cedric, Klaus, and Corey,
> >
>
> Hi Peter,
>
> Regardless of the issues you are facing its awesome to see this being
> put to work like this!
Haha yeah, well, _all_ the designs at
On 7/15/22 15:47, Pierre Morel wrote:
>
>
> On 7/15/22 11:31, Janis Schoetterl-Glausch wrote:
>> On 7/14/22 22:05, Pierre Morel wrote:
>>>
>>>
>>> On 7/14/22 20:43, Janis Schoetterl-Glausch wrote:
On 6/20/22 16:03, Pierre Morel wrote:
> Hi,
>
> This new spin is essentially for
On Fri, Jul 15, 2022 at 11:05 AM Eugenio Perez Martin
wrote:
>
> On Fri, Jul 15, 2022 at 10:51 AM Jason Wang wrote:
> >
> > On Fri, Jul 15, 2022 at 1:40 PM Eugenio Perez Martin
> > wrote:
> > >
> > > On Fri, Jul 15, 2022 at 6:03 AM Jason Wang wrote:
> > > >
> > > > On Fri, Jul 15, 2022 at
The next version of Linux will introduce boolean statistics, which
can only have 0 or 1 values. Convert them to the new QAPI fields
added in the previous commit.
Signed-off-by: Paolo Bonzini
---
accel/kvm/kvm-all.c | 10 +-
linux-headers/linux/kvm.h | 1 +
2 files changed, 10
The next version of Linux will introduce boolean statistics, which
can only have 0 or 1 values. Support them in the schema and in
the HMP command.
Suggested-by: Amneesh Singh
Signed-off-by: Paolo Bonzini
---
monitor/hmp-cmds.c | 2 ++
qapi/stats.json| 4 +++-
2 files changed, 5
Some statistics exported by KVM only ever have a 0 or 1 value, and Linux has
grown the ability to mark them as such. Bring it over to the new statistics
subsystem of QEMU: they will be presented to QAPI clients as JSON booleans, and
in HMP as "yes"/"no".
(This was proposed in the context of the
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