On 3/27/2023 3:33 PM, Christian Ehrhardt wrote:
On Thu, Oct 27, 2022 at 2:36 AM Yang, Weijiang wrote:
On 10/26/2022 7:57 PM, Zhong, Yang wrote:
The previous patch wrongly replaced FEAT_XSAVE_XCR0_{LO|HI} with
FEAT_XSAVE_XSS_{LO|HI} in CPUID(EAX=12,ECX=1):{ECX,EDX}, which made
SGX enclave
In current implementation, riscv_cpu_set_virt_enabled is only called when
RVH is enabled.
Signed-off-by: Weiwei Li
Signed-off-by: Junqiang Wang
Reviewed-by: Richard Henderson
Reviewed-by: LIU Zhiwei
---
target/riscv/cpu_helper.c | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff
Since env->virt.VIRT_ONOFF is initialized as false, and will not be set
to true when RVH is disabled, so we can just return this bit(false) when
RVH is not disabled.
Signed-off-by: Weiwei Li
Signed-off-by: Junqiang Wang
Reviewed-by: Richard Henderson
Reviewed-by: LIU Zhiwei
---
On 2023/3/27 16:00, Christoph Muellner wrote:
From: Christoph Müllner
This patch introduces the RISC-V Zfa extension, which introduces
additional floating-point extensions:
* fli (load-immediate) with pre-defined immediates
* fminm/fmaxm (like fmin/fmax but with different NaN behaviour)
*
On 3/27/23 03:49, Cédric Le Goater wrote:
On 3/27/23 02:37, Stefan Berger wrote:
Add a test case for the TPM TIS I2C device exercising most of its
functionality, including localities.
Add library functions for being able to read from and write to registers
of the TPM TIS I2C device
On Wed, Mar 22 2023, Halil Pasic wrote:
> On Wed, 22 Mar 2023 10:52:31 +0100
> Cornelia Huck wrote:
> [..]
>> >
>> > diff --git a/hw/s390x/virtio-ccw.c b/hw/s390x/virtio-ccw.c
>> > index e33e5207ab..f44de1a8c1 100644
>> > --- a/hw/s390x/virtio-ccw.c
>> > +++ b/hw/s390x/virtio-ccw.c
>> > @@
On 3/26/23 21:05, Joel Stanley wrote:
Hi Ninad,
On Sun, 26 Mar 2023 at 22:44, Ninad Palsule wrote:
Hello,
I have incorporated review comments from Stefan. Please review.
This drop adds support for the TPM devices attached to the I2C bus. It
only supports the TPM2 protocol. You need to
On 3/27/23 02:37, Stefan Berger wrote:
Add a test case for the TPM TIS I2C device exercising most of its
functionality, including localities.
Add library functions for being able to read from and write to registers
of the TPM TIS I2C device connected to the Aspeed i2c controller.
Fix formats for multi-lines comments.
Add spaces around single line comments(after "/*" and before "*/").
Signed-off-by: Weiwei Li
Signed-off-by: Junqiang Wang
Acked-by: Richard Henderson
Reviewed-by: LIU Zhiwei
---
target/riscv/arch_dump.c| 3 +-
target/riscv/cpu.c
On Fri, Mar 24, 2023 at 06:39:34PM +0100, Juan Quintela wrote:
> Daniel P. Berrangé wrote:
> > On Tue, Feb 14, 2023 at 05:07:38PM +0100, Juan Quintela wrote:
> >> Hi
> >>
> >> I want to enter a discussion about changing the default of the style
> >> guide.
> >>
> >> There are several reasons
On 3/27/23 07:18, Joel Stanley wrote:
On Mon, 27 Mar 2023 at 11:11, Stefan Berger wrote:
On 3/26/23 21:05, Joel Stanley wrote:
Hi Ninad,
On Sun, 26 Mar 2023 at 22:44, Ninad Palsule wrote:
Hello,
I have incorporated review comments from Stefan. Please review.
This drop adds support
Hi Stefan,
On 3/27/23 8:40 AM, Stefan Berger wrote:
On 3/26/23 18:44, Ninad Palsule wrote:
Qemu already supports devices attached to ISA and sysbus. This drop adds
support for the I2C bus attached TPM devices. I2C model only supports
TPM2 protocol.
--- /dev/null
+++
Kautuk Consul writes:
> Fixes c0c8687ef0("tests/avocado: disable BootLinuxPPC64 test in CI").
>
> Commit c0c8687ef0fd990db8db1655a8a6c5a5e35dd4bb disabled the test-case
> for PPC64. On investigation, this turns out to be an issue with the
> time taken for downloading the Fedora 31 qcow2 image
Hello,
I have incorporated review comments from Joel & Stefan. Please review.
This drop adds support for the TPM devices attached to the I2C bus. It
only supports the TPM2 protocol. You need to run it with the external
TPM emulator like swtpm. I have tested it with swtpm.
I have refered to
On Mon, Mar 27, 2023 at 01:15:18PM -0300, Leonardo Bras wrote:
> Since the introduction of multifd, it's possible to perform a multifd
> migration and finish it using postcopy.
>
> A bug introduced by yank (fixed on cfc3bcf373) was previously preventing
> a successful use of this migration
On 3/26/23 19:07, LIU Zhiwei wrote:
+static inline int mmuidx_priv(int mmu_idx)
+{
+ int ret = mmu_idx & 3;
+ if (ret == MMUIdx_S_SUM) {
+ ret = PRV_S;
+ }
+ return ret;
+}
+
Can we remove the PRIV from the tb flags after we have this function?
No, because this is the priv
On 3/27/23 23:22, David Woodhouse wrote:
On Mon, 2023-03-27 at 22:45 +0700, Bui Quang Minh wrote:
Maybe I'm misreading the patch, but to me it looks that
if (dest == 0xff) apic_get_broadcast_bitmask() bit applies even in
x2apic mode? So delivering to the APIC with physical ID 255 will be
On Mon, 2023-03-27 at 23:35 +0700, Bui Quang Minh wrote:
> On 3/27/23 23:22, David Woodhouse wrote:
> > On Mon, 2023-03-27 at 22:45 +0700, Bui Quang Minh wrote:
> > >
> > > > Maybe I'm misreading the patch, but to me it looks that
> > > > if (dest == 0xff) apic_get_broadcast_bitmask() bit applies
From: Klaus Jensen
Hi Peter,
The following changes since commit e3debd5e7d0ce031356024878a0a18b9d109354a:
Merge tag 'pull-request-2023-03-24' of https://gitlab.com/thuth/qemu into
staging (2023-03-24 16:08:46 +)
are available in the Git repository at:
From: Mateusz Kozlowski
Since the nvme_blk_read/write are used by both the data and metadata
portions of the IO, it can't have the 512B alignment requirement.
Without this change any metadata transfer, which length isn't a multiple
of 512B and which is bigger than 512B, will result in only a
From: Klaus Jensen
Even if the host is somehow using compare to do compare-and-write, the
host should be notified immediately about the compare failure and not
have to wait for the driver to potentially retry the command.
Fixes: 0a384f923f51 ("hw/block/nvme: add compare command")
Reported-by:
On 3/27/23 01:00, Christoph Muellner wrote:
+uint64_t helper_fminm_s(CPURISCVState *env, uint64_t rs1, uint64_t rs2)
+{
+float32 frs1 = check_nanbox_s(env, rs1);
+float32 frs2 = check_nanbox_s(env, rs2);
+
+if (float32_is_any_nan(frs1) || float32_is_any_nan(frs2)) {
+return
On 3/27/23 01:38, Alex Bennée wrote:
Richard Henderson writes:
User setting of -R reserved_va can lead to an assertion
failure in page_set_flags. Sanity check the value of
reserved_va and print an error message instead. Do not
allocate a commpage at all for m-profile cpus.
I see this:
On 3/27/23 04:23, Tianrui Zhao wrote:
The virt addr should mask TARGET_PHYS_ADDR_SPACE_BITS to
get the phys addr, and this is used by loading kernel elf.
Signed-off-by: Tianrui Zhao
---
hw/loongarch/virt.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
Hi Cedric,
On 3/27/23 12:01 PM, Cédric Le Goater wrote:
On 3/27/23 18:16, Ninad Palsule wrote:
Qemu already supports devices attached to ISA and sysbus. This drop adds
support for the I2C bus attached TPM devices. I2C model only supports
TPM2 protocol.
This commit includes changes for the
On Mon, Mar 27, 2023 at 02:21:47PM -0300, casan...@redhat.com wrote:
> From: Carlos Santos
>
> They are required only for system emulation (i.e. have_system is true).
>
> Signed-off-by: Carlos Santos
> ---
Reviewed-by: Daniel P. Berrangé
With regards,
Daniel
--
|: https://berrange.com
On Mon, Mar 27, 2023 at 02:30:58PM -0300, casan...@redhat.com wrote:
> From: Carlos Santos
>
> It is not useful when configuring with --enable-trace-backends=nop.
>
> Signed-off-by: Carlos Santos
> ---
Reviewed-by: Daniel P. Berrangé
With regards,
Daniel
--
|: https://berrange.com
On 3/27/23 01:08, Weiwei Li wrote:
Directly use env->virt_enabled instead.
Suggested-by: LIU Zhiwei
Signed-off-by: Weiwei Li
Signed-off-by: Junqiang Wang
---
target/riscv/cpu.c| 2 +-
target/riscv/cpu.h| 1 -
target/riscv/cpu_helper.c | 51
On 3/27/23 14:12, Ninad Palsule wrote:
This is a documentation change for I2C TPM device support.
Qemu already supports devices attached to ISA and sysbus.
This drop adds support for the I2C bus attached TPM devices.
Signed-off-by: Ninad Palsule
---
V2:
Incorporated Stephen's review
From: Carlos Santos
It is not useful when configuring with --enable-trace-backends=nop.
Signed-off-by: Carlos Santos
---
Changes v1->v2:
Install based on chosen trace backend, not on chosen emulators.
---
trace/meson.build | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
On 3/27/23 09:24, Philippe Mathieu-Daudé wrote:
Per the release 6.06 revision history:
5.03 August 21, 2013
• ABS2008 and NAN2008 fields of Table 5.7 “FCSR RegisterField
Descriptions” were optional in release 3 and could be R/W,
but as of release 5 are required, read-only, and
On 3/27/23 01:08, Weiwei Li wrote:
From: LIU Zhiwei
Currently we only use the env->virt to encode the virtual mode enabled
status. Let's make it a bool type.
Signed-off-by: LIU Zhiwei
Reviewed-by: Weiwei Li
Message-ID:<20230325145348.1208-1-zhiwei_...@linux.alibaba.com>
---
Qemu already supports devices attached to ISA and sysbus. This drop adds
support for the I2C bus attached TPM devices.
This commit includes changes for the common code.
- Added support for the new checksum registers which are required for
the I2C support. The checksum calculation is handled in
On 3/27/23 22:37, David Woodhouse wrote:
On Mon, 2023-03-27 at 22:33 +0700, Bui Quang Minh wrote:
+ memset(deliver_bitmask, 0x00, max_apic_words * sizeof(uint32_t));
+
+ /* x2APIC broadcast id for both physical and logical (cluster) mode */
+ if (dest == 0x) {
+
Per the release 6.06 revision history:
5.03 August 21, 2013
• ABS2008 and NAN2008 fields of Table 5.7 “FCSR RegisterField
Descriptions” were optional in release 3 and could be R/W,
but as of release 5 are required, read-only, and preset by
hardware.
The P5600 core implements the
On Sun, 2023-03-26 at 12:20 +0700, Bui Quang Minh wrote:
>
> +static void apic_mem_write(void *opaque, hwaddr addr, uint64_t val,
> + unsigned size)
> +{
> + int index = (addr >> 4) & 0xff;
> +
> + if (size < 4) {
> + return;
> + }
> +
> + if (addr >
Hi, Cedric
The naming scheme is suggested by Corey in a previous review:
https://lists.gnu.org/archive/html/qemu-devel/2021-09/msg02691.html
I originally kept "IpmIBmc" for the host side code talking to BMC but it
might also cause confusion as well. I'm not sure which name is the best
here.
On 3/27/23 14:12, Ninad Palsule wrote:
Qemu already supports devices attached to ISA and sysbus. This drop adds
support for the I2C bus attached TPM devices.
This commit includes changes for the common code.
- Added support for the new checksum registers which are required for
the I2C
On 3/27/23 05:42, Daniel Henrique Barboza wrote:
+static void cpu_set_misa_ext_cfg(Object *obj, Visitor *v, const char *name,
+ void *opaque, Error **errp)
+{
+RISCVCPUMisaExtConfig *misa_ext_cfg = opaque;
const
+static void cpu_get_misa_ext_cfg(Object
On 3/27/23 15:43, Richard Henderson wrote:
On 3/27/23 05:42, Daniel Henrique Barboza wrote:
+ g_autofree char *name = g_strdup_printf("%s", misa_cfg->name);
+ g_autofree char *desc = g_strdup_printf("%s", misa_cfg->description);
What is the point of this? It would seem that
Mark Cave-Ayland writes:
> On 27/03/2023 14:15, Alex Bennée wrote:
>
>> I'm still not sure how I achieve by use case of the parent class
>> defining the following properties:
>>static Property vud_properties[] = {
>>DEFINE_PROP_CHR("chardev", VHostUserDevice, chardev),
>>
On Mon, 2023-03-27 at 22:45 +0700, Bui Quang Minh wrote:
>
> > Maybe I'm misreading the patch, but to me it looks that
> > if (dest == 0xff) apic_get_broadcast_bitmask() bit applies even in
> > x2apic mode? So delivering to the APIC with physical ID 255 will be
> > misinterpreted as a broadcast?
On 3/26/23 18:34, liweiwei wrote:
We seems only need to know whether fs/vs is dirty, so maybe we can just use a bool for
them to save more bits from TB_FLAGS.
No, we also need disabled. That is checked in REQUIRE_FPU, require_rvv, etc.
r~
On 3/27/23 12:16, Ninad Palsule wrote:
Qemu already supports devices attached to ISA and sysbus. This drop adds
support for the I2C bus attached TPM devices. I2C model only supports
TPM2 protocol.
+ * If data is for FIFO then it is received from tpm_tis_common buffer
+ * otherwise it
On 3/27/23 18:16, Ninad Palsule wrote:
Qemu already supports devices attached to ISA and sysbus. This drop adds
support for the I2C bus attached TPM devices. I2C model only supports
TPM2 protocol.
This commit includes changes for the common code.
- Added I2C emulation model. Logic was added in
Thank you. I'll include the change in the next patch set when I refactor
patch v4 (which might take a while.)
On Sat, Mar 25, 2023 at 4:56 PM Corey Minyard wrote:
> On Fri, Mar 24, 2023 at 04:08:59PM -0700, Hao Wu wrote:
> > From: Havard Skinnemoen
> >
> > This document is an attempt to
From: Carlos Santos
They are required only for system emulation (i.e. have_system is true).
Signed-off-by: Carlos Santos
---
Changes v1->v2:
Remove stray --{enable,disable}-install-keymaps addition to
scripts/meson-buildoptions.sh
Changes v2->v3:
Reset submodules (synchronize to
On Mon, Mar 27, 2023 at 6:25 AM Daniel P. Berrangé wrote:
>
> On Sun, Mar 26, 2023 at 06:17:00PM -0300, casan...@redhat.com wrote:
> > From: Carlos Santos
> >
> > They are required only for system emulation (i.e. have_system is true).
> >
> > Signed-off-by: Carlos Santos
> > ---
> >
Qemu already supports devices attached to ISA and sysbus. This drop adds
support for the I2C bus attached TPM devices. I2C model only supports
TPM2 protocol.
This commit includes changes for the common code.
- Added I2C emulation model. Logic was added in the model to temporarily
cache the data
This is a documentation change for I2C TPM device support.
Qemu already supports devices attached to ISA and sysbus.
This drop adds support for the I2C bus attached TPM devices.
Signed-off-by: Ninad Palsule
---
V2:
Incorporated Stephen's review comments
- Added example in the document.
---
Hello,
I have incorporated review comments from Cedric & Stefan. Please review.
This drop adds support for the TPM devices attached to the I2C bus. It
only supports the TPM2 protocol. You need to run it with the external
TPM emulator like swtpm. I have tested it with swtpm.
I have refered to
This is a documentation change for I2C TPM device support.
Qemu already supports devices attached to ISA and sysbus.
This drop adds support for the I2C bus attached TPM devices.
Signed-off-by: Ninad Palsule
---
V2:
Incorporated Stephen's review comments
- Added example in the document.
---
Hi Stefan,
On 3/27/23 1:26 PM, Stefan Berger wrote:
On 3/27/23 14:12, Ninad Palsule wrote:
diff --git a/hw/tpm/tpm_tis_i2c.c b/hw/tpm/tpm_tis_i2c.c
new file mode 100644
index 00..551b89dac8
--- /dev/null
+++ b/hw/tpm/tpm_tis_i2c.c
@@ -0,0 +1,527 @@
+/*
+ * Aspeed i2c bus interface
Qemu already supports devices attached to ISA and sysbus. This drop adds
support for the I2C bus attached TPM devices.
This commit includes changes for the common code.
- Added support for the new checksum registers which are required for
the I2C support. The checksum calculation is handled in
Update to the copyright text.
This drop adds support for the TPM devices attached to the I2C bus. It
only supports the TPM2 protocol. You need to run it with the external
TPM emulator like swtpm. I have tested it with swtpm.
I have refered to the work done by zhdan...@meta.com but at the core
On 3/27/23 05:42, Daniel Henrique Barboza wrote:
+g_autofree char *name = g_strdup_printf("%s", misa_cfg->name);
+g_autofree char *desc = g_strdup_printf("%s", misa_cfg->description);
What is the point of this? It would seem that you could simply pass the original string
+Marc-André & Paolo
On 27/3/23 19:08, Stefan Weil wrote:
Am 27.03.23 um 17:13 schrieb Philippe Mathieu-Daudé:
When liblzfe (Apple LZFSE compression library) is present
(for example installed via 'brew') on Darwin, QEMU build
fails as:
Has header "lzfse.h" : YES
Library lzfse found: YES
Qemu already supports devices attached to ISA and sysbus. This drop adds
support for the I2C bus attached TPM devices. I2C model only supports
TPM2 protocol.
This commit includes changes for the common code.
- Added I2C emulation model. Logic was added in the model to temporarily
cache the data
This is a documentation change for I2C TPM device support.
Qemu already supports devices attached to ISA and sysbus.
This drop adds support for the I2C bus attached TPM devices.
Signed-off-by: Ninad Palsule
---
V2:
Incorporated Stephen's review comments
- Added example in the document.
---
Qemu already supports devices attached to ISA and sysbus. This drop adds
support for the I2C bus attached TPM devices.
This commit includes changes for the common code.
- Added support for the new checksum registers which are required for
the I2C support. The checksum calculation is handled in
Since the introduction of multifd, it's possible to perform a multifd
migration and finish it using postcopy.
A bug introduced by yank (fixed on cfc3bcf373) was previously preventing
a successful use of this migration scenario, and now it should be
working on most cases.
But since there is not
On 3/25/23 07:54, Richard Henderson wrote:
This builds on Fei and Zhiwei's SUM and TB_FLAGS changes.
* Reclaim 5 TB_FLAGS bits, since we nearly ran out.
* Using cpu_mmu_index(env, true) is insufficient to implement
HLVX properly. While that chooses the correct mmu_idx, it
Am 27.03.23 um 17:13 schrieb Philippe Mathieu-Daudé:
When liblzfe (Apple LZFSE compression library) is present
(for example installed via 'brew') on Darwin, QEMU build
fails as:
Has header "lzfse.h" : YES
Library lzfse found: YES
Dependencies
lzo support :
On Mon, Mar 27, 2023 at 11:44 AM Carlos Santos wrote:
>
> On Mon, Mar 27, 2023 at 11:42 AM Daniel P. Berrangé
> wrote:
> >
> > On Mon, Mar 27, 2023 at 11:28:05AM -0300, Carlos Santos wrote:
> > > On Mon, Mar 27, 2023 at 6:23 AM Daniel P. Berrangé
> > > wrote:
> > > >
> > > > On Sun, Mar 26,
On 3/27/23 06:19, Philippe Mathieu-Daudé wrote:
The 64-bit SPARC V9 syscall ABI uses 32-bit UIDs. Only enable
the 16-bit UID wrappers for 32-bit SPARC (V7 and V8).
Possibly missed in commit 992f48a036 ("Support for 32 bit
ABI on 64 bit targets (only enabled Sparc64)").
Reported-by: Gregor
On 3/27/23 03:00, Weiwei Li wrote:
@@ -1248,6 +1265,10 @@ bool riscv_cpu_tlb_fill(CPUState *cs, vaddr address, int
size,
qemu_log_mask(CPU_LOG_MMU, "%s ad %" VADDR_PRIx " rw %d mmu_idx %d\n",
__func__, address, access_type, mmu_idx);
+if (access_type ==
On 3/27/23 14:12, Ninad Palsule wrote:
diff --git a/hw/tpm/tpm_tis_i2c.c b/hw/tpm/tpm_tis_i2c.c
new file mode 100644
index 00..551b89dac8
--- /dev/null
+++ b/hw/tpm/tpm_tis_i2c.c
@@ -0,0 +1,527 @@
+/*
+ * Aspeed i2c bus interface for reading from and writing to i2c device
registers
Qemu already supports devices attached to ISA and sysbus. This drop adds
support for the I2C bus attached TPM devices. I2C model only supports
TPM2 protocol.
This commit includes changes for the common code.
- Added I2C emulation model. Logic was added in the model to temporarily
cache the data
On Thu, Oct 27, 2022 at 2:36 AM Yang, Weijiang wrote:
>
>
> On 10/26/2022 7:57 PM, Zhong, Yang wrote:
> > The previous patch wrongly replaced FEAT_XSAVE_XCR0_{LO|HI} with
> > FEAT_XSAVE_XSS_{LO|HI} in CPUID(EAX=12,ECX=1):{ECX,EDX}, which made
> > SGX enclave only supported SSE and x87
On Mon, 27 Mar 2023 at 03:52, Ninad Palsule wrote:
>
> Hi Joel,
>
> On 3/26/23 8:05 PM, Joel Stanley wrote:
> > Hi Ninad,
> >
> > On Sun, 26 Mar 2023 at 22:44, Ninad Palsule wrote:
> >> Hello,
> >>
> >> I have incorporated review comments from Stefan. Please review.
> >>
> >> This drop adds
On Sun, 2023-03-26 at 12:20 +0700, Bui Quang Minh wrote:
> This commit extends the APIC ID to 32-bit long and remove the 255 max APIC
> ID limit in userspace APIC. The array that manages local APICs is now
> dynamically allocated based on the max APIC ID of created x86 machine.
> Also, new x2APIC
Am 23.03.2023 um 15:58 hat Stefan Hajnoczi geschrieben:
> vhost_user_server_stop() uses AIO_WAIT_WHILE(). AIO_WAIT_WHILE()
> requires that AioContext is only acquired once.
>
> Since blk_exp_request_shutdown() already acquires the AioContext it
> shouldn't be acquired again in
Hyman Huang writes:
> 在 2023/3/24 22:32, Markus Armbruster 写道:
>> Hyman Huang writes:
>>
>>> 在 2023/3/24 20:11, Markus Armbruster 写道:
huang...@chinatelecom.cn writes:
> From: Hyman Huang(黄勇)
>
> Introduce migration dirty-limit capability, which can
> be turned on
On 24/03/2023 18.45, Claudio Imbrenda wrote:
The recently introduced -async-teardown commandline option was not
wired up properly and did not show up in the output of the QMP command
query-command-line-options. This means that libvirt will have no way to
discover whether the feature is
On Fri, Mar 24 2023, Halil Pasic wrote:
> On Wed, 22 Mar 2023 18:24:33 +0100
> Halil Pasic wrote:
>
>> > > --- a/hw/s390x/virtio-ccw.c
>> > > +++ b/hw/s390x/virtio-ccw.c
>> > > @@ -237,6 +237,7 @@ static int virtio_ccw_set_vqs(SubchDev *sch,
>> > > VqInfoBlock *info,
>> > >
On 3/27/23 09:47, Joel Stanley wrote:
On Sun, 26 Mar 2023 at 22:44, Ninad Palsule wrote:
This is a documentation change for I2C TPM device support.
Qemu already supports devices attached to ISA and sysbus.
This drop adds support for the I2C bus attached TPM devices.
Signed-off-by: Ninad
From: LIU Zhiwei
Currently we only use the env->virt to encode the virtual mode enabled
status. Let's make it a bool type.
Signed-off-by: LIU Zhiwei
Reviewed-by: Weiwei Li
Message-ID: <20230325145348.1208-1-zhiwei_...@linux.alibaba.com>
---
target/riscv/cpu.h| 2 +-
Check on riscv_cpu_virt_enabled contains the check on RVH.
Signed-off-by: Weiwei Li
Signed-off-by: Junqiang Wang
Reviewed-by: Richard Henderson
Reviewed-by: LIU Zhiwei
---
target/riscv/op_helper.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/target/riscv/op_helper.c
Remove redundant parentheses in get_physical_address.
Signed-off-by: Weiwei Li
Signed-off-by: Junqiang Wang
Reviewed-by: Richard Henderson
Reviewed-by: LIU Zhiwei
---
target/riscv/cpu_helper.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/riscv/cpu_helper.c
However on a clean boot into the TPM, the u-boot tpm commands fail:
ast# tpm info
tpm@2e v2.0: VendorID 0x1014, DeviceID 0x0001, RevisionID 0x01 [closed]
ast# tpINTERRUPT>
ast# tpm init
ast# tpm info
tpm@2e v2.0: VendorID 0x1014, DeviceID 0x0001, RevisionID 0x01 [open]
ast# tpm pcr_read 0
Richard Henderson writes:
> User setting of -R reserved_va can lead to an assertion
> failure in page_set_flags. Sanity check the value of
> reserved_va and print an error message instead. Do not
> allocate a commpage at all for m-profile cpus.
I see this:
TESTconvd on i386
On Fri, Mar 24, 2023 at 05:38:36PM +, Alex Bennée wrote:
> We don't update these often but if your the sort of person who enjoys
s/your/you are/
> debating and tuning project policies you could now add yourself as a
> reviewer here so you don't miss the next debate over tabs vs spaces
> ;-)
Since pointer mask works on effective address, and the xl works on the
generation of effective address, so xl related calculation should be done
before pointer mask.
Signed-off-by: Weiwei Li
Signed-off-by: Junqiang Wang
---
target/riscv/translate.c | 16
1 file changed, 12
Sign-extend the vector address when xl = 32.
Signed-off-by: Weiwei Li
Signed-off-by: Junqiang Wang
---
target/riscv/vector_helper.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/target/riscv/vector_helper.c b/target/riscv/vector_helper.c
index a58d82af8c..07477663eb 100644
---
Currently, the pc use signed-extend(in gen_set_pc*) when xl = 32. And
data address should use the same memory address space with it when
xl = 32. So we should change their address calculation to use sign-extended
address when xl = 32.
Signed-off-by: Weiwei Li
Signed-off-by: Junqiang Wang
---
Transform the fetch address before page walk when pointer mask is
enabled for instruction fetch.
Signed-off-by: Weiwei Li
Signed-off-by: Junqiang Wang
---
target/riscv/cpu.h| 1 +
target/riscv/cpu_helper.c | 25 +++--
target/riscv/csr.c| 2 --
3 files
actual_address = (requested_address & ~mpmmask) | mpmbase.
Signed-off-by: Weiwei Li
Signed-off-by: Junqiang Wang
---
target/riscv/vector_helper.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/riscv/vector_helper.c b/target/riscv/vector_helper.c
index
This patchset tries to fix some problems in current implementation for pointer
mask extension, and add support for pointer mask of instruction fetch.
The port is available here:
https://github.com/plctlab/plct-qemu/tree/plct-pm-fix
Weiwei Li (5):
target/riscv: Fix effective address for pointer
Daniel P. Berrangé writes:
> On Tue, Feb 14, 2023 at 05:07:38PM +0100, Juan Quintela wrote:
>> Hi
>>
>> I want to enter a discussion about changing the default of the style
>> guide.
>>
>> There are several reasons for that:
>> - they exist since C99 (i.e. all supported compilers support them)
The recently introduced -async-teardown commandline option was not
wired up properly and did not show up in the output of the QMP command
query-command-line-options. This means that libvirt had no way to
discover whether the feature was supported.
This patch fixes the issue by replacing the
The recently introduced -async-teardown commandline option was not
wired up properly and did not show up in the output of the QMP command
query-command-line-options. This means that libvirt will have no way to
discover whether the feature is supported.
This patch fixes the issue by adding a new
Am 27/03/2023 um 13:39 schrieb Kevin Wolf:
> blk_get_geometry() eventually calls bdrv_nb_sectors(), which is a
> co_wrapper_mixed_bdrv_rdlock. This means that when it is called from
> coroutine context, it already assume to have the graph locked.
>
> However, virtio_blk_sect_range_ok() in
On Fri, Mar 24, 2023 at 05:56:46PM +, Alex Bennée wrote:
>
> Juan Quintela writes:
>
> > Daniel P. Berrangé wrote:
> >> On Tue, Feb 14, 2023 at 05:07:38PM +0100, Juan Quintela wrote:
> >>> Hi
> >>>
> >>> I want to enter a discussion about changing the default of the style
> >>> guide.
>
On Sun, Mar 26, 2023 at 06:04:27PM -0300, casan...@redhat.com wrote:
> From: Carlos Santos
>
> They are required only for system emulation (i.e. have_system is true).
>
> Signed-off-by: Carlos Santos
> ---
> pc-bios/keymaps/meson.build | 6 --
> scripts/meson-buildoptions.sh | 2 ++
>
On Sun, Mar 26, 2023 at 06:17:00PM -0300, casan...@redhat.com wrote:
> From: Carlos Santos
>
> They are required only for system emulation (i.e. have_system is true).
>
> Signed-off-by: Carlos Santos
> ---
> pc-bios/keymaps/meson.build | 6 --
> tests/fp/berkeley-testfloat-3 | 2 +-
>
On Sun, Mar 26, 2023 at 06:04:46PM -0300, casan...@redhat.com wrote:
> From: Carlos Santos
>
> It is required only if linux-user, bsd-user or system emulator is built.
>
> Signed-off-by: Carlos Santos
> ---
> trace/meson.build | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff
On Mon, 27 Mar 2023 at 11:11, Stefan Berger wrote:
>
>
>
> On 3/26/23 21:05, Joel Stanley wrote:
> > Hi Ninad,
> >
> > On Sun, 26 Mar 2023 at 22:44, Ninad Palsule wrote:
> >>
> >> Hello,
> >>
> >> I have incorporated review comments from Stefan. Please review.
> >>
> >> This drop adds support
The virt addr should mask TARGET_PHYS_ADDR_SPACE_BITS to
get the phys addr, and this is used by loading kernel elf.
Signed-off-by: Tianrui Zhao
---
hw/loongarch/virt.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
index
blk_get_geometry() eventually calls bdrv_nb_sectors(), which is a
co_wrapper_mixed_bdrv_rdlock. This means that when it is called from
coroutine context, it already assume to have the graph locked.
However, virtio_blk_sect_range_ok() in block/export/virtio-blk-handler.c
(used by vhost-user-blk
Avocado version 101.0 has a fix to re-compute the checksum
of an asset file if the algorithm used in the *-CHECKSUM
file isn't the same as the one being passed to it by the
avocado user (i.e. the avocado_qemu python module).
In the earlier avocado versions this fix wasn't there due
to which if the
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