On Tue, Apr 18, 2023 at 11:13:57AM +0100, Peter Maydell wrote:
> On Thu, 13 Apr 2023 at 12:12, Zhenzhong Duan wrote:
> >
> > On x86, there are two notifiers registered due to vtd-ir memory
> > region splitting the entire address space. During replay of the
> > address space for each notifier, the
On 4/18/23 05:10, Peter Maydell wrote:
On Wed, 15 Mar 2023 at 14:52, Guenter Roeck wrote:
The SOC on i.MX6UL and i.MX7 has 2 Ethernet interfaces. The PHY on each may
be connected to separate MDIO busses, or both may be connected on the same
MDIO bus using different PHY addresses. Commit
A lot of our vhost-user stubs are large chunks of boilerplate that do
(mostly) the same thing. This series attempts to fix that by defining
a new base class (vhost-user-base) which is used by a generic
vhost-user-device implementation. Then the rng, gpio and i2c
vhost-user devices become simple
Signed-off-by: Alex Bennée
---
include/hw/virtio/virtio.h | 7 +++
1 file changed, 7 insertions(+)
diff --git a/include/hw/virtio/virtio.h b/include/hw/virtio/virtio.h
index f236e94ca6..22ec098462 100644
--- a/include/hw/virtio/virtio.h
+++ b/include/hw/virtio/virtio.h
@@ -274,6 +274,13 @@
On 4/12/23 02:58, Igor Mammedov wrote:
On Tue, 11 Apr 2023 18:00:49 +0200
Igor Mammedov wrote:
On Tue, 28 Mar 2023 11:59:26 -0400
Eric DeVolder wrote:
Currently i386 QEMU generates MADT revision 3, and reports
MADT revision 1. ACPI 6.3 introduces MADT revision 5.
For MADT revision 4,
On Fri, Mar 31, 2023 at 12:27:48PM -0400, Peter Xu wrote:
> On Fri, Mar 31, 2023 at 05:10:16PM +0100, Daniel P. Berrangé wrote:
> > On Fri, Mar 31, 2023 at 11:55:03AM -0400, Peter Xu wrote:
> > > On Fri, Mar 31, 2023 at 12:30:45PM -0300, Fabiano Rosas wrote:
> > > > Peter Xu writes:
> > > >
> >
On Tue, Feb 28, 2023 at 04:16:01PM +0300, Andrei Gudkov via wrote:
> Summary of calc-dirty-rate changes:
>
> 1. The most important change is that now calc-dirty-rate produces
>a *vector* of dirty page measurements for progressively increasing time
>periods: 125ms, 250, 500, 750, 1000,
Am 18. April 2023 06:28:23 UTC schrieb "Volker Rümelin" :
>Windows sends an extra left control key up/down input event for
>every right alt key up/down input event for keyboards with
>international layout. Since commit 830473455f ("ui/sdl2: fix
>handling of AltGr key on Windows") QEMU uses a
Hi Emanuele and Kevin,
The following commit is not in qemu.git/master or Kevin's block-next
tree:
https://repo.or.cz/qemu/kevin.git/commitdiff/b4959a8028f417a269168e1570b5e502123e64ed
Do you what the status of that patch is?
Multi-queue block layer code I'm working on depends on this change to
On Tue, 18 Apr 2023 at 14:31, Eugenio Perez Martin wrote:
>
> On Tue, Apr 18, 2023 at 7:59 PM Stefan Hajnoczi wrote:
> >
> > On Tue, Apr 18, 2023 at 10:09:30AM +0200, Eugenio Perez Martin wrote:
> > > On Mon, Apr 17, 2023 at 9:33 PM Stefan Hajnoczi
> > > wrote:
> > > >
> > > > On Mon, 17 Apr
On Fri, 7 Apr 2023 at 21:05, wrote:
>
> From: Carlos Santos
>
> It is not useful when configuring with --enable-trace-backends=nop.
>
> Signed-off-by: Carlos Santos
> ---
> Changes v1->v2:
> Install based on chosen trace backend, not on chosen emulators.
> Changes v2->v3:
> Add missing
Daniel P. Berrangé writes:
> There are 27 pre-copy live migration scenarios being tested. In all of
> these we force non-convergance and run for one iteration, then let it
> converge and wait for completion during the second (or following)
> iterations. At 3 mbps bandwidth limit the first
On Tue, Apr 18, 2023 at 10:02 AM Thomas Huth wrote:
> FreeBSD 13.0 has been released in April 2021:
>
> https://www.freebsd.org/releases/13.0R/announce/
>
> According to QEMU's support policy, we stop supporting the previous
> major release two years after the the new major release has been
>
Postcopy requires the memory support userfaultfd to work. Right now we
check it but it's a bit too late (when switching to postcopy migration).
Do that early right at enabling of postcopy.
Note that this is still only a best effort because ramblocks can be
dynamically created. We can add check
The migration object may want to check against different types of memory
when initialized. Delay the creation to be after late backends.
Signed-off-by: Peter Xu
---
softmmu/vl.c | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/softmmu/vl.c b/softmmu/vl.c
index
Sean Christopherson writes:
On Tue, Mar 28, 2023, Chao Peng wrote:
On Fri, Mar 24, 2023 at 10:29:25AM +0800, Xiaoyao Li wrote:
> On 3/24/2023 10:10 AM, Chao Peng wrote:
> > On Wed, Mar 22, 2023 at 05:41:31PM -0700, Isaku Yamahata wrote:
> > > On Wed, Mar 08, 2023 at 03:40:26PM +0800,
> > >
On 2023/4/18 22:06, Weiwei Li wrote:
When PMP entry overlap part of the page, we'll set the tlb_size to 1, which
will make the address in tlb entry set with TLB_INVALID_MASK, and the next
access will again go through tlb_fill.However, this way will not work in
tb_gen_code() =>
On 4/18/2023 11:34 PM, Michael S. Tsirkin wrote:
On Tue, Apr 18, 2023 at 11:18:11AM -0400, Stefan Hajnoczi wrote:
Hi,
Cindy's commit ca71db438bdc ("vhost: implement vhost_dev_start method")
added SET_STATUS calls to vhost_dev_start() and vhost_dev_stop() for all
vhost backends.
Eugenio's
On Tue, Apr 18, 2023 at 05:58:44PM +0100, Daniel P. Berrangé wrote:
> On Fri, Mar 31, 2023 at 12:27:48PM -0400, Peter Xu wrote:
> > On Fri, Mar 31, 2023 at 05:10:16PM +0100, Daniel P. Berrangé wrote:
> > > On Fri, Mar 31, 2023 at 11:55:03AM -0400, Peter Xu wrote:
> > > > On Fri, Mar 31, 2023 at
Signed-off-by: Dave Jiang
---
hw/acpi/genport.c | 61 +++
hw/acpi/meson.build |1 +
hw/i386/acpi-build.c| 32 ++-
include/hw/acpi/aml-build.h |4 +--
softmmu/vl.c| 26
s small RFC patch series is really a hack on what I need from qemu rather
than a proper implementation. I'm hoping to get some guidance from the list on
how to implement this correctly for qemu upstream. Thank you!
The patch series provides support for the ACPI Generic Port support that's
defined
Add QOM json update for ACPI generic port object to support HMAT
enumeration.
Signed-off-by: Dave Jiang
---
qapi/machine.json |3 ++-
qapi/qom.json | 12
2 files changed, 14 insertions(+), 1 deletion(-)
diff --git a/qapi/machine.json b/qapi/machine.json
index
The Generic Port Affinity Structure is added for the System Resource
Affinity Table in ACPI r6.4. It provides information on the proximity
domain that's associated with a device handle. This information in
combination with HMAT can be used by the CXL driver to calculate the
bandwidth and latency
Postcopy can fail in a weird way when guest mem is put onto a random file:
https://bugzilla.redhat.com/show_bug.cgi?id=2057267
It's because we only check userfault privilege on dest QEMU but don't check
memory types. We do so only until the UFFDIO_REGISTER right after we
switch to postcopy live
Detect the file system for a memory-backend-file object and cache it within
the object if possible when CONFIG_LINUX (using statfs).
Only support the two important types of memory (tmpfs, hugetlbfs) and keep
the rest as "unknown" for now.
Signed-off-by: Peter Xu
---
backends/hostmem-file.c |
Thomas Huth writes:
> FreeBSD 13.0 has been released in April 2021:
>
> https://www.freebsd.org/releases/13.0R/announce/
>
> According to QEMU's support policy, we stop supporting the previous
> major release two years after the the new major release has been
> published. So we can stop
From: Pei Li
Currently, part of the vdpa initialization / startup process
needs to trigger many ioctls per vq, which is very inefficient
and causing unnecessary context switch between user mode and
kernel mode.
This patch creates an additional ioctl() command, namely
From: Pei Li
Currently, part of the vdpa initialization / startup process
needs to trigger many ioctls per vq, which is very inefficient
and causing unnecessary context switch between user mode and
kernel mode.
This patch creates an additional ioctl() command, namely
Hi,
Cindy's commit ca71db438bdc ("vhost: implement vhost_dev_start method")
added SET_STATUS calls to vhost_dev_start() and vhost_dev_stop() for all
vhost backends.
Eugenio's commit c3716f260bff ("vdpa: move vhost reset after get vring
base") deferred the SET_STATUS 0 call in vhost_dev_stop()
Make it clear the vhost-user-device is intended for expert use only.
Signed-off-by: Alex Bennée
---
v2
- make clear vhost-user-device for expert use
---
docs/system/devices/vhost-user-rng.rst | 2 ++
docs/system/devices/vhost-user.rst | 41 ++
2 files changed, 43
On 4/18/23 08:17, Michael S. Tsirkin wrote:
> On Tue, Apr 18, 2023 at 05:13:11AM +, Raphael Norwitz wrote:
>> Hey Andrey - apologies for the late reply here.
>>
>> It sounds like you are dealing with a buggy guest, rather than a QEMU issue.
>>
>>> On Apr 10, 2023, at 11:39 AM, Andrey
Juan,
This series could use some feedback from the migration maintainer
POV. I think it looks like a valuable idea to take which could
significantly help mgmt apps plan migration.
Daniel
On Tue, Apr 18, 2023 at 01:25:08PM +, Gudkov Andrei via wrote:
> ping5
>
>
On 4/18/23 14:38, Nina Schoetterl-Glausch wrote:
On Tue, 2023-04-18 at 12:01 +0200, Pierre Morel wrote:
On 4/18/23 10:53, Nina Schoetterl-Glausch wrote:
On Mon, 2023-04-03 at 18:28 +0200, Pierre Morel wrote:
S390 adds two new SMP levels, drawers and books to the CPU
topology.
The S390 CPU
On Fri, Mar 31, 2023 at 01:48:44PM -0400, Paolo Bonzini wrote:
> The Fedora CI and coverity runs are using a slightly different set of
> packages. Copy most of the content over from tests/docker while
> keeping the commands at the end that unpack the tools.
>
> Signed-off-by: Paolo Bonzini
>
On 4/18/23 13:30, Peter Maydell wrote:
On Tue, 18 Apr 2023 at 12:01, Richard Henderson
wrote:
On 4/14/23 18:04, Peter Maydell wrote:
+/* Check if page table walk is to secure or non-secure PA space. */
+ptw->out_secure = (is_secure
+ && !(pte_secure
On Tue, Apr 04, 2023 at 02:26:05PM +0200, Pierre Morel wrote:
>
> On 4/4/23 09:03, Cédric Le Goater wrote:
> > On 4/3/23 18:28, Pierre Morel wrote:
> > > diff --git a/include/hw/s390x/cpu-topology.h
> > > b/include/hw/s390x/cpu-topology.h
> > > new file mode 100644
> > > index
On 4/18/23 08:32, Peter Maydell wrote:
On Tue, 18 Apr 2023 at 16:18, Guenter Roeck wrote:
On 4/18/23 07:46, Peter Maydell wrote:
I guess I don't understand what the topology is for these specific
SoCs, then. If there's only one master that might be connected
to multiple PHYs, why does one
Juan Quintela writes:
> Hi
>
> Please, send any topic that you are interested in covering.
>
>
> Call details:
Please find the recording at:
https://fileserver.linaro.org/s/nJTSCLyQBfo6GLJ
--
Alex Bennée
Virtualisation Tech Lead @ Linaro
On Tue, Apr 18, 2023 at 03:19:33PM +0200, Juan Quintela wrote:
> Thomas Huth wrote:
> > On 18/04/2023 13.42, Juan Quintela wrote:
> >> Thomas Huth wrote:
> >>> On 12/04/2023 16.19, Juan Quintela wrote:
> Since commit:
> commit 1bfc8dde505f1e6a92697c52aa9b09e81b54c78f
> Author: Dr.
On Tue, Apr 18, 2023 at 5:18 PM Stefan Hajnoczi wrote:
>
> Hi,
> Cindy's commit ca71db438bdc ("vhost: implement vhost_dev_start method")
> added SET_STATUS calls to vhost_dev_start() and vhost_dev_stop() for all
> vhost backends.
>
> Eugenio's commit c3716f260bff ("vdpa: move vhost reset after
FreeBSD 13.0 has been released in April 2021:
https://www.freebsd.org/releases/13.0R/announce/
According to QEMU's support policy, we stop supporting the previous
major release two years after the the new major release has been
published. So we can stop testing FreeBSD 12 in our CI now.
Lets document some more of the core VirtIODevice structure.
Signed-off-by: Alex Bennée
---
include/hw/virtio/virtio.h | 8
1 file changed, 8 insertions(+)
diff --git a/include/hw/virtio/virtio.h b/include/hw/virtio/virtio.h
index 1ba7a9dd74..ef77e9ef0e 100644
---
Now we can take advantage of our new base class and make
vhost-user-rng a much simpler boilerplate wrapper. Also as this
doesn't require any target specific hacks we only need to build the
stubs once.
Signed-off-by: Alex Bennée
---
v2
- new derivation layout
- move directly to
On Fri, Apr 14, 2023 at 01:42:52PM +0200, Juan Quintela wrote:
> Linux keyring support is protected by CONFIG_KEYUTILS.
> We also need CONFIG_SECRET_KEYRING.
>
> Signed-off-by: Juan Quintela
>
> ---
>
> - Previous version of this patch changed the meson build rules.
> Daniel told me that the
On 4/18/23 07:13, Raphael Norwitz wrote:
> Hey Andrey - apologies for the late reply here.
>
> It sounds like you are dealing with a buggy guest, rather than a QEMU issue.
No arguing here, the guest is buggy.
However, the issue with QEMU is that virtio-blk tolerate such buggy guest
while
Currently ARM QEMU generates, and reports, MADT revision 4. ACPI 6.3
introduces MADT revision 5.
For MADT revision 5, the GICC structure adds an SPE Overflow Interrupt
field. This new 2-byte field is created from the existing 3-byte
Reserved field. The spec indicates if the SPE overflow interrupt
Following the guidelines in tests/qtest/bios-tables-test.c, this
is step 6.
For the cpuhp test case, it is started with:
-smp 2,cores=3,sockets=2,maxcpus=6
So two of six CPUs are present, leaving 4 hot-pluggable CPUs. This
is what the disassembly diff below shows (two entries with Enabled=1
and
Currently i386 QEMU generates MADT revision 3, and reports
MADT revision 1. ACPI 6.3 introduces MADT revision 5.
For MADT revision 4, that introduces ARM GIC structures, which do
not apply to i386.
For MADT revision 5, the Local APIC flags introduces the Online
Capable bitfield.
Making MADT
The following Linux kernel change broke CPU hotplug for MADT revision
less than 5.
e2869bd7af60 ("x86/acpi/boot: Do not register processors that cannot be
onlined for x2APIC")
Discussion on this topic can be located here:
Following the guidelines in tests/qtest/bios-tables-test.c, this
change sets-up bios-tables-test-allowed-diff.h to exclude the
imminent changes to the APIC tables, per step 2.
Signed-off-by: Eric DeVolder
---
tests/qtest/bios-tables-test-allowed-diff.h | 4
1 file changed, 4 insertions(+)
On Tue, Apr 18, 2023 at 7:59 PM Stefan Hajnoczi wrote:
>
> On Tue, Apr 18, 2023 at 10:09:30AM +0200, Eugenio Perez Martin wrote:
> > On Mon, Apr 17, 2023 at 9:33 PM Stefan Hajnoczi wrote:
> > >
> > > On Mon, 17 Apr 2023 at 15:10, Eugenio Perez Martin
> > > wrote:
> > > >
> > > > On Mon, Apr
TLB needn't be flushed when pmpcfg/pmpaddr don't changes.
Signed-off-by: Weiwei Li
Signed-off-by: Junqiang Wang
Reviewed-by: Alistair Francis
---
target/riscv/pmp.c | 24
1 file changed, 16 insertions(+), 8 deletions(-)
diff --git a/target/riscv/pmp.c
The translation block may also be affected when PMP entry changes.
Signed-off-by: Weiwei Li
Signed-off-by: Junqiang Wang
---
target/riscv/pmp.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/target/riscv/pmp.c b/target/riscv/pmp.c
index ec86fccd2e..37bc76c474 100644
---
This patchset tries to fix the PMP bypass problem issue
https://gitlab.com/qemu-project/qemu/-/issues/1542:
- TLB will be cached if the matched PMP entry cover the whole page. However
PMP entries with higher priority may cover part of the page (but not match the
access address), which means
Signed-off-by: Weiwei Li
Signed-off-by: Junqiang Wang
---
target/riscv/pmp.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/target/riscv/pmp.c b/target/riscv/pmp.c
index 67347c5887..1cce3f0ce4 100644
--- a/target/riscv/pmp.c
+++ b/target/riscv/pmp.c
@@ -122,7
When PMP entry overlap part of the page, we'll set the tlb_size to 1, which
will make the address in tlb entry set with TLB_INVALID_MASK, and the next
access will again go through tlb_fill.However, this way will not work in
tb_gen_code() => get_page_addr_code_hostp(): the TLB host address will be
TLB should be flushed not only for pmpcfg csr changes, but also for
pmpaddr csr changes.
Signed-off-by: Weiwei Li
Signed-off-by: Junqiang Wang
Reviewed-by: Alistair Francis
---
target/riscv/pmp.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/target/riscv/pmp.c b/target/riscv/pmp.c
index
On Tue, 18 Apr 2023 at 15:42, Guenter Roeck wrote:
>
> On 4/18/23 05:10, Peter Maydell wrote:
> > On Wed, 15 Mar 2023 at 14:52, Guenter Roeck wrote:
> > So I was having a look at this to see if it was reasonably easy to
> > split out the PHY into its own device object, and I'm a bit confused.
>
On Tue, Apr 18, 2023 at 06:37:04PM +0200, Andrey Ryabinin wrote:
> On 4/18/23 07:13, Raphael Norwitz wrote:
> > Hey Andrey - apologies for the late reply here.
> >
> > It sounds like you are dealing with a buggy guest, rather than a QEMU issue.
>
> No arguing here, the guest is buggy.
> However,
On Tue, Apr 4, 2023 at 4:55 AM Paolo Bonzini wrote:
>
> On 3/3/23 18:39, Haitao Shan wrote:
> >> No, we're always open to new proposals. It merely means that it
> >> might be harder to justify why the new hypervisor is a net benefit
> >> for QEMU, when there is a competing solution supported by
Add PCI based MEN Chameleon Bus carrier emulation.
Acked-by: Alistair Francis
Signed-off-by: Johannes Thumshirn
---
hw/mcb/Kconfig | 6 +
hw/mcb/mcb-pci.c| 298
hw/mcb/meson.build | 1 +
hw/mcb/trace-events | 4 +
hw/mcb/trace.h
The MEN Chameleon Bus (MCB) is an on-chip bus system exposing IP Cores of an
FPGA to a outside bus system like PCIe.
Acked-by: Alistair Francis
Signed-off-by: Johannes Thumshirn
---
MAINTAINERS | 6 ++
hw/Kconfig | 1 +
hw/mcb/Kconfig | 2 +
hw/mcb/mcb.c
Add 16z069 Watchdog over MEN Chameleon BUS emulation.
Signed-off-by: Johannes Thumshirn
---
hw/watchdog/Kconfig | 5 +
hw/watchdog/meson.build | 1 +
hw/watchdog/trace-events | 6 ++
hw/watchdog/wdt_z069.c | 207 +++
4 files changed, 219
Add emulation of MEN Chameleon Hardware to Qemu.
This emulation is specifically designed to test the upstream Linux kernel
drivers when one has no access to the hardware.
The emulation consists of the bus itself, a PCI hardware target creating the
bus, MEN Micro Electronic's 8250 based UART via
On 4/18/23 07:46, Peter Maydell wrote:
On Tue, 18 Apr 2023 at 15:42, Guenter Roeck wrote:
On 4/18/23 05:10, Peter Maydell wrote:
On Wed, 15 Mar 2023 at 14:52, Guenter Roeck wrote:
So I was having a look at this to see if it was reasonably easy to
split out the PHY into its own device
On Mon, Apr 17, 2023 at 05:14:59PM +0100, Alex Bennée wrote:
>
> Stefan Hajnoczi writes:
>
> > On Fri, 14 Apr 2023 at 12:06, Alex Bennée wrote:
> >>
> >> A lot of our vhost-user stubs are large chunks of boilerplate that do
> >> (mostly) the same thing. This series attempts to fix that by
Fixes: 544f0278af (virtio: introduce macro VIRTIO_CONFIG_IRQ_IDX)
Signed-off-by: Alex Bennée
---
hw/display/vhost-user-gpu.c| 4 ++--
hw/net/virtio-net.c| 4 ++--
hw/virtio/vhost-user-fs.c | 4 ++--
hw/virtio/vhost-user-gpio.c| 2 +-
hw/virtio/vhost-vsock-common.c | 4
To use the generic device the user will need to provide the config
region size via the command line. We also add a notifier so the guest
can be pinged if the remote daemon updates the config.
With these changes:
-device vhost-user-device-pci,virtio-id=41,num_vqs=2,config_size=8
is equivalent
I'm still not sure how I achieve by use case of the parent class
defining the following properties:
static Property vud_properties[] = {
DEFINE_PROP_CHR("chardev", VHostUserDevice, chardev),
DEFINE_PROP_UINT16("id", VHostUserDevice, id, 0),
DEFINE_PROP_UINT32("num_vqs",
Now we can take advantage of the new base class and make
vhost-user-i2c a much simpler boilerplate wrapper. Also as this
doesn't require any target specific hacks we only need to build the
stubs once.
Signed-off-by: Alex Bennée
---
v2
- update to new inheritance scheme
- move build to
Now the new base class supports config handling we can take advantage
and make vhost-user-gpio a much simpler boilerplate wrapper. Also as
this doesn't require any target specific hacks we only need to build
the stubs once.
Signed-off-by: Alex Bennée
---
v2
- use new vhost-user-base
- move
In theory we shouldn't need to repeat so much boilerplate to support
vhost-user backends. This provides a generic vhost-user-base QOM
object and a derived vhost-user-device for which the user needs to
provide the few bits of information that aren't currently provided by
the vhost-user protocol.
These are useful functions for when you want proper inheritance of
functionality across realize/unrealize calls.
Signed-off-by: Alex Bennée
---
include/hw/qdev-core.h | 27 +++
1 file changed, 27 insertions(+)
diff --git a/include/hw/qdev-core.h b/include/hw/qdev-core.h
Signed-off-by: Alex Bennée
---
include/hw/virtio/virtio.h | 6 ++
1 file changed, 6 insertions(+)
diff --git a/include/hw/virtio/virtio.h b/include/hw/virtio/virtio.h
index 22ec098462..1ba7a9dd74 100644
--- a/include/hw/virtio/virtio.h
+++ b/include/hw/virtio/virtio.h
@@ -217,6 +217,12 @@
This is all pretty much boilerplate.
Signed-off-by: Alex Bennée
Tested-by: Erik Schilling
---
hw/virtio/vhost-user-device-pci.c | 71 +++
hw/virtio/meson.build | 1 +
2 files changed, 72 insertions(+)
create mode 100644
pmp_get_tlb_size can be separated from get_physical_address_pmp and is only
needed when ret == TRANSLATE_SUCCESS.
Signed-off-by: Weiwei Li
Signed-off-by: Junqiang Wang
---
target/riscv/cpu_helper.c | 21 +++--
target/riscv/pmp.c| 4
2 files changed, 11
We needn't check the PMP entries if there is no PMP rules.
Signed-off-by: Weiwei Li
Signed-off-by: Junqiang Wang
---
target/riscv/pmp.c | 251 ++---
1 file changed, 123 insertions(+), 128 deletions(-)
diff --git a/target/riscv/pmp.c b/target/riscv/pmp.c
Currently when configure picks an ObjectiveC compiler it doesn't pay
attention to the cross-prefix. This isn't a big deal in practice,
because we only use ObjC on macos and you can't cross-compile to
macos. But it's a bit inconsistent.
Rearrange the handling of objcc in configure so that we do
> On 4/18/23 14:38, Nina Schoetterl-Glausch wrote:
> > On Tue, 2023-04-18 at 12:01 +0200, Pierre Morel wrote:
> > > On 4/18/23 10:53, Nina Schoetterl-Glausch wrote:
> > > > On Mon, 2023-04-03 at 18:28 +0200, Pierre Morel wrote:
> > > > > S390 adds two new SMP levels, drawers and books to the CPU
>
On Tue, 18 Apr 2023 at 16:18, Guenter Roeck wrote:
> On 4/18/23 07:46, Peter Maydell wrote:
> > I guess I don't understand what the topology is for these specific
> > SoCs, then. If there's only one master that might be connected
> > to multiple PHYs, why does one ethernet device in QEMU need to
On Thu, Apr 06, 2023 at 12:28:00PM +0200, Paolo Bonzini wrote:
> There should be no paths from a coroutine_fn to aio_poll, however in
> practice coroutine_mixed_fn will call aio_poll in the !qemu_in_coroutine()
> path. By marking mixed functions, we can track accurately the call paths
> that
On Tue, Feb 28, 2023 at 04:16:02PM +0300, Andrei Gudkov via wrote:
> * Collect number of all-zero pages
> * Collect vector of number of dirty pages for different time periods
> * Report total number of pages, number of sampled pages and page size
> * Replaced CRC32 with xxHash for performance
PMP entries before the matched PMP entry(including the matched PMP entry)
may overlap partial of the tlb page, which may make different regions in
that page have different permission rights, such as for
PMP0(0x8008~0x800F, R) and PMP1(0x80001000~0x80001FFF, RWX))
write access to 0x8000
On Tue, Apr 18, 2023 at 11:18:11AM -0400, Stefan Hajnoczi wrote:
> Hi,
> Cindy's commit ca71db438bdc ("vhost: implement vhost_dev_start method")
> added SET_STATUS calls to vhost_dev_start() and vhost_dev_stop() for all
> vhost backends.
>
> Eugenio's commit c3716f260bff ("vdpa: move vhost reset
Add MEN z125 UART over MEN Chameleon Bus emulation.
Acked-by: Alistair Francis
Signed-off-by: Johannes Thumshirn
---
hw/char/Kconfig | 6 +++
hw/char/meson.build | 1 +
hw/char/serial-mcb.c | 115 +++
3 files changed, 122 insertions(+)
create
On Tue, Apr 18, 2023 at 10:09:30AM +0200, Eugenio Perez Martin wrote:
> On Mon, Apr 17, 2023 at 9:33 PM Stefan Hajnoczi wrote:
> >
> > On Mon, 17 Apr 2023 at 15:10, Eugenio Perez Martin
> > wrote:
> > >
> > > On Mon, Apr 17, 2023 at 5:38 PM Stefan Hajnoczi
> > > wrote:
> > > >
> > > > On Thu,
Am 18. April 2023 06:56:52 UTC schrieb "Volker Rümelin" :
>Windows sends an extra left control key up/down input event for
>every right alt key up/down input event for keyboards with
>international layout. Since commit 830473455f ("ui/sdl2: fix
>handling of AltGr key on Windows") QEMU uses a
>-Original Message-
>From: Peter Xu
>Sent: Tuesday, April 18, 2023 9:56 PM
>To: Peter Maydell
>Cc: Duan, Zhenzhong ; qemu-
>de...@nongnu.org; m...@redhat.com; jasow...@redhat.com;
>marcel.apfelb...@gmail.com; pbonz...@redhat.com;
>richard.hender...@linaro.org; edua...@habkost.net;
Since OVMF 202211 the bios maps BAR2 to an upper address which has the
undesirable effect of making it impossible to map the memory under Linux
due to it exceeding the maximum permissible range for hotplug memory
(see `mhp_get_pluggable_range` in `mm/memory_hotplug.c`). This patch
resolves this by
On 4/18/23 16:06, Weiwei Li wrote:
When PMP entry overlap part of the page, we'll set the tlb_size to 1, which
will make the address in tlb entry set with TLB_INVALID_MASK, and the next
access will again go through tlb_fill.However, this way will not work in
tb_gen_code() =>
> On Tue, 18 Apr 2023 09:06:30 +
> "zhangying (AZ)" via wrote:
>
> > > On 30.07.20 17:58, Michael S. Tsirkin wrote:
> > > > macOS uses ACPI UIDs to build the DevicePath for NVRAM boot
> > > > options, while OVMF firmware gets them via an internal channel through
> QEMU.
> > > > Due to a bug
This patchset tries to fix the PMP bypass problem issue
https://gitlab.com/qemu-project/qemu/-/issues/1542:
TLB will be cached if the matched PMP entry cover the whole page. However PMP
entries with higher priority may cover part of the page (but not match the
access address), which means
pmp_get_tlb_size can be separated from get_physical_address_pmp and is only
needed when ret == TRANSLATE_SUCCESS.
Signed-off-by: Weiwei Li
Signed-off-by: Junqiang Wang
---
target/riscv/cpu_helper.c | 21 +++--
target/riscv/pmp.c| 4
2 files changed, 11
Use pmp_update_rule_addr() and pmp_update_rule_nums() separately to
update rule nums only once for each pmpcfg_csr_write. Then we can also
move tlb_flush into pmp_update_rule_nums().
Signed-off-by: Weiwei Li
Signed-off-by: Junqiang Wang
---
target/riscv/pmp.c | 7 ---
1 file changed, 4
We needn't check the PMP entries if there is no PMP rules.
Signed-off-by: Weiwei Li
Signed-off-by: Junqiang Wang
---
target/riscv/pmp.c | 251 ++---
1 file changed, 123 insertions(+), 128 deletions(-)
diff --git a/target/riscv/pmp.c b/target/riscv/pmp.c
When PMP entry overlap part of the page, we'll set the tlb_size to 1, which
will make the address in tlb entry set with TLB_INVALID_MASK, and the next
access will again go through tlb_fill.However, this way will not work in
tb_gen_code() => get_page_addr_code_hostp(): the TLB host address will be
On Tue, Apr 18, 2023 at 12:52:17PM -0400, Eric DeVolder wrote:
> Currently ARM QEMU generates, and reports, MADT revision 4. ACPI 6.3
> introduces MADT revision 5.
>
> For MADT revision 5, the GICC structure adds an SPE Overflow Interrupt
> field. This new 2-byte field is created from the
While the bugzilla case wasn't updated this landed in v8.7.0 via a series around
https://gitlab.com/libvirt/libvirt/-/commit/e6c29f09e5b75d7a8d79ae670407060446282c78
v9.0.0 of libvirt is in Ubuntu Lunar, due to that - from now on - one
can control the physical bit settings in a defined way
TLB should be flushed not only for pmpcfg csr changes, but also for
pmpaddr csr changes.
Signed-off-by: Weiwei Li
Signed-off-by: Junqiang Wang
Reviewed-by: Alistair Francis
---
target/riscv/pmp.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/target/riscv/pmp.c b/target/riscv/pmp.c
index
PMP entries before the matched PMP entry(including the matched PMP entry)
may overlap partial of the tlb page, which may make different regions in
that page have different permission rights, such as for
PMP0(0x8008~0x800F, R) and PMP1(0x80001000~0x80001FFF, RWX))
write access to 0x8000
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