Since I just discovered that you're in feature freeze, I wanted to
submit two smallish bug fixes for the win32 tap device. The changes
are independent, but without both fixes the tap device is unusable
(for me, at least!).
Cheers,
Andrew
his change disables the asynchronous write path, while keeping most
of the code around in case someone sees value in resurrecting it. It
also adds some conditional debug output, similar to the read path.
Signed-off-by: Andrew Baumann <andrew.baum...@microsoft.com>
---
Although this version of
rather than aborting the search.
Signed-off-by: Andrew Baumann <andrew.baum...@microsoft.com>
---
net/tap-win32.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/net/tap-win32.c b/net/tap-win32.c
index 4e2fa55..5e5d6db 100644
--- a/net/tap-win32.c
+++ b/net/tap-win32.c
@@ -
Hi Peter,
Thanks for your feedback!
From: Peter Crosthwaite [mailto:crosthwaitepe...@gmail.com]
Sent: Tuesday, 17 November 2015 23:51
> I haven't looked beyond the diffstat yet, but a top level
> architectural comment, I only see the one file in hw/arm. We are
> promoting the split of board and
From: Stefan Weil [mailto:s...@weilnetz.de]
Sent: Tuesday, 17 November 2015 23:40
> > +#ifdef DEBUG_TAP_WIN32
> > +LPVOID msgbuf;
>
> Does this also work ...
>
> char *msgbuf;
>
>
> > +error = GetLastError();
> > +
> FormatMessage(FORMAT_MESSAGE_ALLOCATE_BUFFER|FORMAT_MESSA
e disables the asynchronous write path, while keeping most
of the code around in case someone sees value in resurrecting it. It
also adds some conditional debug output, similar to the read path.
Signed-off-by: Andrew Baumann <andrew.baum...@microsoft.com>
---
Version 2 changes:
* pass
Minor revisions to the second patch in the series.
Cheers,
Andrew
Andrew Baumann (2):
tap-win32: skip unexpected nodes during registry enumeration
tap-win32: disable broken async write path
net/tap-win32.c | 49 ++---
1 file changed, 38
rather than aborting the search.
Signed-off-by: Andrew Baumann <andrew.baum...@microsoft.com>
Reviewed-by: Stefan Weil <s...@weilnetz.de>
---
net/tap-win32.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/net/tap-win32.c b/net/tap-win32.c
index 4e2fa55..5e5d6db 100644
---
Hi all,
I have been working on Raspberry Pi 2 emulation, building on the previous work
of Gregory Estrade, Stefan Weil and others on the original Raspberry Pi target.
My current working tree (based off a recent master) is here:
https://github.com/0xabu/qemu/tree/raspi
The present status
> From: Peter Crosthwaite [mailto:crosthwaitepe...@gmail.com]
> Sent: Sunday, 6 December 2015 22:37
> On Thu, Dec 3, 2015 at 10:01 PM, Andrew Baumann
> <andrew.baum...@microsoft.com> wrote:
> > This adds the system mailboxes which are used to communicate with a
> > n
This device maintains all the non-CPU peripherals on bcm2835 (Pi1)
which are also present on bcm2836 (Pi2). It also implements the
private address space used for DMA.
Signed-off-by: Andrew Baumann <andrew.baum...@microsoft.com>
---
hw/arm/Makefile.objs | 1 +
This is the SoC for Raspberry Pi 2.
Signed-off-by: Andrew Baumann <andrew.baum...@microsoft.com>
---
hw/arm/Makefile.objs | 2 +-
hw/arm/bcm2836.c | 135 +++
include/hw/arm/bcm2836.h | 33
3 files changed, 169 inse
This sits behind the mailbox interface, and implements
request/response queries for system properties. The
framebuffer-related properties will be added in a later patch.
Signed-off-by: Andrew Baumann <andrew.baum...@microsoft.com>
---
hw/misc/Makefile.objs | 1 +
h
Signed-off-by: Andrew Baumann <andrew.baum...@microsoft.com>
---
hw/sd/Makefile.objs | 1 +
hw/sd/bcm2835_emmc.c | 800 +++
include/hw/sd/bcm2835_emmc.h | 56 +++
3 files changed, 857 insertions(+)
create mode 100644
This module is specific to the bcm2836 (Pi2). It implements the top
level interrupt controller, and mailboxes used for inter-processor
synchronisation.
Signed-off-by: Andrew Baumann <andrew.baum...@microsoft.com>
---
hw/intc/Makefile.objs | 2 +-
hw/intc/bcm2836_con
Signed-off-by: Andrew Baumann <andrew.baum...@microsoft.com>
---
hw/intc/Makefile.objs| 1 +
hw/intc/bcm2835_ic.c | 234 +++
include/hw/intc/bcm2835_ic.h | 26 +
3 files changed, 261 insertions(+)
create mode 100644 h
This adds the system mailboxes which are used to communicate with a
number of GPU peripherals on Pi/Pi2.
Signed-off-by: Andrew Baumann <andrew.baum...@microsoft.com>
---
default-configs/arm-softmmu.mak | 1 +
hw/misc/Makefile.objs| 1 +
hw/misc/bcm2835
bcm2835/Pi1 requires more peripherals, and will be added in a later
patch series.
Signed-off-by: Andrew Baumann <andrew.baum...@microsoft.com>
---
hw/arm/Makefile.objs | 2 +-
hw/arm/raspi.c | 179 +++
2 files changed, 180 insertions
> From: Peter Crosthwaite [mailto:crosthwaitepe...@gmail.com]
> Sent: Saturday, 5 December 2015 22:27
> On Fri, Dec 4, 2015 at 1:16 PM, Andrew Baumann
> <andrew.baum...@microsoft.com> wrote:
> > @@ -1563,6 +1592,11 @@ void sd_write_data(SDState *sd, uint8_t value)
> >
> From: Jason Wang [mailto:jasow...@redhat.com]
> Sent: Sunday, 6 December 2015 18:44
> On 12/05/2015 02:58 AM, Andrew Baumann wrote:
> > With this change, access to invalid/unimplemented device registers are
> > logged as a "guest error" rather than aborting qemu
Hi Peter,
> From: Peter Crosthwaite [mailto:crosthwaitepe...@gmail.com]
> Sent: Sunday, 6 December 2015 15:47
> On Sun, Dec 6, 2015 at 1:20 PM, Andrew Baumann
> <andrew.baum...@microsoft.com> wrote:
> >> From: Peter Crosthwaite [mailto:crosthwaitepe...@gmail.com]
>
> From: Peter Crosthwaite [mailto:crosthwaitepe...@gmail.com]
> Sent: Saturday, 5 December 2015 21:26
> Is this IP just SDHCI? We already model SDHCI in QEMU, see
> hw/sd/sdhci.c. If there are RPi specific features to the SDHCI
> implementation they should be added as optional extensions
Peter,
Thanks for the feedback on this patch. I agree with all of it, but I do have
one minor quibble...
> From: Peter Crosthwaite [mailto:crosthwaitepe...@gmail.com]
> Sent: Saturday, 5 December 2015 21:20
> On Thu, Dec 3, 2015 at 10:01 PM, Andrew Baumann
> <andrew.baum...@micro
> From: Peter Crosthwaite [mailto:crosthwaitepe...@gmail.com]
> Sent: Tuesday, 8 December 2015 23:40
> On Tue, Dec 8, 2015 at 10:19 PM, Andrew Baumann
> <andrew.baum...@microsoft.com> wrote:
> >> From: Peter Crosthwaite [mailto:crosthwaitepe...@gmail.com]
> >> S
> From: Peter Crosthwaite [mailto:crosthwaitepe...@gmail.com]
> Sent: Wednesday, 9 December 2015 10:55
> > Yes, that's the same change I made. Is it going to be applied?
> >
>
> It missed the boat for 2.5, but you could help by putting a tested-by
> or reviewed-by to the patch.
Ok.
> > The
!)
Cheers,
Andrew
Andrew Baumann (2):
hw/sd: implement CMD23 (SET_BLOCK_COUNT) for MMC compatibility
hw/sd: model a power-up delay, as a workaround for an EDK2 bug
hw/sd/sd.c | 78 ++
1 file changed, 74 insertions(+), 4 deletions
y")
Signed-off-by: Andrew Baumann <andrew.baum...@microsoft.com>
---
Obviously this is a bug that should be fixed in EDK2. However, this
initialisation appears to have been around for quite a while in EDK2
(in various forms), and the fact that it has obviously worked with so
many real S
CMD23 is optional for SD but required for MMC, and Tianocore EDK2
(UEFI) uses it at boot.
Signed-off-by: Andrew Baumann <andrew.baum...@microsoft.com>
---
For EDK2 to boot all we actually need to do is return success and
ignore the command, but it seemed much safer to implement the full
sem
to raise the exception (data
abort), and uses the new aligned loads in LDREX (for all but
single-byte loads).
Signed-off-by: Andrew Baumann <andrew.baum...@microsoft.com>
---
Thanks for the feedback on v1! I wish I had known about (or gone
looking for) MO_ALIGN
> This patch series adds initial support for Raspberry Pi 2
> (bcm2836). It is heavily based on the original (out of tree) work of
> Gregory Estrade, Stefan Weil and others to support Raspberry Pi 1.
Apologies for the silence on this thread. My outbound SMTP server seems to be
rejecting the
Although this series includes many of the peripherals common to Pi1
(aka bcm2835 aka Pi0), it's not yet possible to boot a Pi1, because it
requires additional peripherals, so I'll also add that SoC and machine
in a later patch.
Cheers,
Andrew
Andrew Baumann (8):
bcm2835_sbm: add BCM2835
> From: Paolo Bonzini [mailto:paolo.bonz...@gmail.com] On Behalf Of Paolo
> Bonzini
> Sent: Monday, 7 December 2015 01:53
> On 07/12/2015 06:20, Andrew Baumann wrote:
> > Yeah, I considered doing that, but figured that those cases
> > (incorrectly-sized regist
Signed-off-by: Andrew Baumann <andrew.baum...@microsoft.com>
---
hw/net/lan9118.c | 12
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/hw/net/lan9118.c b/hw/net/lan9118.c
index 133fd3d..1734b52 100644
--- a/hw/net/lan9118.c
+++ b/hw/net/lan9118.c
@@ -904,7 +904,
This series fixes two niggles in the lan9118 emulation. Together,
these are enough for it to work with a simple driver for the SMSC 9221
(which is very similar).
Cheers,
Andrew
Andrew Baumann (2):
lan9118: fix emulation of MAC address loaded bit in E2P_CMD register
lan9118: log and ignore
There appears to have been a longstanding typo in the implementation
of the "MAC address loaded" bit in the E2P_CMD (EEPROM command)
register. The code was using 0x10, but the controller spec says it
should be bit 8 (0x100).
Signed-off-by: Andrew Baumann <andrew.baum...@
> From: Peter Maydell [mailto:peter.mayd...@linaro.org]
> Sent: Wednesday, 9 December 2015 13:01
> On 9 December 2015 at 18:54, Peter Crosthwaite
> <crosthwaitepe...@gmail.com> wrote:
> > On Wed, Dec 9, 2015 at 10:17 AM, Andrew Baumann
> > <andrew.baum...@micros
Raspberry Pi needs this change as well. I don't mind if it's as implemented
below, or conditional under a flag property.
Tested-By: Andrew Baumann <andrew.baum...@microsoft.com>
Thanks,
Andrew
> From: Peter Crosthwaite [mailto:crosthwaitepe...@gmail.com]
> Sent: Thursday, 10 Dece
Some of these errors may be harmless (e.g. probing unimplemented
commands, or issuing CMD12 in the wrong state), and may also be quite
frequent. Spamming the standard error output isn't desirable in such
cases.
Signed-off-by: Andrew Baumann <andrew.baum...@microsoft.com>
---
It migh
CMD23 is optional for SD but required for MMC, and the UEFI bootloader
used for Windows on Raspberry Pi 2 issues it.
Signed-off-by: Andrew Baumann <andrew.baum...@microsoft.com>
---
hw/sd/sd.c | 37 +
1 file changed, 37 insertions(+)
diff --git a/hw/sd/
mbeddedPkg/Universal/MmcDxe/MmcIdentification.c#L279
(This is the loop starting with "We need to wait for the MMC or SD
card is ready")
Signed-off-by: Andrew Baumann <andrew.baum...@microsoft.com>
---
Obviously this is a bug that should be fixed in EDK2. However, this
initialisation a
> From: Peter Crosthwaite [mailto:crosthwaitepe...@gmail.com]
> Sent: Wednesday, 16 December 2015 12:00
> On Wed, Dec 16, 2015 at 11:47 AM, Andrew Baumann
> <andrew.baum...@microsoft.com> wrote:
> > This is exactly equivalent to Peter's patch here:
> > http
resets.
Signed-off-by: Andrew Baumann <andrew.baum...@microsoft.com>
---
hw/sd/sdhci.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c
index dd83e89..61f919b 100644
--- a/hw/sd/sdhci.c
+++ b/hw/sd/sdhci.c
@@ -193,7 +193,9 @@ stati
* use an actual timer for the power-up delay, rather than relying on
the guest polling ACMD41 twice
* added patch 3: replace fprintfs with guest error logging
(I'm guessing at the CC list here, since this code appears to be
unmaintained. Apologies if I guessed wrong!)
Cheers,
Andrew
Andrew
. The digilent Zybo board has a public schematic
which shows SD VCC hardwiring:
http://digilentinc.com/Data/Products/ZYBO/ZYBO_sch_VB.3.pdf
bottom of page 3.
Signed-off-by: Peter Crosthwaite <crosthwaite.pe...@gmail.com>
Reviewed-by: Sai Pavan Boddu <sai.pavan.bo...@xilinx.com>
Signed-off-by: An
code doesn't make sense (command index
error is defined for the case where the index in a response does not
match that of the issued command), and in at least one case (CMD23
issued by UEFI on Raspberry Pi 2), actual hardware does not do this.
Signed-off-by: Andrew Baumann <andrew.b
,
Andrew
Andrew Baumann (3):
sd: sdhci: Delete over-zealous power check
sdhci: don't raise a command index error for an unexpected response
sdhci: add optional quirk property to disable card insertion/removal
interrupts
hw/sd/sdhci.c | 11 ++-
1 file changed, 6 insertions(+), 5
> From: Peter Crosthwaite [mailto:crosthwaitepe...@gmail.com]
> Sent: Thursday, 31 December 2015 21:38
> On Thu, Dec 31, 2015 at 1:40 PM, Andrew Baumann
> <andrew.baum...@microsoft.com> wrote:
> > This quirk is a workaround for the following hardware behaviour, on
>
> From: Peter Crosthwaite [mailto:crosthwaitepe...@gmail.com]
> Sent: Monday, 4 January 2016 22:18
> On Mon, Jan 4, 2016 at 2:12 PM, Andrew Baumann
> <andrew.baum...@microsoft.com> wrote:
> >> From: Peter Crosthwaite [mailto:crosthwaitepe...@gmail.com]
> >> Se
Hi,
> From: qemu-devel-bounces+andrew.baumann=microsoft@nongnu.org
> [mailto:qemu-devel-
> bounces+andrew.baumann=microsoft@nongnu.org] On Behalf Of
> Alvise Rigo
> Sent: Monday, 14 December 2015 00:41
>
> This is the sixth iteration of the patch series which applies to the
> upstream
Hi Piotr,
Sorry, I just noticed this email. Please keep me in the To or CC, as I am not
good at keeping up with all the traffic on qemu-devel.
> From: qemu-devel-bounces+andrew.baumann=microsoft@nongnu.org
> [mailto:qemu-devel-
> bounces+andrew.baumann=microsoft@nongnu.org] On Behalf Of
> From: Alistair Francis [mailto:alistai...@gmail.com]
> Sent: Tuesday, 5 January 2016 18:14
> On Thu, Dec 31, 2015 at 4:31 PM, Andrew Baumann
> <andrew.baum...@microsoft.com> wrote:
> > This device maintains all the non-CPU peripherals on bcm2835 (Pi1)
> > which ar
> From: Piotr Król [mailto:piotr.k...@3mdeb.com]
> Sent: Wednesday, 6 January 2016 16:10
[...]
> I tried v2 with qemu 38a762fec63f using:
>
> $ qemu-system-arm -M raspi2 -kernel raspbian-boot/kernel7.img -sd 2015-
> 11-21-raspbian-jessie.img -append "rw earlyprintk loglevel=8
>
> From: Peter Crosthwaite [mailto:crosthwaitepe...@gmail.com]
> Sent: Wednesday, 6 January 2016 18:47
> On Wed, Jan 6, 2016 at 4:09 PM, Piotr Król <piotr.k...@3mdeb.com> wrote:
> > On Wed, Jan 06, 2016 at 06:27:54PM +, Andrew Baumann wrote:
> >> This is most
Hi Peter,
> From: Peter Crosthwaite [mailto:crosthwaitepe...@gmail.com]
> Sent: Wednesday, 30 December 2015 16:13
> On Wed, Dec 23, 2015 at 4:25 PM, Andrew Baumann
> <andrew.baum...@microsoft.com> wrote:
> > This adds the system mailboxes which are used to communicate
> From: Peter Crosthwaite [mailto:crosthwaitepe...@gmail.com]
> Sent: Wednesday, 30 December 2015 19:21
> On Wed, Dec 23, 2015 at 4:25 PM, Andrew Baumann
> <andrew.baum...@microsoft.com> wrote:
> > This module is specific to the bcm2836 (Pi2). It implements the top
> &
> From: Peter Crosthwaite [mailto:crosthwaitepe...@gmail.com]
> Sent: Wednesday, 30 December 2015 18:54
> On Wed, Dec 23, 2015 at 4:25 PM, Andrew Baumann
> <andrew.baum...@microsoft.com> wrote:
> > This device maintains all the non-CPU peripherals on bcm2835 (Pi1)
&g
This adds the system mailboxes which are used to communicate with a
number of GPU peripherals on Pi/Pi2.
Signed-off-by: Andrew Baumann <andrew.baum...@microsoft.com>
---
Notes:
v3:
* #define register offsets
* rename mbox_init -> mbox_reset
* s/_/-/ in property and t
This sits behind the mailbox interface, and implements
request/response queries for system properties. The
framebuffer-related properties will be added in a later patch.
Signed-off-by: Andrew Baumann <andrew.baum...@microsoft.com>
---
hw/misc/Makefile.objs | 1 +
h
This is the SoC for Raspberry Pi 2.
Signed-off-by: Andrew Baumann <andrew.baum...@microsoft.com>
---
The use of smp_cpus is dubious here. Ideally it should be passed as a
property from the board, but I found that simply initialising (and not
later realizing) an ARM cpu had unintended side-e
This device maintains all the non-CPU peripherals on bcm2835 (Pi1)
which are also present on bcm2836 (Pi2). It also implements the
private address spaces used for DMA and mailboxes.
Signed-off-by: Andrew Baumann <andrew.baum...@microsoft.com>
---
Notes:
v3:
* clean up raspi_plat
Signed-off-by: Andrew Baumann <andrew.baum...@microsoft.com>
Reviewed-by: Peter Crosthwaite <crosthwaite.pe...@gmail.com>
---
Notes:
v3:
* minor style tweaks
* use extract32 in place of manual shift/masking
v2 changes:
* split inputs to named gpu_irq and
s ram from the board through to the SoC
* cleanup raspi_platform.h
* s/_/-/ in device/property/type names
Cheers,
Andrew
Andrew Baumann (7):
bcm2835_mbox: add BCM2835 mailboxes
bcm2835_property: add bcm2835 property channel
bcm2835_ic: add bcm2835 interrupt controller
bcm2835_periph
> From: Stefan Hajnoczi [mailto:stefa...@gmail.com]
> Sent: Tuesday, 22 December 2015 00:04
> On Mon, Dec 21, 2015 at 02:47:46PM -0800, Andrew Baumann wrote:
> > This is a series of three tweaks needed to enable the generic sdhci
> > controller to emulate Raspberry Pi (bc
() call never sees the card insert interrupt
enabled. However, not calling the insert_eject_cb results in prnsts
remaining 0, when it actually needs to be updated to indicate card
presence and R/O status.
Signed-off-by: Andrew Baumann <andrew.baum...@microsoft.com>
---
hw/sd/sdhci.c
as a "sticky" card insertion interrupt that
remains pending until enabled/cleared by the guest. We also need to
mask norintsts with norintstsen in sdhci_read, to avoid the interrupt
being visible before it is enabled.
Signed-off-by: Andrew Baumann <andrew.baum...@microsoft.com>
---
This
bcm2835/Pi1 requires more peripherals, and will be added in a later
patch series.
Signed-off-by: Andrew Baumann <andrew.baum...@microsoft.com>
---
Notes:
v3:
* fix board setup to remain Pi1 compatible
* pass ram property
hw/arm/Makefile.objs | 2 +-
hw/arm/raspi.c
This module is specific to the bcm2836 (Pi2). It implements the top
level interrupt controller, and mailboxes used for inter-processor
synchronisation.
Signed-off-by: Andrew Baumann <andrew.baum...@microsoft.com>
---
Notes:
v3:
* uint8 localirqs
* style tweaks
* add MR
> From: Peter Crosthwaite [mailto:crosthwaitepe...@gmail.com]
> Sent: Sunday, 20 December 2015 14:58
> On Wed, Dec 16, 2015 at 11:02 AM, Andrew Baumann
> <andrew.baum...@microsoft.com> wrote:
> > The SD spec for ACMD41 says that a zero argument is an "inquiry"
resets.
Signed-off-by: Andrew Baumann <andrew.baum...@microsoft.com>
Reviewed-by: Peter Crosthwaite <crosthwaite.pe...@gmail.com>
---
hw/sd/sdhci.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c
index dd83e89..61f919b 100644
ewed-by: Sai Pavan Boddu <saip...@xilinx.com>
[AB: Add Pi to list of devices fixed in commit message]
Signed-off-by: Andrew Baumann <andrew.baum...@microsoft.com>
---
hw/sd/sdhci.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c
index
code doesn't make sense (command index
error is defined for the case where the index in a response does not
match that of the issued command), and in at least one case (CMD23
issued by UEFI on Raspberry Pi 2), actual hardware does not do this.
Signed-off-by: Andrew Baumann <andrew.b
> From: Peter Crosthwaite [mailto:crosthwaitepe...@gmail.com]
> Sent: Monday, 21 December 2015 13:42
> On Mon, Dec 21, 2015 at 1:31 PM, Andrew Baumann
> <andrew.baum...@microsoft.com> wrote:
> > This is needed for a quirk of the Raspberry Pi (bcm2835/6) MMC
> > con
> From: qemu-devel-bounces+andrew.baumann=microsoft@nongnu.org
> [mailto:qemu-devel-
> bounces+andrew.baumann=microsoft@nongnu.org] On Behalf Of
> Peter Crosthwaite
> Sent: Monday, 21 December 2015 13:46
> On Wed, Dec 16, 2015 at 11:02 AM, Andrew Baumann
> <andr
is functionally equivalent to v1; the only changes are to commit
messages and review metadata.
Cheers,
Andrew
Andrew Baumann (2):
sdhci: don't raise a command index error for an unexpected response
sdhci: add optional quirk property to disable card insertion/removal
interrupts
Peter Crosthwaite (1
is functionally equivalent to v1; the only changes are to commit
messages and review metadata. v3 fixes two bugs in patch 3/3 (details
there).
Cheers,
Andrew
Andrew Baumann (2):
sdhci: don't raise a command index error for an unexpected response
sdhci: add optional quirk property to disable card
resets.
Signed-off-by: Andrew Baumann <andrew.baum...@microsoft.com>
Reviewed-by: Peter Crosthwaite <crosthwaite.pe...@gmail.com>
---
Notes:
v3: add missing field in header, drop needless change to vmstate
hw/sd/sdhci.c | 5 -
include/hw/sd/sdhci.h | 1 +
2 file
ewed-by: Sai Pavan Boddu <saip...@xilinx.com>
[AB: Add Pi to list of devices fixed in commit message]
Signed-off-by: Andrew Baumann <andrew.baum...@microsoft.com>
---
hw/sd/sdhci.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c
index
code doesn't make sense (command index
error is defined for the case where the index in a response does not
match that of the issued command), and in at least one case (CMD23
issued by UEFI on Raspberry Pi 2), actual hardware does not do this.
Signed-off-by: Andrew Baumann <andrew.b
> From: Peter Crosthwaite [mailto:crosthwaitepe...@gmail.com]
> Sent: Monday, 21 December 2015 15:33
> On Mon, Dec 21, 2015 at 3:15 PM, Andrew Baumann
> <andrew.baum...@microsoft.com> wrote:
> >> From: Peter Crosthwaite [mailto:crosthwaitepe...@gmail.com]
> >>
Hi Peter,
Thanks for the review!
> From: Peter Crosthwaite [mailto:crosthwaitepe...@gmail.com]
> Sent: Monday, 21 December 2015 14:49
> On Thu, Dec 3, 2015 at 10:01 PM, Andrew Baumann
> <andrew.baum...@microsoft.com> wrote:
> > This adds the system mailboxes which
> From: Peter Crosthwaite [mailto:crosthwaitepe...@gmail.com]
> Sent: Monday, 21 December 2015 14:57
> On Mon, Dec 21, 2015 at 2:25 PM, Andrew Baumann
> <andrew.baum...@microsoft.com> wrote:
> >> From: qemu-devel-
> bounces+andrew.baumann=microsoft@nong
> From: Peter Maydell [mailto:peter.mayd...@linaro.org]
> Sent: Wednesday, 23 December 2015 11:21
> On 21 December 2015 at 22:25, Andrew Baumann
> <andrew.baum...@microsoft.com> wrote:
>
> >> If you change the VMSTATE layout, you need to bump the version. As
> &g
This device maintains all the non-CPU peripherals on bcm2835 (Pi1)
which are also present on bcm2836 (Pi2). It also implements the
private address space used for DMA.
Signed-off-by: Andrew Baumann <andrew.baum...@microsoft.com>
---
Notes:
v2 changes:
* adapted to use common
This is the SoC for Raspberry Pi 2.
Signed-off-by: Andrew Baumann <andrew.baum...@microsoft.com>
---
hw/arm/Makefile.objs | 2 +-
hw/arm/bcm2836.c | 135 +++
include/hw/arm/bcm2836.h | 33
3 files changed, 169 inse
This sits behind the mailbox interface, and implements
request/response queries for system properties. The
framebuffer-related properties will be added in a later patch.
Signed-off-by: Andrew Baumann <andrew.baum...@microsoft.com>
---
hw/misc/Makefile.objs | 1 +
h
Signed-off-by: Andrew Baumann <andrew.baum...@microsoft.com>
---
Notes:
v2 changes:
* split inputs to named gpu_irq and arm_irq gpio inputs
* use 64-bit gpu_irq and 8-bit arm_irq status rather than 3*32-bit
bitfields
* added defined names for register offsets
* d
> From: Peter Crosthwaite [mailto:crosthwaitepe...@gmail.com]
> Sent: Wednesday, 23 December 2015 15:59
> >>> Notice that this file comes from Linux. I know it's not pretty, but
>
> Where in Linux exactly? I am actually having trouble finding the
> original source. Grepping around linux-next,
This module is specific to the bcm2836 (Pi2). It implements the top
level interrupt controller, and mailboxes used for inter-processor
synchronisation.
Signed-off-by: Andrew Baumann <andrew.baum...@microsoft.com>
---
hw/intc/Makefile.objs | 2 +-
hw/intc/bcm2836_con
rosthwaite
(see specific notes on each patch)
* removed custom SD controller in favour of sdhci
Cheers,
Andrew
Andrew Baumann (7):
bcm2835_mbox: add BCM2835 mailboxes
bcm2835_property: add bcm2835 property channel
bcm2835_ic: add bcm2835 interrupt controller
bcm2835_peripherals: add rol
This adds the system mailboxes which are used to communicate with a
number of GPU peripherals on Pi/Pi2.
Signed-off-by: Andrew Baumann <andrew.baum...@microsoft.com>
---
Notes:
v2:
* renamed bcm2835_sbm to bcm2835_mbox
* dropped bcm2835_arm_control.h (needed defs
bcm2835/Pi1 requires more peripherals, and will be added in a later
patch series.
Signed-off-by: Andrew Baumann <andrew.baum...@microsoft.com>
---
hw/arm/Makefile.objs | 2 +-
hw/arm/raspi.c | 179 +++
2 files changed, 180 insertions
Ping?
Jason, I know you planned to leave this for a few days... I just wanted to make
sure it isn't forgotten :)
Thanks,
Andrew
> -Original Message-
> From: Andrew Baumann
> Sent: Wednesday, 18 November 2015 11:45
> To: qemu-devel@nongnu.org
> Cc: Jason Wang <j
Hi Peter (et al),
I am working on refactoring the Pi support code as you suggested. I have split
the Pi SOCs into separate objects (bcm2835 and bcm2836) which both instantiate
a third common bcm2835_peripherals device that in turn contains all the common
devices. I have also switched the code
> From: Peter Crosthwaite [mailto:crosthwaitepe...@gmail.com]
> Sent: Thursday, 26 November 2015 11:39
> So I am looking at some recent news, and there is the RPi Zero which reuses
> the bcm2835 as a different board. Can't find the schematic yet, but from
> what I can see, this is a raw SoC (no
> From: Peter Crosthwaite [mailto:crosthwaitepe...@gmail.com]
> Sent: Tuesday, 24 November 2015 22:04
> On Tue, Nov 24, 2015 at 4:00 PM, Andrew Baumann
> <andrew.baum...@microsoft.com> wrote:
> > I am working on refactoring the Pi support code as you suggested. I
> From: Peter Maydell [mailto:peter.mayd...@linaro.org]
> Sent: Wednesday, 25 November 2015 01:11
> On 25 November 2015 at 06:04, Peter Crosthwaite
> <crosthwaitepe...@gmail.com> wrote:
> > On Tue, Nov 24, 2015 at 4:00 PM, Andrew Baumann
> > <andrew.baum...@mic
for implementing alignment checks in
translated instructions, and adds one such check to the translation of
LDREX instruction (for all variants except single-byte loads).
Signed-off-by: Andrew Baumann <andrew.baum...@microsoft.com>
---
I realise this will need to wait until after 2.5, but wanted
) and is cleared and remains clear once
the interrupt has been delivered.
Signed-off-by: Andrew Baumann <andrew.baum...@microsoft.com>
---
This depends on
https://lists.gnu.org/archive/html/qemu-devel/2015-12/msg04895.html
(revert of the broken noeject_quirk).
Notes:
v2: changed implemen
Hi Peter,
Thanks again for the reviews.
> From: Peter Crosthwaite [mailto:crosthwaitepe...@gmail.com]
> Sent: Monday, 11 January 2016 19:57
> On Thu, Dec 31, 2015 at 04:31:33PM -0800, Andrew Baumann wrote:
> > +/* TODO: probably shouldn't be using smp_cpus here */
>
> From: Peter Crosthwaite [mailto:crosthwaitepe...@gmail.com]
> Sent: Tuesday, 12 January 2016 15:15
> On Tue, Jan 12, 2016 at 2:56 PM, Andrew Baumann
> <andrew.baum...@microsoft.com> wrote:
> >> From: Peter Crosthwaite [mailto:crosthwaitepe...@gmail.com]
> >>
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