a particular version. For
qemu that's --cc. Not so hard, was it?
--
Daniel Jacobowitz
CodeSourcery, LLC
___
Qemu-devel mailing list
Qemu-devel@nongnu.org
http://lists.nongnu.org/mailman/listinfo/qemu-devel
.
--
Daniel Jacobowitz
CodeSourcery, LLC
Index: cpu-exec.c
===
RCS file: /cvsroot/qemu/qemu/cpu-exec.c,v
retrieving revision 1.69
diff -u -p -r1.69 cpu-exec.c
--- cpu-exec.c 4 Dec 2005 18:46:05 - 1.69
+++ cpu-exec.c 4 Dec
around to emulating the Integrator/AP,
which has a PCI bus, and then we can do it normally.
--
Daniel Jacobowitz
CodeSourcery, LLC
Index: qemu/hw/smc91c111.c
===
--- qemu.orig/hw/smc91c111.c2005-12-13 19:31:38.0 -0800
On Sun, Dec 18, 2005 at 10:42:16AM -0700, M. Warner Losh wrote:
In message: [EMAIL PROTECTED]
Daniel Jacobowitz [EMAIL PROTECTED] writes:
: On Sun, Dec 18, 2005 at 04:51:02PM +, Paul Brook wrote:
: Something like the attached patch.
:
: After getting myself, and probably
at all; this should be the
default if no -net options are specified, IIRC.
--
Daniel Jacobowitz
CodeSourcery
___
Qemu-devel mailing list
Qemu-devel@nongnu.org
http://lists.nongnu.org/mailman/listinfo/qemu-devel
, I am calling the emulation as
qemu-system-arm -kernel integratorcp.zImage -initrd arm_root.imfg
-nographic -net user )
-net nic -net user, or no -net option at all. You need a network card
on the VLAN, and also a connection (user) to the outside.
--
Daniel Jacobowitz
CodeSourcery
about 70-80% of
CPU time.
I created the /usr/share/qemu/mips_bios.bin file with dd command.
Why doesn't it start for me?
(A) You have to build a qemu-specific kernel to use the MIPS QEMU.
(B) I have no idea if that method works with MIPS qemu; I only tested
-kernel.
--
Daniel Jacobowitz
to select QEMU as your machine type when you configure the
kernel. Use the linux-mips.org CVS, of course.
(B) I have no idea if that method works with MIPS qemu; I only tested
-kernel.
Hmm?
I didn't quite understand what you mean.
I've never used -cdrom or -boot.
--
Daniel Jacobowitz
?
Did you even look at the same page Paul sent you to? :-) It's active,
CVS works fine, and he's the author.
--
Daniel Jacobowitz
CodeSourcery
___
Qemu-devel mailing list
Qemu-devel@nongnu.org
http://lists.nongnu.org/mailman/listinfo/qemu-devel
env-interrupt_request - see target-arm/helper.c for instance.
--
Daniel Jacobowitz
CodeSourcery
___
Qemu-devel mailing list
Qemu-devel@nongnu.org
http://lists.nongnu.org/mailman/listinfo/qemu-devel
been disabling USB support by a local patch and hoping
someone else fixed this :-)
--
Daniel Jacobowitz
CodeSourcery
___
Qemu-devel mailing list
Qemu-devel@nongnu.org
http://lists.nongnu.org/mailman/listinfo/qemu-devel
On Thu, Mar 23, 2006 at 05:10:07PM +0100, Dirk Behme wrote:
(gdb) s
Cannot find bounds of current function
(gdb) n
Cannot find bounds of current function
Try using si and ni to step a single instruction. But make sure
you can run it before you try to debug it.
--
Daniel Jacobowitz
On Wed, Mar 22, 2006 at 02:45:11PM -0600, Troy Benjegerdes wrote:
On Sat, Mar 11, 2006 at 02:57:03PM -0500, Daniel Jacobowitz wrote:
On Wed, Mar 08, 2006 at 10:55:21AM -0600, Troy Benjegerdes wrote:
The only think I can track down so far is that BITS_PER_LONG is only
defined in /usr
and
usable platform as ARM. But I would be very interested to hear from
anyone who knows better.
Now, I wonder when Qemu will support MIPS emulation? :-)
Good question. How about... last year?
--
Daniel Jacobowitz
CodeSourcery
___
Qemu-devel mailing list
uses different qemu binaries.
--
Daniel Jacobowitz
CodeSourcery
___
Qemu-devel mailing list
Qemu-devel@nongnu.org
http://lists.nongnu.org/mailman/listinfo/qemu-devel
that the operands have the same sign. Again, this case
can't overflow.
I haven't tested the patched qemu, but I did test the expressions
themselves in standalone code, and they definitely do not detect
overflow.
--
Daniel Jacobowitz
CodeSourcery
___
Qemu-devel
On Fri, Apr 28, 2006 at 04:51:39PM +0200, Dirk Behme wrote:
Daniel Jacobowitz wrote:
I haven't tested the patched qemu, but I did test the expressions
themselves in standalone code, and they definitely do not detect
overflow.
Maybe you can test Ralf's alternative proposal
http
is the result. No wonder this
didn't make any sense. I apologize, I'm really batting zero today.
--
Daniel Jacobowitz
CodeSourcery
___
Qemu-devel mailing list
Qemu-devel@nongnu.org
http://lists.nongnu.org/mailman/listinfo/qemu-devel
.
Maybe b *0xbfc00380 works for your case. If it does, your mips-gdb
is somehow strange.
This means that GDB has (mistakenly) decided that the first assembly
instruction in the function is part of a standard function prologue;
feel free to report a GDB bug.
--
Daniel Jacobowitz
CodeSourcery
(and especially any GDB Gui
front end) seems to suggest it's not possible. That would really suck.
Sure you can. It will just work.
--
Daniel Jacobowitz
CodeSourcery
___
Qemu-devel mailing list
Qemu-devel@nongnu.org
http://lists.nongnu.org/mailman
On Thu, Jul 20, 2006 at 11:04:01PM +0200, Fabrice Bellard wrote:
Daniel Jacobowitz wrote:
On Wed, Jul 19, 2006 at 08:43:57AM +, Steve Ellenoff wrote:
#3) Anytime I try to dump the instruction at the current IP such as:
(gdb) x /10i $eip
I get this - which means it's not actually
. Don't increment
casts.
--
Daniel Jacobowitz
CodeSourcery
___
Qemu-devel mailing list
Qemu-devel@nongnu.org
http://lists.nongnu.org/mailman/listinfo/qemu-devel
that it couldn't find a fn for a given ip address.
I can confirm that this patch is correct - I have a bit for bit
identical copy in my working directory (I tend to batch on submitting
things...).
--
Daniel Jacobowitz
CodeSourcery
___
Qemu-devel mailing list
();
+ gen_op_store_T0_gpr_gpr3 ();
+ break;
+ }
+ /* Fall through to RI. */
+#endif
+
#if defined (TARGET_MIPS64)
case 0x18 ... 0x1B:
case 0x27:
--
Daniel Jacobowitz
CodeSourcery
___
Qemu-devel mailing list
Qemu-devel@nongnu.org
http
(CONFIG_SOFTMMU)
if (addr MMAP_AREA_END)
___
Qemu-devel mailing list
Qemu-devel@nongnu.org
http://lists.nongnu.org/mailman/listinfo/qemu-devel
--
Daniel Jacobowitz
CodeSourcery
___
Qemu-devel mailing
, the attached may help
--
Daniel Jacobowitz
CodeSourcery
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.19-rc3
# Sat Nov 4 11:53:04 2006
#
CONFIG_MIPS=y
#
# Machine selection
#
# CONFIG_MIPS_MTX1 is not set
# CONFIG_MIPS_BOSPORUS is not set
# CONFIG_MIPS_PB1000
to cope very well with segmented
memory.
Correct. It doesn't know anything at all about i386 segmentation.
--
Daniel Jacobowitz
CodeSourcery
___
Qemu-devel mailing list
Qemu-devel@nongnu.org
http://lists.nongnu.org/mailman/listinfo/qemu-devel
On Thu, Nov 09, 2006 at 12:57:29AM +0100, Marcel Kilgus wrote:
Daniel Jacobowitz wrote:
Leaving that aside, if I do set the breakpoint correctly at virtual
address (e.g.) 0xC0123456 qemu will (correctly I guess) cause an
exception for code offset 0x123456 (as CS base is 0xC000). GDB
it would lead to any problems at all; and it
would be a localized change in two places in the GDB stub.
--
Daniel Jacobowitz
CodeSourcery
___
Qemu-devel mailing list
Qemu-devel@nongnu.org
http://lists.nongnu.org/mailman/listinfo/qemu-devel
support, so I made the reset vector reload any
specified kernel and initrd. Works in my Debian rootfs; very handy for
automated benchmarking.
--
Daniel Jacobowitz
CodeSourcery
---
hw/mips_r4k.c | 144 +---
target-mips/cpu.h |8
On Sun, Nov 05, 2006 at 10:38:20AM -0500, Daniel Jacobowitz wrote:
On Mon, Mar 06, 2006 at 02:59:29PM +, Thiemo Seufer wrote:
Hello All,
this patch vastly improves TLB performance on MIPS, and probably also
on other architectures. I measured a Linux boot-shutdown cycle,
including
and the virtual address.
Actually that gives me an idea. When a TLB entry with a different ASID gets
evicted we currently flush that page. This should be a no-op because we
already did a full flush when the ASID changed.
Let me see if this makes any difference.
--
Daniel Jacobowitz
CodeSourcery
On Sun, Nov 12, 2006 at 10:07:15AM -0500, Daniel Jacobowitz wrote:
Actually that gives me an idea. When a TLB entry with a different ASID gets
evicted we currently flush that page. This should be a no-op because we
already did a full flush when the ASID changed.
Let me see if this makes
On Sun, Nov 12, 2006 at 11:56:35AM -0500, Daniel Jacobowitz wrote:
---
target-mips/cpu.h |3 ++-
target-mips/exec.h |1 +
target-mips/helper.c|2 +-
target-mips/mips-defs.h |1 +
target-mips/op_helper.c | 43
On Sun, Nov 12, 2006 at 07:02:55PM +0100, Dirk Behme wrote:
Daniel Jacobowitz wrote:
This is with all of the patches I've posted to the
list applied
If patches settle down would be nice to get a list of
patches or a summary patch to be applied in which order
against which basis. Seems
trivial attached
patch.
Is this going to bite other things, i.e. does it need to be
configurable?
--
Daniel Jacobowitz
CodeSourcery
---
slirp/tcp.h |2 +-
slirp/tcp_subr.c |2 ++
2 files changed, 3 insertions(+), 1 deletion(-)
Index: qemu/slirp/tcp.h
On Mon, Nov 13, 2006 at 02:30:27PM -0500, Daniel Jacobowitz wrote:
I was trying to run GDB remote debug tests through a -redir socket
today. It crawled unbelievably. Paul guessed that slirp wasn't using
TCP_NODELAY, and Nagle was to blame.
He was even righter than usual. Adding
with a compressed ext2 filesystem image and with a
compressed cpio archive. What am I doing wrong?
I don't know, but I'll be interested to find out. I tried two
different kernels on Debian amd64, and one of them could load an initrd
but the other mysteriously couldn't.
--
Daniel Jacobowitz
, without having to launch a virtual machine and accessing
then from there.
mount -o loop does this.
How is everybody missing the point? :-) mount -o loop doesn't mount
qcow images.
--
Daniel Jacobowitz
CodeSourcery
___
Qemu-devel mailing list
missing the point? :-) mount -o loop doesn't mount
qcow images.
Would be that difficult to write a qcow fs module ?
Probably not, but I think using nbd for it is much nicer. I think
there would be trouble with partitionable devices, though.
--
Daniel Jacobowitz
CodeSourcery
counter intuitive.
No. Those are I/O device accesses, not memory accesses. Look at the
softmmu code instead.
It may be easiest to add some new instrumentation in the translation
code for whatever target you're interested in.
--
Daniel Jacobowitz
CodeSourcery
On Mon, Nov 13, 2006 at 02:30:27PM -0500, Daniel Jacobowitz wrote:
I was trying to run GDB remote debug tests through a -redir socket
today. It crawled unbelievably. Paul guessed that slirp wasn't using
TCP_NODELAY, and Nagle was to blame.
He was even righter than usual. Adding
line (i.e. the override effectively happens after the +=).
You'd need to leave CFLAGS for the overrideable bits unless you
wanted to override all the += deliberately.
--
Daniel Jacobowitz
CodeSourcery
___
Qemu-devel mailing list
Qemu-devel@nongnu.org
On Sat, Jan 20, 2007 at 05:44:30PM -, priya sridhar wrote:
Is there no other way to run threaded applications using an emulator
for ARM? system level emulation is possible?
That works just fine.
--
Daniel Jacobowitz
CodeSourcery
___
Qemu
ones...
--
Daniel Jacobowitz
CodeSourcery
___
Qemu-devel mailing list
Qemu-devel@nongnu.org
http://lists.nongnu.org/mailman/listinfo/qemu-devel
+= extra;
if (val != 0)
gen_op_addl_T1_im(val);
} else {
--
Daniel Jacobowitz
CodeSourcery
___
Qemu-devel mailing list
Qemu-devel@nongnu.org
http://lists.nongnu.org/mailman/listinfo/qemu-devel
option, and replaces by a
runtime one.
Please comment.
Do you have any idea what performance effect this does (or doesn't)
have?
--
Daniel Jacobowitz
CodeSourcery
___
Qemu-devel mailing list
Qemu-devel@nongnu.org
http://lists.nongnu.org/mailman
it with GCC 4.x and I had to
make a couple of fixes that suggest it's used to older compilers and
binutils... I'll try some older tools next.
--
Daniel Jacobowitz
CodeSourcery
___
Qemu-devel mailing list
Qemu-devel@nongnu.org
http://lists.nongnu.org/mailman
On Fri, Mar 09, 2007 at 10:02:25AM -0500, Daniel Jacobowitz wrote:
Has anyone tried to run OpenBSD/macppc on qemu?
As far as I can tell the latest is that OpenHack'Ware says it doesn't
support compressed ELF. I was going to work on that, but I can't get
a self-compiled OpenHack'Ware BIOS
talked to Fabrice about this he recommended looking at what
other loaders (lilo, grub) do to avoid overwriting the kernel. I've
been meaning to do that for months but never got around to it.
--
Daniel Jacobowitz
CodeSourcery
is the size it
gets uncompressed to.
I don't remember any more than that so I'm sorry if it's total
garbage, which it might be. I did write a patch to stick the initrd
right after the loaded kernel; it didn't work and I convinced myself
that was the reason.
--
Daniel Jacobowitz
CodeSourcery
to do. Or always putting the initrd at
the top of emulated RAM.
--
Daniel Jacobowitz
CodeSourcery
is completely missing. Therefore,
so is the Forth console.
--
Daniel Jacobowitz
CodeSourcery
On Wed, Mar 28, 2007 at 03:00:08PM +0100, Paul Brook wrote:
On Wednesday 28 March 2007 03:21, Daniel Jacobowitz wrote:
On Wed, Mar 28, 2007 at 12:35:18AM +0100, Thiemo Seufer wrote:
Right, a piggyback-style loader would likely fail in that case.
Which is exactly the interesting case
work (it always asked for a kernel image).
I have already experienced a net-install through qemu for i386 target. Is
this
possible with an ARM target?
See Aurelien's walkthrough for this:
http://www.aurel32.net/info/debian_arm_qemu.php
--
Daniel Jacobowitz
CodeSourcery
ELF_MAXPAGESIZE 0x10
BFD and GNU ld think it's 1MB.
--
Daniel Jacobowitz
CodeSourcery
an extra +1
to the translation block size if there's a breakpoint, in
target-mips/translate.c?
--
Daniel Jacobowitz
CodeSourcery
/msg00037.html
Someone might want to try:
http://lists.nongnu.org/archive/html/qemu-devel/2007-04/msg00514.html
--
Daniel Jacobowitz
CodeSourcery
was there already; I only moved
the CONFIG_USER_ONLY case down a couple of lines.
I don't recall why there's user-mode support in this file.
--
Daniel Jacobowitz
CodeSourcery
From: Daniel Jacobowitz d...@codesourcery.com
This patch improves ARM semihosting to the point where qemu-system-arm
can simulate cc1 from GCC. It can't simulate GCC itself, which
requires POSIXy bits like execve, but the backend works, including the
preprocessor.
* Use -kernel and -append
-linux-gnueabi
cc1. In my case that was useful because there was no dynamic memory
allocation. We also rely on semihosting for GCC testing.
--
Daniel Jacobowitz
CodeSourcery
there were some older ARM processors with a different value.
--
Daniel Jacobowitz
CodeSourcery
From: Daniel Jacobowitz d...@codesourcery.com
With enough parallelism, make will run all the dependencies of
build-all at the same time:
build-all: config-host.h config-all-devices.h $(DOCS) $(TOOLS)
So some of the $(TOOLS) will build before config-host.h is finished.
The object files need
preference which
is applied, although I'm always in favor of eliminating unnecessary
recursive invocations.
--
Daniel Jacobowitz
CodeSourcery
On Fri, Apr 20, 2007 at 02:22:09PM -0400, Daniel Jacobowitz wrote:
I have an idea. When I was talking to Paul about breakpoints
recently, I noticed something very strange in the ARM port: it
continues to disassemble the instruction under a breakpoint after
generating the debug op
...
--
Daniel Jacobowitz
CodeSourcery
to arbitrarily apply across all virtual
address spaces.
I think they already do. Specific example, please.
--
Daniel Jacobowitz
CodeSourcery
signed zero. Why?
The MIPS ISA docs say a rounded result is returned in this case, and
that's what's in FST2 if that code is removed.
This shows up in the mul-subnormal-single-1.c test from GCC's ieee.exp.
--
Daniel Jacobowitz
CodeSourcery
NaN if the input was a quiet NaN so exp10(NaN) no longer raises
Invalid.
--
Daniel Jacobowitz
CodeSourcery
--- fpu/softfloat-specialize.h (revision 182529)
+++ fpu/softfloat-specialize.h (local)
@@ -120,9 +120,7 @@ static commonNaNT float32ToCommonNaN( fl
static float32 commonNaNToFloat32
On Thu, Sep 20, 2007 at 06:28:25PM +0100, Thiemo Seufer wrote:
It fixed an internal testcase, I'll have to check what was going
on there, probably tomorrow.
I don't suppose you've had a chance to look at this?
--
Daniel Jacobowitz
CodeSourcery
kernel/user mode not address
space.
2.) the MMUSUFFIX macro (mmu / cmmu) what does this stand for??
cmmu is used to read code to execute, IIRC (different permissions).
--
Daniel Jacobowitz
CodeSourcery
completely on the current processor
mode. It has nothing to do with the address.
--
Daniel Jacobowitz
CodeSourcery
the entry in
alarm_timers structure. Since then, I can notice that the emulated
... and I think you're talking about a qemu option with the same name.
--
Daniel Jacobowitz
CodeSourcery
here:
http://gcc.gnu.org/ml/gcc-patches/2002-02/msg01874.html
--
Daniel Jacobowitz
CodeSourcery
On Thu, Oct 18, 2007 at 06:57:19AM -0700, Boy Dfx wrote:
From what I can see instructions are loaded from memory without a
clock cycle penalty, but I wanted to be sure.
Yes. Qemu is absolutely useless for performance questions about
real hardware; it does not model any cycles.
--
Daniel
going wrong with this register and what should be
its value.
Are you running recent Alpha binaries? I believe the unique register
is used for the thread-local storage base address.
--
Daniel Jacobowitz
CodeSourcery
on the kernel maintainers' part either.
I don't see the PVR read in current glibc, but I thought it was there;
I don't remember exactly what happened.
--
Daniel Jacobowitz
CodeSourcery
is set. If we're confident that the common NaN format will
already have some bit other than the qnan/snan bit set, this is fine;
otherwise, we might want to forcibly set some other mantissa bit.
--
Daniel Jacobowitz
CodeSourcery
on
the implementation.
If folks don't like the target conditionals there, I recommend we just
set some low bit to be sure it's a NaN and move on. The softfloat
implementation is not all that close to matching any one hardware FPU.
--
Daniel Jacobowitz
CodeSourcery
gen_op_b_T1();
if (ctx-singlestep_enabled)
gen_op_debug()
}
It seems to me that the second if (ctx-singlestep_enabled) is
rendundant.
No, if you've gone to a different page without single step then you
don't need the debug trap.
--
Daniel Jacobowitz
CodeSourcery
On Wed, Feb 13, 2008 at 04:52:22PM +0100, Marius Groeger wrote:
On Wed, 13 Feb 2008, Daniel Jacobowitz wrote:
On Wed, Feb 13, 2008 at 09:46:44AM +0100, Marius Groeger wrote:
if ((tb-pc TARGET_PAGE_MASK) == (dest TARGET_PAGE_MASK)
!ctx-singlestep_enabled) {
No, if you've
On Fri, Sep 30, 2011 at 10:36 AM, Richard Henderson r...@twiddle.net wrote:
On 09/30/2011 12:12 AM, Jan Kiszka wrote:
Breakpoint 1, __ldb_mmu (addr=1001716, mmu_idx=0)
at /home/rth/work/qemu/qemu/softmmu_template.h:86
86 {
(gdb) where
#0 __ldb_mmu (addr=1001716, mmu_idx=0)
at
82 matches
Mail list logo
