From: David
Emulate AMD IOMMU on PIIX and Q35 controlled by a command line
switch
Signed-off-by: David Kiarie
---
hw/pci-host/piix.c | 10 ++
hw/pci-host/q35.c | 10 ++
2 files changed, 20 insertions(+)
diff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c
index 1fb71c8
From: David
Add AMD IOMMU IVRS table to ACPI tables
Signed-off-by: David Kiarie
---
hw/i386/acpi-build.c| 85 +
include/hw/acpi/acpi-defs.h | 55 +
2 files changed, 140 insertions(+)
diff --git a/hw/i386/acpi
From: David
Add iommu to machine properties in preparation of introducing
AMD IOMMU
Signed-off-by: David Kiarie
---
hw/core/machine.c | 25 +
include/hw/boards.h | 2 ++
2 files changed, 27 insertions(+)
diff --git a/hw/core/machine.c b/hw/core/machine.c
index
From: David
Introduce basic AMD IOMMU emulation in Qemu. IOMMU implements event logging and
host translation which should allow nested PCI passthrough.It also implemented
a very basic IOTLB implementation
Signed-off-by: David Kiarie
---
hw/i386/Makefile.objs |1 +
hw/i386/amd_iommu.c
David (4):
hw/core: Add iommu to machine properties
hw/pci-host: Add AMD IOMMU to PIIX and Q35 pcs
hw/i386: Introduce AMD IOMMU
hw/acpi: ACPI table for AMD IOMMU
hw/core/machine.c | 25 +
hw/i386/Makefile.objs |1 +
hw/i386/acpi-build.c| 85 +++
hw/i386/amd
On Fri, Oct 9, 2015 at 10:17 AM, Valentine Sinitsyn
wrote:
> Hi David,
>
> Thanks for your efforts.
>
>
> On 09.10.2015 07:53, David Kiarie wrote:
>>
>> David (4):
>>hw/core: Add iommu to machine properties
>>hw/pci-host: Add AMD IOMMU to PII
On Fri, Oct 9, 2015 at 3:24 PM, Valentine Sinitsyn
wrote:
> On 09.10.2015 17:22, David kiarie wrote:
>>
>> On Fri, Oct 9, 2015 at 10:17 AM, Valentine Sinitsyn
>> wrote:
>>>
>>> Hi David,
>>>
>>> Thanks for your efforts.
>>>
>&g
On Thu, Oct 8, 2015 at 9:24 PM, Marcel Apfelbaum
wrote:
> On 10/09/2015 05:53 AM, David Kiarie wrote:
>>
>> From: David
>>
>> Introduce basic AMD IOMMU emulation in Qemu. IOMMU implements event
>> logging and
>> host translation which should allow nested
On Thu, Oct 8, 2015 at 9:10 PM, Marcel Apfelbaum
wrote:
> On 10/09/2015 05:53 AM, David Kiarie wrote:
>>
>> From: David
>>
>> Add iommu to machine properties in preparation of introducing
>> AMD IOMMU
>>
>> Signed-off-by: David
On Thu, Feb 4, 2016 at 6:03 PM, Michael S. Tsirkin wrote:
> On Mon, Jan 18, 2016 at 06:25:42PM +0300, David Kiarie wrote:
>> Add AMD IO MMU emulation to Qemu in addition to Intel IO MMU.
>> The IO MMU does basic translation, error checking and has a
>> minimal IOTLB impleme
On Sun, Feb 14, 2016 at 4:02 PM, Marcel Apfelbaum
wrote:
> On 01/18/2016 05:25 PM, David Kiarie wrote:
>>
>> Support AMD IO MMU emulation in q35 and piix chipsets
>>
>> Signed-off-by: David Kiarie
>> ---
>> hw/pci-host/piix.c | 11 +++
>>
On Sun, Feb 14, 2016 at 4:07 PM, Michael S. Tsirkin wrote:
> On Sun, Feb 14, 2016 at 02:54:36PM +0200, Marcel Apfelbaum wrote:
>> On 01/18/2016 05:25 PM, David Kiarie wrote:
>> >Add IVRS table for AMD IO MMU.
>> >
>> >Signed-off-by: David Kiarie
>> &
On Thu, Feb 4, 2016 at 6:03 PM, Michael S. Tsirkin wrote:
> On Mon, Jan 18, 2016 at 06:25:42PM +0300, David Kiarie wrote:
>> Add AMD IO MMU emulation to Qemu in addition to Intel IO MMU.
>> The IO MMU does basic translation, error checking and has a
>> minimal IOTLB impleme
On Mon, Feb 15, 2016 at 6:41 AM, David kiarie wrote:
> On Thu, Feb 4, 2016 at 6:03 PM, Michael S. Tsirkin wrote:
>> On Mon, Jan 18, 2016 at 06:25:42PM +0300, David Kiarie wrote:
>>> Add AMD IO MMU emulation to Qemu in addition to Intel IO MMU.
>>> The IO MMU do
Add IO MMU as a string to machine properties which
is used to control whether and they type of IO MMU
to emulate
Signed-off-by: David Kiarie
---
hw/core/machine.c | 28
include/hw/boards.h | 3 ++-
qemu-options.hx | 6 +++---
util/qemu-config.c | 4 ++--
4
I could
quickly send a clean patch.
Thanks!
David Kiarie (4):
hw/i386: Introduce AMD IO MMU
hw/core: Add AMD IO MMU to machine properties
hw/i386: ACPI table for AMD IO MMU
hw/pci-host: Emulate AMD IO MMU
hw/core/machine.c | 28 +-
hw/i386/Makefile.objs |1
Add AMD IO MMU emulation to Qemu in addition to Intel IO MMU.
The IO MMU does basic translation, error checking and has a
minimal IOTLB implementation.
Signed-off-by: David Kiarie
---
hw/i386/Makefile.objs |1 +
hw/i386/amd_iommu.c | 1430
Add AMD IO MMU emulation support to q35 chipset
Signed-off-by: David Kiarie
---
hw/pci-host/piix.c| 1 +
hw/pci-host/q35.c | 14 --
include/hw/i386/intel_iommu.h | 1 +
3 files changed, 14 insertions(+), 2 deletions(-)
diff --git a/hw/pci-host/piix.c b/hw
Add IVRS table for AMD IO MMU. Also reverve MMIO
region for IO MMU via ACPI
Signed-off-by: David Kiarie
---
hw/i386/acpi-build.c| 98 -
include/hw/acpi/acpi-defs.h | 55 +
2 files changed, 142 insertions(+), 11
David Kiarie (4):
hw/core: Add AMD IO MMU to machine properties
hw/i386: ACPI table for AMD IO MMU
hw/pci-host: Emulate AMD IO MMU
hw/core/machine.c | 17 +-
hw/i386/Makefile.objs |1 +
hw/i386/acpi-build.c| 96 +++
hw/i386/amd_iommu.c | 1420
Add IVRS table for AMD IO MMU. Also reverve MMIO
region for IO MMU via ACPI
Signed-off-by: David Kiarie
---
hw/i386/acpi-build.c| 96 +
include/hw/acpi/acpi-defs.h | 55 ++
2 files changed, 151 insertions(+)
diff --git
Add IO MMU as a string to machine properties which
is used to control whether and they type of IO MMU
to emulate
Signed-off-by: David Kiarie
---
hw/core/machine.c | 17 +
include/hw/boards.h | 3 ++-
qemu-options.hx | 6 +++---
util/qemu-config.c | 4 ++--
4 files
Support AMD IO MMU emulation in q35 and piix chipsets
Signed-off-by: David Kiarie
---
hw/pci-host/piix.c | 11 +++
hw/pci-host/q35.c | 16 ++--
2 files changed, 25 insertions(+), 2 deletions(-)
diff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c
index 924f0fa..19e2930
From: David
Add AMD IO MMU emulation to Qemu in addition to Intel IO MMU.
The IO MMU does basic translation, error checking and has a
minimal IOTLB implementation.
Signed-off-by: David Kiarie
---
hw/i386/Makefile.objs |1 +
hw/i386/amd_iommu.c | 1420
On Thu, Jan 14, 2016 at 1:09 PM, Michael S. Tsirkin wrote:
> On Thu, Jan 14, 2016 at 11:04:27AM +0300, David Kiarie wrote:
>> Add IVRS table for AMD IO MMU. Also reverve MMIO
>
> reserve?
Yeah, typo.
>
>> region for IO MMU via ACPI
>
>
> It does not look like yo
On Thu, Jan 14, 2016 at 1:09 PM, Michael S. Tsirkin wrote:
> On Thu, Jan 14, 2016 at 11:04:27AM +0300, David Kiarie wrote:
>> Add IVRS table for AMD IO MMU. Also reverve MMIO
>
> reserve?
>
>> region for IO MMU via ACPI
>
>
> It does not look like you reserv
On Thu, Jan 14, 2016 at 6:42 PM, Jan Kiszka wrote:
> On 2016-01-14 16:39, Michael S. Tsirkin wrote:
>> On Thu, Jan 14, 2016 at 03:15:38PM +0300, David kiarie wrote:
>>> On Thu, Jan 14, 2016 at 1:09 PM, Michael S. Tsirkin wrote:
>>>> On Thu, Jan 14, 2016 at 11:04:
On Thu, Jan 14, 2016 at 7:19 PM, Jan Kiszka wrote:
> On 2016-01-14 17:09, David kiarie wrote:
>> On Thu, Jan 14, 2016 at 6:42 PM, Jan Kiszka wrote:
>>> On 2016-01-14 16:39, Michael S. Tsirkin wrote:
>>>> On Thu, Jan 14, 2016 at 03:15:38PM +0300, David kiarie wrote:
2016 9:29 PM, "Kevin O'Connor" wrote:
>>
>> On Thu, Jan 14, 2016 at 12:09:46PM +0200, Michael S. Tsirkin wrote:
>> > On Thu, Jan 14, 2016 at 11:04:27AM +0300, David Kiarie wrote:
>> > > Add IVRS table for AMD IO MMU. Also reverve MMIO
>> &g
David Kiarie (4):
hw/i386: Introduce AMD IO MMU
hw/core: Add AMD IO MMU to machine properties
hw/i386: ACPI table for AMD IO MMU
hw/pci-host: Emulate AMD IO MMU
hw/core/machine.c | 17 +-
hw/i386/Makefile.objs |1 +
hw/i386/acpi-build.c | 70 ++
hw
Add IO MMU as a string to machine properties which
is used to control whether and the type of IO MMU
to emulate
Signed-off-by: David Kiarie
---
hw/core/machine.c | 17 +
include/hw/boards.h | 3 ++-
include/hw/i386/intel_iommu.h | 1 +
qemu-options.hx
Add IVRS table for AMD IO MMU.
Signed-off-by: David Kiarie
---
hw/i386/acpi-build.c| 70 +
include/hw/acpi/acpi-defs.h | 55 +++
2 files changed, 125 insertions(+)
diff --git a/hw/i386/acpi-build.c b/hw/i386
Add AMD IO MMU emulation to Qemu in addition to Intel IO MMU.
The IO MMU does basic translation, error checking and has a
minimal IOTLB implementation.
Signed-off-by: David Kiarie
---
hw/i386/Makefile.objs |1 +
hw/i386/amd_iommu.c | 1409
Support AMD IO MMU emulation in q35 and piix chipsets
Signed-off-by: David Kiarie
---
hw/pci-host/piix.c | 11 +++
hw/pci-host/q35.c | 14 --
2 files changed, 23 insertions(+), 2 deletions(-)
diff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c
index b0d7e31..3ba245d
On 1/17/2016 4:57 PM, Marcel Apfelbaum wrote:
On 01/14/2016 10:04 AM, David Kiarie wrote:
Support AMD IO MMU emulation in q35 and piix chipsets
Signed-off-by: David Kiarie
---
hw/pci-host/piix.c | 11 +++
hw/pci-host/q35.c | 16 ++--
2 files changed, 25 insertions
On 1/18/2016 7:21 PM, Marcel Apfelbaum wrote:
On 01/18/2016 05:25 PM, David Kiarie wrote:
Add IO MMU as a string to machine properties which
is used to control whether and the type of IO MMU
to emulate
Signed-off-by: David Kiarie
---
hw/core/machine.c | 17
On 1/18/2016 8:27 PM, Marcel Apfelbaum wrote:
On 01/18/2016 06:48 PM, David Kiarie wrote:
On 1/18/2016 7:21 PM, Marcel Apfelbaum wrote:
On 01/18/2016 05:25 PM, David Kiarie wrote:
Add IO MMU as a string to machine properties which
is used to control whether and the type of IO MMU
to
Hello there,
Repost, AMD IOMMU patches version 6.
Changes since version 5
-Fixed macro formating issues
-changed occurences of IO MMU to IOMMU for consistency
-Fixed capability registers duplication
-Rebased to current master
David Kiarie (4):
hw/i386: Introduce AMD IOMMU
hw/core: Add
Add IOMMU as a string to machine properties which is
used to control whether and the type of IOMMU to emulate
Signed-off-by: David Kiarie
---
hw/core/machine.c | 28
include/hw/boards.h | 3 ++-
qemu-options.hx | 6 +++---
util/qemu-config.c | 4 ++--
4
Add IVRS table for AMD IOMMU. Generate IVRS or DMAR
depending on emulated IOMMU
Signed-off-by: David Kiarie
---
hw/i386/acpi-build.c| 208 +---
include/hw/acpi/acpi-defs.h | 55
2 files changed, 252 insertions(+), 11 deletions
Add AMD IOMMU emulaton to Qemu in addition to Intel IOMMU
The IOMMU does basic translation, error checking and has a
mininal IOTLB implementation
Signed-off-by: David Kiarie
---
hw/i386/Makefile.objs |1 +
hw/i386/amd_iommu.c | 1432 +
hw
Add AMD IOMMU emulation support to q35 chipset
Signed-off-by: David Kiarie
---
hw/pci-host/piix.c| 1 +
hw/pci-host/q35.c | 14 --
include/hw/i386/intel_iommu.h | 1 +
3 files changed, 14 insertions(+), 2 deletions(-)
diff --git a/hw/pci-host/piix.c b/hw
On Sun, Feb 21, 2016 at 9:20 PM, Jan Kiszka wrote:
> On 2016-02-21 19:10, David Kiarie wrote:
>> Add IVRS table for AMD IOMMU. Generate IVRS or DMAR
>> depending on emulated IOMMU
>>
>> Signed-off-by: David Kiarie
>> ---
>
Add IVRS table for AMD IOMMU. Generate IVRS or DMAR
depending on emulated IOMMU
Signed-off-by: David Kiarie
---
hw/i386/acpi-build.c| 98 -
include/hw/acpi/acpi-defs.h | 55 +
2 files changed, 142 insertions(+), 11
On Sun, Feb 21, 2016 at 11:20 PM, Jan Kiszka wrote:
> On 2016-02-21 19:10, David Kiarie wrote:
>> Hello there,
>>
>> Repost, AMD IOMMU patches version 6.
>>
>> Changes since version 5
>> -Fixed macro formating issues
>> -changed occurences
On Mon, Feb 22, 2016 at 10:29 AM, Jan Kiszka wrote:
> On 2016-02-22 06:57, David Kiarie wrote:
>> On Sun, Feb 21, 2016 at 11:20 PM, Jan Kiszka wrote:
>>> On 2016-02-21 19:10, David Kiarie wrote:
>>>> Hello there,
>>>>
>>>> Repost, AMD IOMM
On Thu, Feb 25, 2016 at 6:43 PM, Marcel Apfelbaum wrote:
> On 02/21/2016 08:10 PM, David Kiarie wrote:
>>
>> Add AMD IOMMU emulaton to Qemu in addition to Intel IOMMU
>> The IOMMU does basic translation, error checking and has a
>> mininal IOTLB implementation
>
Hi all,
Some efforts to emulate AMD IOMMU have being going over the past few months.
In real hardware AMD IOMMU is implemented as a PCI function. When
emulating it in Qemu we want to allocate it MMIO space but real AMD
IOMMU manage to reserve memory without making a BAR request, probably
through
On Wed, Sep 9, 2015 at 12:35 AM, Jan Kiszka wrote:
> [thanks for forwarding, Peter]
>
> Hi Rita,
>
> On 2015-09-08 10:11, Peter Maydell wrote:
>> On 7 September 2015 at 22:31, Rita Sinha wrote:
>>> Hi Jan,
>>>
>>> I am interested in participating in next round of Outreachy program
>>> with AMD IO
On Wed, Sep 9, 2015 at 8:01 AM, Rita Sinha wrote:
> Hi David,
>
> Please find my response inline.
>
>
>>
>> Hi all,
>>
>> Most recent work is here
>> http://lists.nongnu.org/archive/html/qemu-devel/2015-08/msg02759.html
>> . Most the code is Qemu device boilerplate(so there are a ton of
>> things
On Wed, Sep 9, 2015 at 9:47 AM, Valentine Sinitsyn
wrote:
> Hi all,
>
>
> On 09.09.2015 09:23, David kiarie wrote:
>>
>> On Wed, Sep 9, 2015 at 12:35 AM, Jan Kiszka wrote:
>>>
>>> [thanks for forwarding, Peter]
>>>
>>> Hi Rita,
>
> On 25.08.2015 04:19, David Kiarie wrote:
>>
>> From: David
>>
>> Add AMD IOMMU emulation to Qemu. This is a very basic AMD IOMMU
>> emulation that only does translation and some basic Event logging.
>> Guest translation enables nested PCI passthrough
>>
On Wed, Sep 9, 2015 at 10:45 AM, Valentine Sinitsyn
wrote:
> On 09.09.2015 12:30, David kiarie wrote:
> ...snip...
>
>
>>>> +static void amd_iommu_cmdbuf_exec(AMDIOMMUState *s)
>>>> +{
>>>> +unsigned type;
>>>> +uint8_t cmd
I wrote something basic on the cover letter
http://lists.nongnu.org/archive/html/qemu-devel/2015-08/msg02759.html
On Wed, Sep 9, 2015 at 11:07 AM, Valentine Sinitsyn
wrote:
> On 09.09.2015 12:59, David kiarie wrote:
>>
>> On Wed, Sep 9, 2015 at 10:45 AM, Valentine Sinitsyn
>&g
On Wed, Sep 9, 2015 at 11:14 AM, Valentine Sinitsyn
wrote:
> Oops, that was a long ago. Sorry & thanks.
No problem.
Will fix all other comments.
>
> Valentine
>
>
> On 09.09.2015 13:12, David kiarie wrote:
>>
>> I wrote something basic on the cover letter
>&
From: David
Add AMD IOMMU as one of the devices that can possibly be
emulated by Qemu. Also, add some helper functions for
manipulating presence/absence of IOMMU
Signed-off-by: David Kiarie
---
hw/core/machine.c | 25 +
include/hw/boards.h | 2 ++
2 files changed
This series implements basic AMD IOMMU emulation to Qemu
AMD IOMMU emulation.
-This series emulates AMD IOMMU on qemu. It implements the following features
-Translation - 4K pages
-Event logging - particulary fault logging.
-AMD IOMMU, being a convectional PCI device doesn't rel
From: David
Add AMD IOMMU emulation to Qemu. This is a very basic AMD IOMMU
emulation that only does translation and some basic Event logging.
Guest translation enables nested PCI passthrough
Signed-off-by: David Kiarie
---
hw/i386/Makefile.objs | 1 +
hw/i386/amd_iommu.c | 993
From: David
Add AMD IOMMU emulation to q35 and PIIX chipsets.
Signed-off-by: David Kiarie
---
hw/pci-host/piix.c | 11 +++
hw/pci-host/q35.c | 11 +++
2 files changed, 22 insertions(+)
diff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c
index 1cb25f3..348cff0 100644
--- a
From: David
Add IVRS table for AMD IOMMU. Table indicates that all devices will be
translated by the IOMMU, features common to all IOMMUs and IVDB for the
IOMMU to be emulated
Signed-off-by: David Kiarie
---
hw/i386/acpi-build.c| 85
On Tue, Aug 25, 2015 at 9:39 AM, Valentine Sinitsyn
wrote:
> Hi,
>
>
> On 25.08.2015 04:19, David Kiarie wrote:
>>
>> From: David
>>
>> Add AMD IOMMU emulation to Qemu. This is a very basic AMD IOMMU
>> emulation that only does translation and some
On Tue, Aug 25, 2015 at 10:31 AM, Valentine Sinitsyn
wrote:
>
>
> On 25.08.2015 12:25, David kiarie wrote:
>>
>> On Tue, Aug 25, 2015 at 9:39 AM, Valentine Sinitsyn
>> wrote:
>>>
>>> Hi,
>>>
>>>
>>> On 25.08.2015 04:19,
Also, am not sure what HATS, GATS and sizes of virtual addresses(for
both guest and host) I should be using.
On Tue, Aug 25, 2015 at 10:41 AM, David kiarie wrote:
> On Tue, Aug 25, 2015 at 10:31 AM, Valentine Sinitsyn
> wrote:
>>
>>
>> On 25.08.2015 12:25, David kiar
On Fri, Feb 26, 2016 at 9:23 AM, David Kiarie wrote:
> On Thu, Feb 25, 2016 at 6:43 PM, Marcel Apfelbaum wrote:
>> On 02/21/2016 08:10 PM, David Kiarie wrote:
>>>
>>> Add AMD IOMMU emulaton to Qemu in addition to Intel IOMMU
>>> The IOMMU does basic t
On Wed, Mar 2, 2016 at 7:00 AM, David Kiarie wrote:
> On Fri, Feb 26, 2016 at 9:23 AM, David Kiarie wrote:
>> On Thu, Feb 25, 2016 at 6:43 PM, Marcel Apfelbaum wrote:
>>> On 02/21/2016 08:10 PM, David Kiarie wrote:
>>>>
>>>> Add AMD IOMMU emulaton t
On 25/02/16 18:43, Marcel Apfelbaum wrote:
On 02/21/2016 08:10 PM, David Kiarie wrote:
Add AMD IOMMU emulaton to Qemu in addition to Intel IOMMU
The IOMMU does basic translation, error checking and has a
mininal IOTLB implementation
Hi,
Signed-off-by: David Kiarie
---
hw/i386
On 21/02/16 23:09, Jan Kiszka wrote:
On 2016-02-21 19:10, David Kiarie wrote:
diff --git a/qemu-options.hx b/qemu-options.hx
index 2f0465e..dad160f 100644
--- a/qemu-options.hx
+++ b/qemu-options.hx
@@ -38,7 +38,7 @@ DEF("machine", HAS_ARG, QEMU_OPTI
On 01/03/16 16:48, Jan Kiszka wrote:
On 2016-03-01 14:07, Michael S. Tsirkin wrote:
On Sun, Feb 21, 2016 at 09:10:56PM +0300, David Kiarie wrote:
Hello there,
Repost, AMD IOMMU patches version 6.
Changes since version 5
-Fixed macro formating issues
-changed occurences of IO MMU to
On Thu, Mar 3, 2016 at 12:17 AM, Michael S. Tsirkin wrote:
> On Thu, Mar 03, 2016 at 12:09:28AM +0300, David Kiarie wrote:
>>
>>
>> On 22/02/16 14:22, Marcel Apfelbaum wrote:
>> >On 02/21/2016 08:11 PM, David Kiarie wrote:
>> >>Add AMD IOMMU emulation su
On Thu, Mar 3, 2016 at 12:49 PM, Michael S. Tsirkin wrote:
> On Thu, Mar 03, 2016 at 01:04:31AM +0300, David Kiarie wrote:
>> On Thu, Mar 3, 2016 at 12:17 AM, Michael S. Tsirkin wrote:
>> > On Thu, Mar 03, 2016 at 12:09:28AM +0300, David Kiarie wrote:
>> >>
>>
On Thu, Mar 3, 2016 at 3:06 PM, Marcel Apfelbaum wrote:
> On 03/03/2016 02:02 PM, Marcel Apfelbaum wrote:
>>
>> On 03/03/2016 01:47 PM, David Kiarie wrote:
>>>
>>> On Thu, Mar 3, 2016 at 12:49 PM, Michael S. Tsirkin
>>> wrote:
>>>>
>&
On Thu, Mar 3, 2016 at 12:49 PM, Michael S. Tsirkin wrote:
> On Thu, Mar 03, 2016 at 01:04:31AM +0300, David Kiarie wrote:
>> On Thu, Mar 3, 2016 at 12:17 AM, Michael S. Tsirkin wrote:
>> > On Thu, Mar 03, 2016 at 12:09:28AM +0300, David Kiarie wrote:
>> >>
>>
On Fri, Mar 11, 2016 at 4:22 PM, Michael S. Tsirkin wrote:
> On Sun, Feb 21, 2016 at 09:11:00PM +0300, David Kiarie wrote:
>> Add AMD IOMMU emulation support to q35 chipset
>>
>> Signed-off-by: David Kiarie
>> ---
>> hw/pci-host/piix.c| 1 +
>&
they would only want to co-mentor as they may not have
much time. They were listed there mainly for purposes of listing the project.
I'd like to know if anyone is willing to mentor this project mainly the people
involved in the review process or anyone else!
David Kiarie (4):
hw/i386: Intro
Add IOMMU as a string to machine properties which is
used to control whether and the type of IOMMU to emulate
Signed-off-by: David Kiarie
---
hw/core/machine.c | 27 ---
include/hw/boards.h | 1 +
qemu-options.hx | 7 +--
util/qemu-config.c | 4 ++--
4
Add AMD IOMMU emulation support to q35 chipset
Signed-off-by: David Kiarie
---
hw/pci-host/q35.c | 21 +++--
include/hw/i386/intel_iommu.h | 1 +
2 files changed, 20 insertions(+), 2 deletions(-)
diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c
index 115fb8c
Add IVRS table for AMD IOMMU. Generate IVRS or DMAR
depending on emulated IOMMU
Signed-off-by: David Kiarie
---
hw/i386/acpi-build.c | 98 ++-
include/hw/acpi/acpi-defs.h | 55
include/hw/i386/intel_iommu.h | 1 +
3
Add AMD IOMMU emulaton to Qemu in addition to Intel IOMMU
The IOMMU does basic translation, error checking and has a
mininal IOTLB implementation
Signed-off-by: David Kiarie
---
hw/i386/Makefile.objs |1 +
hw/i386/amd_iommu.c | 1431 +
hw
On Mon, Mar 14, 2016 at 11:40 AM, Marcel Apfelbaum wrote:
> On 03/14/2016 02:24 AM, David Kiarie wrote:
>>
>> Add IOMMU as a string to machine properties which is
>> used to control whether and the type of IOMMU to emulate
>>
>> Signed-off-by: David Kiarie
>
Hello all,
Long time no see, at usual ;)
AMD IOMMU patches fixing a few issues mentioned in previous version, formatting
errors and commit messages
David Kiarie (4):
hw/i386: Introduce AMD IOMMU
hw/i386: ACPI table for AMD IOMMU
hw/core: Add AMD IOMMU to machine properties
hw/pci-host
Add AMD IOMMU emulation support to q35 chipset
Signed-off-by: David Kiarie
---
hw/pci-host/q35.c | 21 +++--
include/hw/i386/intel_iommu.h | 1 +
2 files changed, 20 insertions(+), 2 deletions(-)
diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c
index 70f897e
Add IVRS table for AMD IOMMU. Generate IVRS or DMAR
depending on emulated IOMMU
Signed-off-by: David Kiarie
---
hw/i386/acpi-build.c | 98 ++-
include/hw/acpi/acpi-defs.h | 55
include/hw/i386/intel_iommu.h | 1 +
3
Add AMD IOMMU emulaton to Qemu in addition to Intel IOMMU
The IOMMU does basic translation, error checking and has a
minimal IOTLB implementation
Signed-off-by: David Kiarie
---
hw/i386/Makefile.objs |1 +
hw/i386/amd_iommu.c | 1426 +
hw
Added a bool, subject to review to machine properties which
it used to override iommu emulated from Intel to AMD.
Signed-off-by: David Kiarie
---
hw/core/machine.c | 32 +---
include/hw/boards.h | 1 +
qemu-options.hx | 7 +--
util/qemu-config.c | 8
Hi all,
The current AMD IOMMU patches that fixes Igor's comments. I got rid of structs
and instead
added individual integer fields into the table data directly, as suggested.
I have also got rid of some un-used macros and fixed a few other miscellaneous
things.
David Kiarie (4):
hw
Added a bool, subject to review to machine properties which
it used to override iommu emulated from Intel to AMD.
Signed-off-by: David Kiarie
---
hw/core/machine.c | 32 +---
include/hw/boards.h | 1 +
include/hw/i386/intel_iommu.h | 1 +
qemu
Add IVRS table for AMD IOMMU. Generate IVRS or DMAR
depending on emulated IOMMU
Signed-off-by: David Kiarie
---
hw/acpi/aml-build.c | 2 +-
hw/acpi/core.c | 13 --
hw/i386/acpi-build.c| 101 +++-
include/hw/acpi/acpi
Add AMD IOMMU emulaton to Qemu in addition to Intel IOMMU
The IOMMU does basic translation, error checking and has a
minimal IOTLB implementation
Signed-off-by: David Kiarie
---
hw/i386/Makefile.objs |1 +
hw/i386/amd_iommu.c | 1426 +
hw
Add AMD IOMMU emulation support to q35 chipset
Signed-off-by: David Kiarie
---
hw/pci-host/q35.c | 21 +++--
include/hw/i386/intel_iommu.h | 2 +-
2 files changed, 20 insertions(+), 3 deletions(-)
diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c
index 70f897e
Sorry, I keep missing Jan's email...
On Mon, Apr 25, 2016 at 1:12 AM, David Kiarie wrote:
> Hi all,
>
> The current AMD IOMMU patches that fixes Igor's comments. I got rid of
> structs and instead
> added individual integer fields into the table data directly, as sugge
On Thu, Apr 28, 2016 at 11:49 AM, Peter Xu wrote:
> On Thu, Apr 28, 2016 at 10:36:19AM +0200, Jan Kiszka wrote:
>> On 2016-04-28 10:29, Peter Xu wrote:
>> > On Thu, Apr 28, 2016 at 09:26:01AM +0200, Jan Kiszka wrote:
>> >> On 2016-04-28 09:05, Peter Xu wrote:
>> >>> This patch introduces Intel VT-
On Fri, Apr 29, 2016 at 9:09 AM, Jan Kiszka wrote:
> On 2016-04-25 00:12, David Kiarie wrote:
>> Add IVRS table for AMD IOMMU. Generate IVRS or DMAR
>> depending on emulated IOMMU
>
> It seems you lack scope descriptions for the PCI devices in the system.
> At least, th
These series adds AMD IOMMU support to Qemu. It's currently in the 9th version.
In this series I have (hopefully) addressed all the comments made in the
previous version.
I have also tested and successfully passed-through PCI device 'ac97' with more
devices to be tested.
Add AMD IOMMU emulaton to Qemu in addition to Intel IOMMU
The IOMMU does basic translation, error checking and has a
minimal IOTLB implementation
Signed-off-by: David Kiarie
---
hw/i386/Makefile.objs |1 +
hw/i386/amd_iommu.c | 1426 +
hw
Added an enum, subject to review, to machine properties which
it used to override iommu emulated from Intel to AMD.
Signed-off-by: David Kiarie
---
hw/core/machine.c | 33 ++---
include/hw/boards.h | 1 +
include/hw/i386/intel_iommu.h | 1
Add IVRS table for AMD IOMMU. Generate IVRS or DMAR
depending on emulated IOMMU
Signed-off-by: David Kiarie
---
hw/acpi/aml-build.c | 2 +-
hw/acpi/core.c | 13 ---
hw/i386/acpi-build.c| 93 +++--
include/hw/acpi/acpi
On Sun, May 1, 2016 at 4:45 PM, Michael S. Tsirkin wrote:
> On Sat, Apr 30, 2016 at 01:42:41AM +0300, David Kiarie wrote:
>> Add IVRS table for AMD IOMMU. Generate IVRS or DMAR
>> depending on emulated IOMMU
>>
>> Signed-off-by: David Kiarie
>> ---
>> hw/
On Sun, May 1, 2016 at 5:00 PM, Michael S. Tsirkin wrote:
> On Sun, May 01, 2016 at 04:47:44PM +0300, Michael S. Tsirkin wrote:
>> On Sat, Apr 30, 2016 at 01:42:39AM +0300, David Kiarie wrote:
>> > These series adds AMD IOMMU support to Qemu. It's currently in the 9th
>
On Sun, May 1, 2016 at 5:14 PM, Michael S. Tsirkin wrote:
> On Sat, Apr 30, 2016 at 01:42:40AM +0300, David Kiarie wrote:
>> Add AMD IOMMU emulaton to Qemu in addition to Intel IOMMU
>> The IOMMU does basic translation, error checking and has a
>> minimal IOTLB implementatio
On Wed, May 4, 2016 at 9:12 AM, Jan Kiszka wrote:
> On 2016-04-30 00:42, David Kiarie wrote:
>> These series adds AMD IOMMU support to Qemu. It's currently in the 9th
>> version.
>>
>> In this series I have (hopefully) addressed all the comments made in the
>
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