On Mon, 27 May 2013 09:22:59 +0800
li guang lig.f...@cn.fujitsu.com wrote:
在 2013-05-26日的 19:51 -0500，Anthony Liguori写道：
li guang lig.f...@cn.fujitsu.com writes:
在 2013-05-24五的 14:45 +0300，Michael S. Tsirkin写道：
On Wed, May 22, 2013 at 11:46:33AM +0800, liguang wrote:
These patches
On Fri, 24 May 2013 08:56:14 -0600
jacek burghardt jaceksburgha...@gmail.com wrote:
I wonder if anyone has patch that allows to tlak to icc bus introduced in
qemu upstream ?
https://github.com/qemu/qemu/commit/f0513d2c0156799e0c75a108ab9a049eea4f9607
icc-bridge will serve as a parent for
On Tue, 28 May 2013 08:28:09 +0800
li guang lig.f...@cn.fujitsu.com wrote:
在 2013-05-27一的 13:45 +0200，Igor Mammedov写道：
On Mon, 27 May 2013 09:22:59 +0800
li guang lig.f...@cn.fujitsu.com wrote:
在 2013-05-26日的 19:51 -0500，Anthony Liguori写道：
li guang lig.f...@cn.fujitsu.com writes
On Tue, 28 May 2013 14:40:30 +0800
li guang lig.f...@cn.fujitsu.com wrote:
Hi, Michael
在 2013-05-28二的 09:31 +0300，Michael S. Tsirkin写道：
On Tue, May 28, 2013 at 08:21:24AM +0800, li guang wrote:
在 2013-05-27一的 23:23 +0300，Michael S. Tsirkin写道：
On Mon, May 27, 2013 at 09:22:59AM +0800,
(-)
Reviewed-By: Igor Mammedov imamm...@redhat.com
On Tue, 28 May 2013 16:34:42 +0800
li guang lig.f...@cn.fujitsu.com wrote:
在 2013-05-28二的 10:16 +0200，Igor Mammedov写道：
On Tue, 28 May 2013 08:28:09 +0800
li guang lig.f...@cn.fujitsu.com wrote:
在 2013-05-27一的 13:45 +0200，Igor Mammedov写道：
On Mon, 27 May 2013 09:22:59 +0800
li
On Wed, 29 May 2013 14:29:51 +0200
Paolo Bonzini pbonz...@redhat.com wrote:
Il 29/05/2013 14:11, Andreas Färber ha scritto:
xen_machine_pv uses cpu_x86_init, therefore it has been broken.
This patch fixes the problem by removing the dummy CPU creation
altogether from xen_init_pv, relying
On Wed, 29 May 2013 09:47:35 +0800
liguang lig.f...@cn.fujitsu.com wrote:
patch 1 adds ACPI Embedded Controller (EC),
refer-to:
ACPI SPEC v5 chapter 12
ACPI Embedded Controller Interface Specification
EC is a standard ACPI device, it plays flexible roles,
especially be event carrier, it
for lower bound and error out
on incorrect value.
Signed-off-by: Igor Mammedov imamm...@redhat.com
---
hw/i386/pc.c |5 +
1 files changed, 5 insertions(+), 0 deletions(-)
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 197d218..e2c44f8 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -927,6
spotted by Coverity,
x86_reg_info_32[] is CPU_NB_REGS32 elements long, so accessing
x86_reg_info_32[CPU_NB_REGS32] will be one element off array.
Signed-off-by: Igor Mammedov imamm...@redhat.com
---
target-i386/cpu.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git
).
Signed-off-by: Igor Mammedov imamm...@redhat.com
---
target-i386/cpu.c | 31 ++-
1 files changed, 22 insertions(+), 9 deletions(-)
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 21e7334..9f6fe06 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -1344,7
Signed-off-by: Igor Mammedov imamm...@redhat.com
---
target-i386/cpu.c | 12 +---
1 files changed, 9 insertions(+), 3 deletions(-)
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index c87cc9f..5d379af 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -1238,6 +1238,14
Signed-off-by: Igor Mammedov imamm...@redhat.com
---
target-i386/cpu.c | 12 +---
1 files changed, 9 insertions(+), 3 deletions(-)
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 9f6fe06..ec6d33f 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -1427,6 +1427,14
Signed-off-by: Igor Mammedov imamm...@redhat.com
---
target-i386/cpu.c | 20 +---
1 files changed, 1 insertions(+), 19 deletions(-)
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 1d997ee..bb86484 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -1290,22
Signed-off-by: Igor Mammedov imamm...@redhat.com
---
target-i386/cpu.c | 12 +---
1 files changed, 9 insertions(+), 3 deletions(-)
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 5d379af..1d997ee 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -1282,6 +1282,14
Signed-off-by: Igor Mammedov imamm...@redhat.com
---
target-i386/cpu.c | 17 ++---
1 files changed, 14 insertions(+), 3 deletions(-)
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 1a501d9..c87cc9f 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -1195,6 +1195,14
],
to avoid behavior change between them(f-kvmclock property).
* the rest of conversions were basicaly rebased on top of current qom-cpu-next
tree, with small corrections
git for testing: https://github.com/imammedo/qemu/tree/x86-cpu-properties.v8
Igor Mammedov (15):
target-i386: cpu: convert
Signed-off-by: Igor Mammedov imamm...@redhat.com
---
target-i386/cpu.c |3 ++-
1 files changed, 2 insertions(+), 1 deletions(-)
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index c2125f4..95ffb2e 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -1561,6 +1561,7 @@ static
Signed-off-by: Igor Mammedov imamm...@redhat.com
---
target-i386/cpu.c |3 ++-
1 files changed, 2 insertions(+), 1 deletions(-)
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 95ffb2e..bf56677 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -1562,6 +1562,7 @@ static
Signed-off-by: Igor Mammedov imamm...@redhat.com
---
target-i386/cpu.c | 20 +---
1 files changed, 1 insertions(+), 19 deletions(-)
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index bb86484..f42282e 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -1290,22
- since hyperv_* helper functions are used only in target-i386/kvm.c
move them there as static helpers
Signed-off-by: Igor Mammedov imamm...@redhat.com
Requestd-By: Eduardo Habkost ehabk...@redhat.com
---
target-i386/Makefile.objs |2 +-
target-i386/cpu.c | 16 +++---
target
Signed-off-by: Igor Mammedov imamm...@redhat.com
---
target-i386/cpu.c | 50 --
1 files changed, 48 insertions(+), 2 deletions(-)
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 40f2a7c..c2125f4 100644
--- a/target-i386/cpu.c
+++ b
* additionally convert check_cpuid enforce_cpuid to bool and make them
members of CPUX86State
* make 'enforce' feature independent from 'check'
Signed-off-by: Igor Mammedov imamm...@redhat.com
---
target-i386/cpu.c | 13 ++---
target-i386/cpu.h |2 ++
2 files changed, 8
feature will be rejected by property setter so there is no
need to check for unknown feature in cpu_x86_parse_featurestr(), therefore
it's replaced by above mentioned catch-all handler.
Signed-off-by: Igor Mammedov imamm...@redhat.com
---
v2:
- style fixes
---
target-i386/cpu.c | 17
feature will be rejected by CPU property setter so there is no
need to check for unknown feature in cpu_x86_parse_featurestr(), therefore
it's replaced by above mentioned catch-all handler.
Signed-off-by: Igor Mammedov imamm...@redhat.com
Reviewed-by: Eduardo Habkost ehabk...@redhat.com
---
v2
Signed-off-by: Igor Mammedov imamm...@redhat.com
---
target-i386/cpu.c | 31 ---
1 files changed, 24 insertions(+), 7 deletions(-)
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index f42282e..21e7334 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
On Wed, 05 Jun 2013 15:29:08 +0200
Andreas Färber afaer...@suse.de wrote:
Am 05.06.2013 15:18, schrieb Igor Mammedov:
It's a rebase of v7 on current qom-cpu tree, since then some patches from it
were applied to master. Convertion of feature bits is left for part 2
since it's not ready yet
On Thu, 6 Jun 2013 11:13:29 +0300
Michael S. Tsirkin m...@redhat.com wrote:
On Thu, Jun 06, 2013 at 11:16:53AM +0800, liguang wrote:
v2:
1.remove PIIX4_PROC_BASE operations for cpu hotplug
2.fix wrong description fo cpu-del
patch 1 adds ACPI Embedded Controller (EC),
refer-to:
On Wed, 05 Jun 2013 19:04:59 +0200
Andreas Färber afaer...@suse.de wrote:
Am 05.06.2013 16:39, schrieb Igor Mammedov:
On Wed, 05 Jun 2013 15:29:08 +0200
Andreas Färber afaer...@suse.de wrote:
Am 05.06.2013 15:18, schrieb Igor Mammedov:
It's a rebase of v7 on current qom-cpu tree
On Sun, 29 Sep 2013 13:58:24 +0300
Michael S. Tsirkin m...@redhat.com wrote:
This is so qom headers can use it without pulling in
extra headers.
Reviewed-by: Paolo Bonzini pbonz...@redhat.com
Signed-off-by: Michael S. Tsirkin m...@redhat.com
---
include/qemu/typedefs.h | 1 +
1 file
On Mon, 30 Sep 2013 17:40:50 +0300
Michael S. Tsirkin m...@redhat.com wrote:
On Mon, Sep 30, 2013 at 03:10:56PM +0200, Igor Mammedov wrote:
On Sun, 29 Sep 2013 13:58:24 +0300
Michael S. Tsirkin m...@redhat.com wrote:
This is so qom headers can use it without pulling in
extra headers
On Sun, 29 Sep 2013 13:58:21 +0300
Michael S. Tsirkin m...@redhat.com wrote:
WS2008R2x64 BSODs with ACPI error on boot when 64bit PCI hole is present,
but it boots fine with upstream QEMU [stock or acpi BIOS]
QEMU cli:
qemu-system-x86_64 -enable-kvm -monitor stdio -m 4096 test.qcow2 -device
On Mon, 30 Sep 2013 19:09:38 +0300
Michael S. Tsirkin m...@redhat.com wrote:
On Mon, Sep 30, 2013 at 05:55:50PM +0200, Andreas Färber wrote:
Am 30.09.2013 17:50, schrieb Michael S. Tsirkin:
On Tue, Oct 01, 2013 at 12:10:52AM +0900, Peter Maydell wrote:
On 30 September 2013 23:40, Michael
qapi/error.h is simple enough to be included in qom/object.h
direcly and prepares qom/object.h to use Error typedef.
Signed-off-by: Igor Mammedov imamm...@redhat.com
---
it allows to drop 1-2/patches from ACPI tables in QEMU series
with following qom: pull in qemu/typedefs applying cleanly on
top
On Wed, 2 Oct 2013 00:26:11 +0300
Michael S. Tsirkin m...@redhat.com wrote:
This code can also be found here:
git://git.kernel.org/pub/scm/virt/kvm/mst/qemu.git acpi
While this patch still uses info not available in QOM, I think it's reasonable
to merge it and then refactor as QOM
On Wed, 2 Oct 2013 16:30:36 +0300
Michael S. Tsirkin m...@redhat.com wrote:
On Wed, Oct 02, 2013 at 03:05:52PM +0200, Igor Mammedov wrote:
On Wed, 2 Oct 2013 00:26:11 +0300
Michael S. Tsirkin m...@redhat.com wrote:
This code can also be found here:
git://git.kernel.org/pub/scm/virt
On Wed, 2 Oct 2013 17:54:57 +0200
Paolo Bonzini pbonz...@redhat.com wrote:
The data in leaf 0Dh depends on information from other feature bits.
Instead of passing it blindly from the host, compute it based on
whether these feature bits are enabled.
Signed-off-by: Paolo Bonzini
On Thu, 3 Oct 2013 13:01:54 +0300
Gleb Natapov g...@redhat.com wrote:
On Thu, Oct 03, 2013 at 11:59:24AM +0200, Igor Mammedov wrote:
On Wed, 2 Oct 2013 17:54:57 +0200
Paolo Bonzini pbonz...@redhat.com wrote:
The data in leaf 0Dh depends on information from other feature bits
On Wed, 21 Aug 2013 13:01:32 +0200
Gerd Hoffmann kra...@redhat.com wrote:
Hi,
+#define ICH9_PROC_BASE 0xaf00
+#define ICH9_PROC_LEN 32
No, please don't. It makes it impossible to assign the 0xa000 - 0xafff
I/O port window to a PCI bridge. Please lets stop occupy random io
ports
On Thu, 3 Oct 2013 18:05:56 +0300
Michael S. Tsirkin m...@redhat.com wrote:
[...]
+void acpi_setup(PcGuestInfo *guest_info)
+{
+AcpiBuildTables tables;
+AcpiBuildState *build_state;
+
+if (!guest_info-fw_cfg) {
+ACPI_BUILD_DPRINTF(3, Nooiling out fw cfg. Boiling
On Thu, 3 Oct 2013 18:05:35 +0300
Michael S. Tsirkin m...@redhat.com wrote:
This defines a structure that will be used to fill in acpi tables
where relevant properties are not yet available using QOM.
Reviewed-by: Laszlo Ersek ler...@redhat.com
Reviewed-by: Gerd Hoffmann kra...@redhat.com
things.
Igor Mammedov (1):
cleanup object.h: include error.h directly
Michael S. Tsirkin (26):
qom: cleanup struct Error references
qom: add pointer to int property helpers
pci: fix up w64 size calculation helper
fw_cfg: interface to trigger callback on read
loader: support
.
2) Inlining of qdev_init(), so that we always have unparent+unref pairs.
If there's no objections, planning to include this in a pull tonight or
tomorrow.
Regards,
Andreas
Cc: Igor Mammedov imamm...@redhat.com
Cc: Stefan Hajnoczi stefa...@redhat.com
Cc: Paolo Bonzini pbonz
64-bit PCI devices mapping.
Signed-off-by: Igor Mammedov imamm...@redhat.com
---
src/fw/pciinit.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/src/fw/pciinit.c b/src/fw/pciinit.c
index b29db99..62f8d4e 100644
--- a/src/fw/pciinit.c
+++ b/src/fw/pciinit.c
@@ -18,6 +18,8
On Wed, 09 Oct 2013 15:12:08 +0200
Gerd Hoffmann kra...@redhat.com wrote:
On Mi, 2013-10-09 at 14:23 +0200, Igor Mammedov wrote:
I'm posting it to get an oppinion on one of possible approaches
on where to map a hotplug memory.
This patch assumes that a space for hotplug memory
On Thu, 10 Oct 2013 14:42:07 +0200
Gerd Hoffmann kra...@redhat.com wrote:
Hi,
I think the issue is with legacy guests.
E.g. if VCPU claims to support 50 bit of memory
do we put high PCI memory at 1 50?
If yes old guests which expect at most 40 bit
will not be able to use
On Thu, 10 Oct 2013 15:21:32 +0300
Michael S. Tsirkin m...@redhat.com wrote:
On Thu, Oct 10, 2013 at 02:14:16PM +0200, Gerd Hoffmann wrote:
Hi,
I think the simplest way to do all this is simply to tell seabios
that we have more memory. seabios already programs 64 bit BARs
higher
On Thu, 10 Oct 2013 15:21:55 +0200
Gerd Hoffmann kra...@redhat.com wrote:
Hi,
Guess we can just go with Igor's approach then. etc/mem64-end is a
pretty bad name to say please map 64bit pci bars here though.
reasoning bind was to tell BIOS where RAM ends and let it decide what
to
it.
Introduce etc/pcimem64-start romfile to provide BIOS a hint
where it should start mapping of 64-bit PCI BARs. If romfile is
missing BIOS reverts to legacy behavior and starts mapping right
after high memory.
Signed-off-by: Igor Mammedov imamm...@redhat.com
---
src/fw/pciinit.c |6 +-
1
On Thu, 10 Oct 2013 14:54:29 +0200
Gerd Hoffmann kra...@redhat.com wrote:
We have a fw_cfg entry to pass e820 entries from qemu to the firmware.
Today it's used to pass reservations only. This patch makes qemu pass
entries for RAM too.
This allows to pass RAM sizes larger than 1TB to the
On Fri, 11 Oct 2013 14:35:50 +0200
Gerd Hoffmann kra...@redhat.com wrote:
On Fr, 2013-10-11 at 12:19 +0200, Igor Mammedov wrote:
Currently 64-bit PCI BARs are unconditionally mapped by BIOS right
over 4G + RamSizeOver4G location, which doesn't allow to reserve
extra space before 64-bit PCI
On Fri, 11 Oct 2013 14:27:12 +0200
Gerd Hoffmann kra...@redhat.com wrote:
On Fr, 2013-10-11 at 13:20 +0200, Igor Mammedov wrote:
On Thu, 10 Oct 2013 14:54:29 +0200
Gerd Hoffmann kra...@redhat.com wrote:
We have a fw_cfg entry to pass e820 entries from qemu to the firmware.
Today
it.
Introduce etc/pcimem64-start romfile to provide BIOS a hint
where it should start mapping of 64-bit PCI BARs. If romfile is
missing, BIOS reverts to legacy behavior and starts mapping right
after high memory.
Signed-off-by: Igor Mammedov imamm...@redhat.com
---
v2:
* place 64-bit window
On Sun, 13 Oct 2013 15:31:23 +0300
Michael S. Tsirkin m...@redhat.com wrote:
On Sun, Oct 13, 2013 at 02:13:44PM +0200, Igor Mammedov wrote:
Currently 64-bit PCI BARs are unconditionally mapped by BIOS right
over 4G + RamSizeOver4G location, which doesn't allow to reserve
extra space before
On Sun, 13 Oct 2013 18:59:20 +0300
Michael S. Tsirkin m...@redhat.com wrote:
On Sun, Oct 13, 2013 at 05:11:54PM +0200, Igor Mammedov wrote:
On Sun, 13 Oct 2013 15:31:23 +0300
Michael S. Tsirkin m...@redhat.com wrote:
On Sun, Oct 13, 2013 at 02:13:44PM +0200, Igor Mammedov wrote
On Sun, 13 Oct 2013 19:46:09 +0300
Michael S. Tsirkin m...@redhat.com wrote:
On Sun, Oct 13, 2013 at 06:23:28PM +0200, Igor Mammedov wrote:
On Sun, 13 Oct 2013 18:59:20 +0300
Michael S. Tsirkin m...@redhat.com wrote:
On Sun, Oct 13, 2013 at 05:11:54PM +0200, Igor Mammedov wrote
On Sun, 13 Oct 2013 19:33:19 +0200
Igor Mammedov imamm...@redhat.com wrote:
On Sun, 13 Oct 2013 19:46:09 +0300
Michael S. Tsirkin m...@redhat.com wrote:
On Sun, Oct 13, 2013 at 06:23:28PM +0200, Igor Mammedov wrote:
On Sun, 13 Oct 2013 18:59:20 +0300
Michael S. Tsirkin m...@redhat.com
On Sun, 13 Oct 2013 23:28:47 +0300
Michael S. Tsirkin m...@redhat.com wrote:
On Sun, Oct 13, 2013 at 07:33:19PM +0200, Igor Mammedov wrote:
On Sun, 13 Oct 2013 19:46:09 +0300
Michael S. Tsirkin m...@redhat.com wrote:
On Sun, Oct 13, 2013 at 06:23:28PM +0200, Igor Mammedov wrote
On Tue, 16 Jul 2013 00:25:53 +0200
Igor Mammedov imamm...@redhat.com wrote:
It's reordered and rebased v8 plus CPUID feature bits conversion to properties
and cleanups that are removing unused anymore *_feature_name arrays.
dynamic = static properties conversion is still making sense
On Mon, 14 Oct 2013 14:00:12 +0300
Michael S. Tsirkin m...@redhat.com wrote:
On Mon, Oct 14, 2013 at 12:27:26PM +0200, Igor Mammedov wrote:
On Sun, 13 Oct 2013 23:28:47 +0300
Michael S. Tsirkin m...@redhat.com wrote:
On Sun, Oct 13, 2013 at 07:33:19PM +0200, Igor Mammedov wrote
On Mon, 14 Oct 2013 17:00:47 +0300
Michael S. Tsirkin m...@redhat.com wrote:
On Mon, Oct 14, 2013 at 03:04:45PM +0200, Gerd Hoffmann wrote:
Hi,
To me it makes more sense to just go the direct route and say please
put the 64bit bars at this location rather than indirect we
On Tue, 15 Oct 2013 10:01:01 +0200
Gerd Hoffmann kra...@redhat.com wrote:
Hi,
Yes but at the cost of overspecifying it.
I think it's down to the name: it's called pcimem64-start
but it can actually be less than 4G and we need to worry what to
do then. Also, 64 doesn't really mean 4G.
On Tue, 15 Oct 2013 12:16:43 +0300
Michael S. Tsirkin m...@redhat.com wrote:
On Tue, Oct 15, 2013 at 11:05:48AM +0200, Igor Mammedov wrote:
On Tue, 15 Oct 2013 10:01:01 +0200
Gerd Hoffmann kra...@redhat.com wrote:
Hi,
Yes but at the cost of overspecifying it.
I think it's
On Tue, 15 Oct 2013 11:24:19 +0200
Gerd Hoffmann kra...@redhat.com wrote:
Hi,
What is the state of the qemu side patches btw?
I've them ready but they conflict with you 1Tb in e820 RFC,
I can post relevant patches as soon as we agree on this topic.
May I pick up your patch and
Igor Mammedov (1):
cleanup object.h: include error.h directly
Marcel Apfelbaum (11):
memory: Change MemoryRegion priorities from unsigned to signed
docs/memory: Explictly state that MemoryRegion priority is signed
hw
it.
Introduce etc/pcimem64-minimum-addres romfile to provide BIOS
a hint where it should start mapping of 64-bit PCI BARs.
If romfile is missing BIOS reverts to legacy behavior and starts
mapping right after high memory.
Signed-off-by: Igor Mammedov imamm...@redhat.com
v3:
* rename etc/pcimem64
On Tue, 15 Oct 2013 11:14:36 +0200
Gerd Hoffmann kra...@redhat.com wrote:
Hi,
What is the state of the qemu side patches btw?
I've them ready but they conflict with you 1Tb in e820 RFC,
I can post relevant patches as soon as we agree on this topic.
May I pick up your patch and post
On Tue, 15 Oct 2013 06:51:30 -0700
Anthony Liguori anth...@codemonkey.ws wrote:
On Mon, Oct 14, 2013 at 10:28 PM, Michael S. Tsirkin m...@redhat.com wrote:
On Mon, Oct 14, 2013 at 03:42:37PM -0700, Anthony Liguori wrote:
Michael S. Tsirkin m...@redhat.com writes:
Anthony, I know you
On Tue, 15 Oct 2013 17:51:28 +0300
Michael S. Tsirkin m...@redhat.com wrote:
On Tue, Oct 15, 2013 at 07:21:34AM -0700, Anthony Liguori wrote:
Please put together a summary of the testing this series has gone
through. I still think there should be automated testing as part of
this but if
extra address space before
64-bit PCI hole for memory hotplug.
Signed-off-by: Igor Mammedov imamm...@redhat.com
---
* SeaBIOS patch: http://patchwork.ozlabs.org/patch/283623/
---
hw/i386/pc.c |9 -
hw/i386/pc_piix.c|2 +-
hw/pci-host/piix.c |5 +++--
hw/pci-host
On Tue, 16 Jul 2013 00:26:14 +0200
Igor Mammedov imamm...@redhat.com wrote:
...
+X86CPU_FEAT(feat-kvmclock,0, FEAT_KVM),
+X86CPU_FEAT(feat-kvm-nopiodelay, 1, FEAT_KVM),
+X86CPU_FEAT(feat-kvm-mmu, 2, FEAT_KVM),
+X86CPU_FEAT(feat-kvmclock2, 3, FEAT_KVM
* rename pci_hole_start to below_4g_mem_size to reflect what is
really passed in and move pci_hole_size calculation inside
i440fx.
* remove ram_size arg from function signature, since it could be
retrieved as below_4g_mem_size + above_4g_mem_size sum,
internally.
Signed-off-by: Igor
region in highmem.
SeaBIOS counterpart: http://patchwork.ozlabs.org/patch/283623/
Igor Mammedov (4):
pc: sanitize i440fx_init() arguments
pc: consolidate mapping of PCI address space into system address
space
fw_cfg: make cast macro available to world
pc: add 'etc/pcimem64-minimum
extra address space before
64-bit PCI hole for memory hotplug.
Signed-off-by: Igor Mammedov imamm...@redhat.com
---
* SeaBIOS patch: http://patchwork.ozlabs.org/patch/283623/
---
hw/i386/pc.c |9 -
hw/i386/pc_piix.c|2 +-
hw/pci-host/piix.c |5 +++--
hw/pci-host
visible via info mtree names for regions
pci-hole and pci-hole64 to avoid management tools regressions.
Signed-off-by: Igor Mammedov imamm...@redhat.com
---
hw/i386/pc.c | 40
hw/pci-host/piix.c | 28
hw/pci-host
Signed-off-by: Igor Mammedov imamm...@redhat.com
---
hw/nvram/fw_cfg.c |4
include/hw/nvram/fw_cfg.h |7 +++
2 files changed, 7 insertions(+), 4 deletions(-)
diff --git a/hw/nvram/fw_cfg.c b/hw/nvram/fw_cfg.c
index d0820e5..6c31e24 100644
--- a/hw/nvram/fw_cfg.c
+++ b/hw
On Wed, 16 Oct 2013 12:29:48 +0300
Michael S. Tsirkin m...@redhat.com wrote:
On Wed, Oct 16, 2013 at 10:49:14AM +0200, Igor Mammedov wrote:
'etc/pcimem64-minimum-address' will allow QEMU to communicate to BIOS
where PCI memory address space mapping starts in high memory.
Allowing BIOS
On Fri, 25 Oct 2013 02:58:05 -0200
Marcelo Tosatti mtosa...@redhat.com wrote:
On Fri, Oct 25, 2013 at 12:55:36AM +0100, Paolo Bonzini wrote:
+if (hpagesize == (130)) {
+unsigned long holesize = 0x1ULL -
below_4g_mem_size; +
+
On Fri, 25 Oct 2013 11:34:22 -0200
Marcelo Tosatti mtosa...@redhat.com wrote:
On Fri, Oct 25, 2013 at 11:57:18AM +0200, igor Mammedov wrote:
On Fri, 25 Oct 2013 02:58:05 -0200
Marcelo Tosatti mtosa...@redhat.com wrote:
On Fri, Oct 25, 2013 at 12:55:36AM +0100, Paolo Bonzini wrote
On Wed, 16 Oct 2013 12:20:45 +0300
Michael S. Tsirkin m...@redhat.com wrote:
On Wed, Oct 16, 2013 at 10:49:10AM +0200, Igor Mammedov wrote:
* simplify PCI address space mapping into system address space,
replacing code duplication in piix/q53 PCs with helper function
I think this does
On Tue, 29 Oct 2013 12:22:09 +0200
Michael S. Tsirkin m...@redhat.com wrote:
On Tue, Oct 29, 2013 at 11:08:56AM +0100, Igor Mammedov wrote:
On Wed, 16 Oct 2013 12:20:45 +0300
Michael S. Tsirkin m...@redhat.com wrote:
On Wed, Oct 16, 2013 at 10:49:10AM +0200, Igor Mammedov wrote
MemoryRegion priorities from unsigned to signed:
Git tree for testing:
https://github.com/imammedo/qemu/commits/pcimem64-minimum-address-v2
Igor Mammedov (1):
pc: add 'etc/pcimem64-minimum-address' fw_cfg interface to SeaBIOS
Michael S. Tsirkin (1):
pc: map PCI address space as catchall region
address space before
64-bit PCI hole for memory hotplug.
Related SeaBIOS patch: http://patchwork.ozlabs.org/patch/283623/
Signed-off-by: Igor Mammedov imamm...@redhat.com
---
hw/i386/pc.c | 14 +-
hw/pci-host/piix.c |3 ++-
hw/pci-host/q35.c|3 ++-
include/hw
-by: Michael S. Tsirkin m...@redhat.com
Signed-off-by: Igor Mammedov imamm...@redhat.com
---
hw/i386/pc.c | 20 ++--
hw/i386/pc_piix.c |2 --
hw/pci-host/piix.c| 26 --
hw/pci-host/q35.c | 27
exposed/used by guest.
And properly remove/cleanup it during 1.8 development cycle.
Signed-off-by: Igor Mammedov imamm...@redhat.com
---
hw/i386/pc_piix.c |3 ++-
hw/i386/pc_q35.c |3 ++-
2 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index
On Tue, 29 Oct 2013 17:10:47 +0200
Michael S. Tsirkin m...@redhat.com wrote:
On Tue, Oct 29, 2013 at 01:57:33PM +0100, Igor Mammedov wrote:
* simplify PCI address space mapping into system address space,
replacing code duplication in piix/q53 PCs with a helper function
* add fw_cfg
On Mon, 28 Oct 2013 12:04:06 -0200
Marcelo Tosatti mtosa...@redhat.com wrote:
On Sun, Oct 27, 2013 at 04:20:44PM +0100, igor Mammedov wrote:
Yes, thought of that, unfortunately its cumbersome to add an interface
for the user to supply both 2MB and 1GB hugetlbfs pages.
Could 2Mb tails
Otherwise 1GB TLBs cannot be cached for the range.
PS:
as side effect we are not wasting ~1Gb of memory if
1Gb hugepages are used and -m hpagesize(in Mb)*n + 1
Signed-off-by: Igor Mammedov imamm...@redhat.com
---
PS2:
As RFC it's yet without compatibility changes noted by Paolo
---
exec.c
On Tue, 29 Oct 2013 20:52:42 +0200
Michael S. Tsirkin m...@redhat.com wrote:
On Tue, Oct 29, 2013 at 04:28:25PM +0100, Igor Mammedov wrote:
On Tue, 29 Oct 2013 17:10:47 +0200
Michael S. Tsirkin m...@redhat.com wrote:
On Tue, Oct 29, 2013 at 01:57:33PM +0100, Igor Mammedov wrote
On Tue, 29 Oct 2013 20:52:42 +0200
Michael S. Tsirkin m...@redhat.com wrote:
On Tue, Oct 29, 2013 at 04:28:25PM +0100, Igor Mammedov wrote:
On Tue, 29 Oct 2013 17:10:47 +0200
Michael S. Tsirkin m...@redhat.com wrote:
On Tue, Oct 29, 2013 at 01:57:33PM +0100, Igor Mammedov wrote
On Wed, 30 Oct 2013 15:33:35 +0100
Gerd Hoffmann kra...@redhat.com wrote:
Hi,
I don't think we can predict the future.
It seems just as likely that BIOS will need to drive the
new hardware so it will not be enough to have start pci here.
In particular, non-contiguous hotpluggable
On Tue, 29 Oct 2013 19:38:44 -0200
Marcelo Tosatti mtosa...@redhat.com wrote:
On Tue, Oct 29, 2013 at 07:18:49PM +0100, Igor Mammedov wrote:
Otherwise 1GB TLBs cannot be cached for the range.
This fails to back non-1GB-aligned gpas, but 2MB aligned, with 2MB large
pages.
With current
On Wed, 30 Oct 2013 16:51:29 -0200
Marcelo Tosatti mtosa...@redhat.com wrote:
On Wed, Oct 30, 2013 at 05:49:49PM +0100, Igor Mammedov wrote:
On Tue, 29 Oct 2013 19:38:44 -0200
Marcelo Tosatti mtosa...@redhat.com wrote:
On Tue, Oct 29, 2013 at 07:18:49PM +0100, Igor Mammedov wrote
On Fri, 02 Aug 2013 22:33:24 +0200
Andreas Färber afaer...@suse.de wrote:
Am 23.07.2013 18:22, schrieb Igor Mammedov:
Signed-off-by: Igor Mammedov imamm...@redhat.com
---
vl.c |7 +--
1 files changed, 1 insertions(+), 6 deletions(-)
diff --git a/vl.c b/vl.c
index 8190504
On Mon, 09 Sep 2013 16:31:03 +0200
Paolo Bonzini pbonz...@redhat.com wrote:
Il 09/09/2013 16:06, Igor Mammedov ha scritto:
On Fri, 02 Aug 2013 22:33:24 +0200
Andreas Färber afaer...@suse.de wrote:
Am 23.07.2013 18:22, schrieb Igor Mammedov:
Signed-off-by: Igor Mammedov imamm
On Wed, 4 Sep 2013 13:48:35 +0300
Michael S. Tsirkin m...@redhat.com wrote:
Signed-off-by: Michael S. Tsirkin m...@redhat.com
---
include/qemu/range.h | 17 +
1 file changed, 17 insertions(+)
diff --git a/include/qemu/range.h b/include/qemu/range.h
index 4a0780d..1c688ca
On Tue, 10 Sep 2013 17:43:41 +0800
Chen Fan chen.fan.f...@cn.fujitsu.com wrote:
the 'apic_no' is increased by one when initialize/create a vCPU each time,
which causes APICCommonState s-idx always is increased.
but if we want to re-add a vCPU after removing a vCPU, we need to re-use the
On Wed, 21 Aug 2013 13:05:27 +0200
Gerd Hoffmann kra...@redhat.com wrote:
Hi,
Method(_L01) {
+}
+Method(_E02) {
// CPU hotplug event
\_SB.PRSC()
}
-Method(_L02) {
-}
E02? Typo?
_E02 is correct.
On Wed, 4 Sep 2013 13:48:29 +0300
Michael S. Tsirkin m...@redhat.com wrote:
For Q35, MMCFG address and size are guest configurable.
Update w32 property to make it behave accordingly.
Signed-off-by: Michael S. Tsirkin m...@redhat.com
---
hw/pci-host/q35.c | 10 ++
1 file changed,
On Wed, 4 Sep 2013 13:48:37 +0300
Michael S. Tsirkin m...@redhat.com wrote:
Signed-off-by: Michael S. Tsirkin m...@redhat.com
---
include/hw/pci/pci.h | 1 +
hw/pci/pci.c | 43 +++
2 files changed, 44 insertions(+)
diff --git
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