On Tue, Aug 07, 2012 at 05:45:07PM +0200, Gerd Hoffmann wrote:
> Hi,
>
> This pull updates seabios in qemu to the latest bits from seabios
> master, so the upcoming 1.2 qemu release gets all the new shiny
> stuff added recently. I'd like to have a new seabios release for
> inclusion into qemu 1
On Fri, Aug 10, 2012 at 08:42:11AM -0500, Anthony Liguori wrote:
> Gerd Hoffmann writes:
>
> > Hi,
> >
> > This pull updates seabios in qemu to the latest bits from seabios
> > master, so the upcoming 1.2 qemu release gets all the new shiny
> > stuff added recently. I'd like to have a new seab
On Sun, Aug 19, 2012 at 06:07:05PM +0300, Avi Kivity wrote:
> ipxe contains the following snippet:
>
> /* Copy ROM to image source PMM block */
> pushw %es
> xorw%ax, %ax
> movw%ax, %es
> movl%esi, %edi
> xorl%esi, %esi
> movzbl romheade
On Sun, Aug 19, 2012 at 04:34:50PM +0100, Michael Brown wrote:
> On Sunday 19 Aug 2012 16:07:05 Avi Kivity wrote:
> > (and that seabios needs changes to either work in
> > big real mode, or to put the processor back into big real mode after
> > returning from a PMM service.
>
> If seabios switches
On Mon, Aug 13, 2012 at 04:56:53PM +0300, Avi Kivity wrote:
> IMO we need to fix CMOS reporting.
>
> (technically we shouldn't touch CMOS NVRAM at all; seabios should
> discover memory size via fwcfg and program it itself. But it's
> pointless to change it now)
It would be nice to pass all value
On Wed, Aug 15, 2012 at 01:12:20PM +0200, Markus Armbruster wrote:
> pc_cmos_init() always claims 640KiB base memory, and ram_size - 1MiB
> extended memory. The latter can underflow to "lots of extended
> memory". Fix both, and clean up some.
>
> Note: SeaBIOS currently requires 1MiB of RAM, and
On Fri, Feb 03, 2012 at 05:16:27PM -0200, Luiz Capitulino wrote:
> On Fri, 03 Feb 2012 11:23:05 -0600
> Michael Roth wrote:
> > I'd been tracking Gerd's QMP wakeup series as the s3 resolution we need
> > for guest-suspend, is that still the case?
>
> Yes. But now I remembered about a seabios bug
On Mon, Feb 06, 2012 at 01:43:42PM -0200, Luiz Capitulino wrote:
> "Kevin O'Connor" wrote:
> > On Fri, Feb 03, 2012 at 05:16:27PM -0200, Luiz Capitulino wrote:
> > > On Fri, 03 Feb 2012 11:23:05 -0600
> > > Michael Roth wrote:
> > > >
On Tue, Feb 07, 2012 at 10:44:39AM +0200, Gleb Natapov wrote:
> On Mon, Feb 06, 2012 at 07:09:42PM -0500, Kevin O'Connor wrote:
> > Perhaps a semantic distinction, but I don't consider that to be a
> > seabios defect.
> >
> Non optimal default. The default di
On Wed, Feb 08, 2012 at 09:18:24AM +0200, Gleb Natapov wrote:
> On Tue, Feb 07, 2012 at 07:35:34PM -0500, Kevin O'Connor wrote:
> > I'm concerned about the VGA passthrough case. (I know that's not
> > common and has other issues, but I also know several people have
On Mon, Feb 13, 2012 at 11:33:08AM +0200, Michael S. Tsirkin wrote:
> To allow guests to load the native SHPC driver
> for a bridge, we must declare an OSHP method
> for the appropriate device which lets the OS
> take control of the SHPC.
> As we don't access SHPC at the moment, we
> don't need to
On Tue, Feb 14, 2012 at 02:43:45AM +0200, Michael S. Tsirkin wrote:
> On Mon, Feb 13, 2012 at 07:34:55PM -0500, Kevin O'Connor wrote:
> > On Mon, Feb 13, 2012 at 11:33:08AM +0200, Michael S. Tsirkin wrote:
> > > To allow guests to load the native SHPC driver
> > >
On Fri, Oct 12, 2012 at 11:29:47AM +0200, Jan Kiszka wrote:
> On 2012-10-08 20:52, Anthony Liguori wrote:
> > Jan Kiszka writes:
> >
> >> On 2012-09-11 17:53, Jan Kiszka wrote:
> >>> Our one and only BIOS depends on a writable shadowed BIOS in the ISA
> >>> range. As we have no interface to contr
On Wed, Jun 20, 2012 at 04:08:41PM +0300, Gleb Natapov wrote:
> On Tue, May 22, 2012 at 09:23:03PM -0400, Kevin O'Connor wrote:
> > On Sun, May 20, 2012 at 12:03:38PM +0300, Gleb Natapov wrote:
> > >
> > > Signed-off-by: Gleb Natapov
> >
> > The patc
On Wed, Dec 19, 2012 at 03:24:45PM +0800, Amos Kong wrote:
> Current seabios will try to boot from selected devices first,
> if they are all failed, seabios will also try to boot from
> un-selected devices.
>
> For example:
> @ qemu-kvm -boot order=n,menu=on ...
>
> Guest will boot from network f
On Mon, Feb 04, 2013 at 10:27:59AM +0800, liguang wrote:
> Signed-off-by: liguang
Thanks. Some comments.
[...]
> --- a/src/acpi.h
> +++ b/src/acpi.h
[...]
> +#include "acpi-dsdt.hex"
Moving the acpi structure defines to the header is fine, but moving
the DSDT code into the header is definitely
On Mon, Feb 04, 2013 at 10:28:00AM +0800, liguang wrote:
> the old numa format got form fw_cfg is:
> number of nodes
> node id of cpu (array)
> node memory size (array)
>
> now, format it like array of:
> apci_map,
> memory_size,
>
> it has the advantage of simple and clear.
With this change, wi
On Fri, Feb 15, 2013 at 12:01:38AM +0100, Laszlo Ersek wrote:
> On 02/14/13 21:55, David Woodhouse wrote:
>
> > Thanks for testing this, btw. Are you looking at suspend/resume too? :)
>
> Entering S3 seemed OK (except the screen was not cleared; using Cirrus).
> I woke up the guest with
>
> # vi
On Thu, Feb 14, 2013 at 08:16:02PM -0500, Kevin O'Connor wrote:
> On Fri, Feb 15, 2013 at 12:01:38AM +0100, Laszlo Ersek wrote:
> > On 02/14/13 21:55, David Woodhouse wrote:
> >
> > > Thanks for testing this, btw. Are you looking at suspend/resume too? :)
> >
On Fri, Feb 15, 2013 at 04:10:59AM +0100, Laszlo Ersek wrote:
> On 02/15/13 02:22, Kevin O'Connor wrote:
> > On Thu, Feb 14, 2013 at 08:16:02PM -0500, Kevin O'Connor wrote:
> > By chance, are you using an older version of kvm? There was a bug in
> > kvm that cau
On Mon, Feb 18, 2013 at 06:12:55PM +0100, Laszlo Ersek wrote:
> On 02/18/13 13:53, David Woodhouse wrote:
> I single-stepped qemu-1.3.1 in x86_cpu_reset() /
> cpu_x86_load_seg_cache(), and we seem to set the correct base. However
> when I pause the VM when it's spinning in the reset loop, and I iss
On Mon, Feb 18, 2013 at 07:04:08PM +, David Woodhouse wrote:
> Well, what SeaBIOS already *does* is bash on the keyboard controller to
> cause a reset. Which *ought* to work too; I have a patch to at least fix
> *that*, by resetting the PAM setup in the i440.
The thing to be aware of here is t
On Mon, Feb 18, 2013 at 09:17:05PM +0200, Gleb Natapov wrote:
> On Mon, Feb 18, 2013 at 02:00:52PM -0500, Kevin O'Connor wrote:
> > Why not fix KVM so that it runs at fff0 after reset?
> >
> Because KVM uses VMX extension and VMX on CPU without "unrestricted
>
On Mon, Feb 18, 2013 at 09:12:46PM +, David Woodhouse wrote:
> The i440fx data sheet (ยง3.0) appears to say that the default values are
> loaded on a *hard* reset, not a soft reset. And a reset invoked by the
> keyboard controller (as SeaBIOS does) is a *soft* reset. The only way to
> do a *hard
On Mon, Feb 18, 2013 at 08:31:01PM +0200, Gleb Natapov wrote:
> Laszlo explained to me that the problem is that after reset we end up
> in SeaBIOS reset code instead of OVMF one. This is because kvm starts
> to execute from 0 instead of fff0 after reset and this memory
> location is modifyi
On Fri, Feb 15, 2013 at 02:11:35PM -0700, Alex Williamson wrote:
> We seem to use the IRQEN bit of the PIRQn registers interchangeably
> to select APIC mode or to disable an IRQ. I can't decide if we're
> intending to disable the IRQ or select APIC mode here, but in either
> case it prevents PIC m
On Fri, Feb 15, 2013 at 02:11:41PM -0700, Alex Williamson wrote:
> q35/ich9 doesn't use the same interrupt mapping function as
> i440fx/piix. PIRQA:D and PIRQE:H are programmed identically, but we
> start at index 0, not index -1. Slots 25 through 31 are also
> programmed independently.
>
> When
On Thu, Feb 21, 2013 at 09:12:23AM -0700, Alex Williamson wrote:
> This should never get called, but if we somehow get a new chipset
> that fails to implement their own pci_slot_get_irq function, fail
> gracefully and add a debug log message.
Thanks. I pushed this and the second part of your prev
On Sat, Feb 23, 2013 at 04:47:26PM +, David Woodhouse wrote:
> On Sat, 2013-02-23 at 11:38 -0500, Kevin O'Connor wrote:
> > IMO, we need to move the ACPI table creation (and PIR/MPTABLE/SMBIOS)
> > to QEMU and just have QEMU pass the tables to SeaBIOS for it to copy
>
On Mon, Feb 25, 2013 at 10:51:55AM +0200, Gleb Natapov wrote:
> On Sun, Feb 24, 2013 at 01:00:28PM -0500, Kevin O'Connor wrote:
> > I did a review of the SeaBIOS code to see what information is
> > currently used to generate the ACPI, SMBIOS, MPTABLE, and PIR bios
> > t
A new stable release of SeaBIOS (version 1.7.2.1) has been tagged.
This release contains bug fixes, including several fixes for build
problems.
The release is available via git:
git clone git://git.seabios.org/seabios -b 1.7.2-stable
-Kevin
Kevin O'Connor (4):
Update
On Wed, Feb 27, 2013 at 02:16:23PM -0700, Alex Williamson wrote:
>
> When we start adding root ports and bridges to systems we need some
> concept of a primary VGA device.The differentiation of the primary
> device is that it's the default one that responds to the Legacy VGA
> address ranges. PCs
The 1.7.1 version of SeaBIOS has now been released. For more
information on the release, please see:
http://seabios.org/Releases
New in this release:
* Initial support for booting from USB attached scsi (USB UAS) drives
* USB EHCI 64bit controller support
* USB MSC multi-LUN device support
* S
Log of SeaBIOS changes since 5a023065:
Kevin O'Connor (1):
Make iasl option check work with older versions of iasl.
Paolo Bonzini (1):
scsi: add AMD PCscsi driver
Signed-off-by: Kevin O'Connor
---
This release contains two patches since the last SeaBIOS pull into the
QEMU repo.
On Thu, Sep 06, 2012 at 08:36:24AM -0500, Anthony Liguori wrote:
> Amos Kong writes:
>
> > Hi all,
> >
> > Seabios supports automatically reboot after X second delay on failed
> > boot [1],
> > I want to add a parameter for qemu, it's used put a boot parameter into
> > romfile
> > for seabios t
On Mon, Sep 10, 2012 at 11:25:38AM +0200, Jan Kiszka wrote:
> On 2012-09-09 17:45, Avi Kivity wrote:
> > On 09/07/2012 11:50 AM, Jan Kiszka wrote:
> >>
> >>> +} else {
> >>> +cpu_physical_memory_rw(run->mmio.phys_addr,
> >>> + run->m
On Tue, Sep 11, 2012 at 11:15:50AM -0500, Anthony Liguori wrote:
> Jan Kiszka writes:
> > On 2012-09-11 05:02, Kevin O'Connor wrote:
> >> The easiest way to fix this is to change QEMU to boot with the area
> >> read-write. There's no real gain in booting
On Thu, Feb 28, 2013 at 10:52:49AM -0700, Alex Williamson wrote:
> We currently expect to find VGA devices on the root bus but we will
> also support them below bridges iff the VGA routing across the bridges
> is pre-configured. This patch maintains that behavior, but also
> enables SeaBIOS to ena
On Mon, Mar 04, 2013 at 05:45:02PM +0800, Amos Kong wrote:
> ./qemu-upstream-latest -boot reboot-timeout=1000 ...
> (after boot failed, VM waits for 1000 ms and try to reboot)
[...]
> romfile_add() is used to add rom files in the list.
> When seabios calls boot_fail(), the list becomes empty,
> rom
On Tue, Mar 05, 2013 at 04:59:51PM +, David Woodhouse wrote:
> On Tue, 2013-03-05 at 17:03 +0100, Paolo Bonzini wrote:
> > Resuming from suspend-to-RAM should not reset all devices. Only the
> > CPU should get a reset signal.
>
> Hm... on reflection, I don't actually know if this is true.
>
ly not directly in QEMU but in seabios, the update to version
> 1.7.2.1 commit 5c75fb10) fixes the issue. Maybe it is worth
> cherry-picking it into stable-1.4 (hence the Cc:). In the meantime
> using bios.bin from master with QEMU version 1.4.0 should also fix the
> issue.
>
> Wh
On Tue, Mar 05, 2013 at 05:52:21PM +0800, Amos Kong wrote:
> From: Kevin O'Connor
>
> Memory allocated with malloc_tmp() can't be used after the POST
> phase. The reboot-timeout inside romfile could not be loaded in
> boot_fail(). The patch saved reboot-timeout to a st
On Thu, Mar 07, 2013 at 09:43:04AM +0100, Aurelien Jarno wrote:
> On Wed, Mar 06, 2013 at 07:53:51PM -0500, Kevin O'Connor wrote:
> > That change is definitely just build related - I don't see how it
> > could impact the final SeaBIOS binary. How did you conclude tha
On Thu, Mar 07, 2013 at 09:43:04AM +0100, Aurelien Jarno wrote:
> On Wed, Mar 06, 2013 at 07:53:51PM -0500, Kevin O'Connor wrote:
> > That change is definitely just build related - I don't see how it
> > could impact the final SeaBIOS binary. How did you conclude tha
On Fri, Mar 08, 2013 at 12:03:15AM +0800, Peter Maydell wrote:
> Earlier in this thread it's been stated that this often produces
> subtly broken blobs...
I think there have been some far reaching conclusions in this thread
based on incorrect premises.
SeaBIOS has had problems with mis-compilatio
On Fri, Mar 15, 2013 at 09:45:14AM +0800, Asias He wrote:
> Asias He (2):
> virtio-scsi: Set _DRIVER_OK flag before scsi target scanning
> virtio-scsi: Pack struct virtio_scsi_{req_cmd,resp_cmd}
Thanks. I pushed these patches.
-Kevin
On Tue, Apr 02, 2013 at 12:07:46PM +0300, Gleb Natapov wrote:
> On Mon, Apr 01, 2013 at 08:22:57PM -0400, Kevin O'Connor wrote:
> > On Sun, Mar 31, 2013 at 05:34:10PM +0300, Gleb Natapov wrote:
> > > On Sat, Mar 30, 2013 at 09:20:09AM -0400, Kevin O'Connor wrote:
&
On Fri, Apr 26, 2013 at 12:11:24AM +0300, Michael S. Tsirkin wrote:
> On Thu, Apr 25, 2013 at 08:19:48PM +0200, Fred . wrote:
> > With ACPI moved out of SeaBIOS to QEMU, how will ACPI work when using
> > SeaBIOS
> > without QEMU?
> >
> > Like if using SeaBIOS with Boch, KVM or Coreboot?
>
> KVM
On Wed, Aug 20, 2014 at 11:27:41AM +0100, Stefan Hajnoczi wrote:
> The QEMU -initrd option loads the initrd at the top of RAM. There is
> a 64 KB safety region for ACPI tables in hw/i386/pc.c:load_linux():
>
> initrd_max = max_ram_size-ACPI_DATA_SIZE-1;
>
> QEMU's bios-256k.bin SeaBIOS build r
On Thu, Jul 25, 2013 at 03:55:56PM +0300, Michael S. Tsirkin wrote:
> On Mon, Jul 15, 2013 at 11:01:02AM +0300, Michael S. Tsirkin wrote:
> > On Sun, Jul 14, 2013 at 02:24:52PM -0400, Kevin O'Connor wrote:
> > > I'd prefer to see this tracked within the "linker&q
On Thu, Aug 08, 2013 at 03:43:48PM +0200, Gerd Hoffmann wrote:
> I've just created a 1.7.3-stable branch. It has a single commit right
> now, which is 2a9aeabdfb34374ecac25e7a8d21c9e368618cd4 from master
> cherry-picked (Fix USB EHCI detection that was broken in hlist
> conversion of PCIDevices).
On Thu, Aug 08, 2013 at 04:56:55PM +0200, Gerd Hoffmann wrote:
> On 08/08/13 16:13, Michael S. Tsirkin wrote:
> > On Thu, Aug 08, 2013 at 12:21:32PM +0200, Gerd Hoffmann wrote:
> >> On 08/08/13 11:52, Michael S. Tsirkin wrote:
> >>> On Thu, Aug 08, 2013 at 10:57:44AM +0200, Gerd Hoffmann wrote:
> >
On Fri, Aug 09, 2013 at 06:49:18PM +0300, Michael S. Tsirkin wrote:
> On Fri, Aug 09, 2013 at 12:13:06AM -0400, Kevin O'Connor wrote:
> > I don't think SeaBIOS should continue to do the above once the tables
> > are moved to QEMU. QEMU has all the info SeaBIOS has, s
On Fri, Aug 09, 2013 at 08:25:00AM +0200, Gerd Hoffmann wrote:
> > I don't think SeaBIOS should continue to do the above once the tables
> > are moved to QEMU. QEMU has all the info SeaBIOS has, so it can
> > generate the tables correctly on its own.
>
> The loader script provided by qemu has fix
On Fri, Aug 09, 2013 at 11:45:59AM +0200, Gerd Hoffmann wrote:
> Hi,
>
> > Converting src/smm.c to use a runtime value isn't hard - just change
> > the assembler from: "mov $" __stringify(PORT_ACPI_PM_BASE) " + 0x04,
> > %dx\n" to: "mov 4(my_acpi_base), %dx\n" and make sure to define the
> > glo
On Fri, Aug 09, 2013 at 11:30:14PM -0400, Kevin O'Connor wrote:
> On Fri, Aug 09, 2013 at 11:45:59AM +0200, Gerd Hoffmann wrote:
> > Hi,
> >
> > > Converting src/smm.c to use a runtime value isn't hard - just change
> > > the assembler from: &quo
On Mon, Aug 12, 2013 at 08:05:08AM +0200, Gerd Hoffmann wrote:
> We'll need some way to make sure the pmbase (also mmconf xbar) set by
> the firmware matches the pmbase address filled into the acpi tables by
> qemu ...
>
> So the options we have are:
>
> (1) Hardcode the address everywhere. Th
On Tue, Aug 13, 2013 at 03:26:43PM +0200, Fabio Fantoni wrote:
> Il 13/08/2013 13:09, Laszlo Ersek ha scritto:
> >On 08/13/13 12:33, Fabio Fantoni wrote:
> >>Il 13/08/2013 12:04, Laszlo Ersek ha scritto:
> >>>On 08/13/13 11:16, Fabio Fantoni wrote:
> Il 12/08/2013 17:04, Fabio Fantoni ha scritt
On Wed, Aug 14, 2013 at 12:54:06PM +0200, Fabio Fantoni wrote:
> I retried with the correct parameters and on both cases (2 gb of ram
> working and 4gb of ram not working) I get only this one more line on
> qemu log:
> Start bios (version debian/1.7.3-1-1-ga76c6f1-dirty-20130813_122010-test)
Xen m
On Tue, Aug 13, 2013 at 08:49:21AM +0200, Gerd Hoffmann wrote:
> On Mo, 2013-08-12 at 18:42 -0400, Kevin O'Connor wrote:
> > On Mon, Aug 12, 2013 at 08:05:08AM +0200, Gerd Hoffmann wrote:
> > > We'll need some way to make sure the pmbase (also mmconf xbar) set by
&g
On Thu, May 08, 2014 at 07:29:15AM +, Gonglei (Arei) wrote:
> > > > --- /dev/null
> > > > +++ b/tools/firmware/hvmloader/tools/acpi_extract.py
> > > > @@ -0,0 +1,308 @@
> > > > +#!/usr/bin/python
> > > > +# Copyright (C) 2011 Red Hat, Inc., Michael S. Tsirkin
> > > >
> > > > +#
> > > > +# Thi
On Wed, May 07, 2014 at 12:33:35PM +0200, Gerd Hoffmann wrote:
> On Mi, 2014-04-23 at 16:41 +0200, Gerd Hoffmann wrote:
> > Hi,
> >
> > I think it's time to start planning the next seabios release. First,
> > because a bunch of changes have piled up in master. And second, because
> > of the sm
On Fri, May 09, 2014 at 05:06:21PM +0200, Bernhard Walle wrote:
> Hello,
>
> I'm using QEmu 2.0.0 on a Linux host (x86-64) with a quite special
> target system that uses uvesafb ('video=uvesafb:1024x768-32'). I get
> following errors in the target system:
>
> uvesafb: Getting mode info block
On Sun, May 11, 2014 at 01:42:57PM +0200, Bernhard Walle wrote:
> Am 10.05.14 17:07, schrieb Kevin O'Connor:
> > Also, it looks like uvesafb can call x86emu. Older versions of x86emu
> > are known to not emulate some instructions properly, and it has caused
> > problems
On Sun, May 11, 2014 at 04:19:55PM +0200, Bernhard Walle wrote:
> Am 2014-05-11 14:37, schrieb Kevin O'Connor:
> >On Sun, May 11, 2014 at 01:42:57PM +0200, Bernhard Walle wrote:
> >>Am 10.05.14 17:07, schrieb Kevin O'Connor:
> >>> Also, it looks like uve
On Mon, May 12, 2014 at 08:53:53PM +0200, Bernhard Walle wrote:
> Am 2014-05-12 07:29, schrieb Kevin O'Connor:
> >
> >It does look like the x86emu issue. You can try applying the
> >SeaVGABIOS patch below to confirm it.
>
> The output doesn't appear. But I&#
On Fri, May 09, 2014 at 04:12:32PM +0200, Gerd Hoffmann wrote:
> Hi,
>
> > > ... so it's time kick freeze + release candidate I guess ;)
> > >
> > > Are there any pending patches for the next release which should better
> > > make it into the release candidate?
> >
> > I just sent a few fixes
On Tue, May 13, 2014 at 11:20:11AM +0200, Bernhard Walle wrote:
> Am 2014-05-13 07:52, schrieb Bernhard Walle:
> >* Kevin O'Connor [2014-05-12 22:07]:
> >>On Mon, May 12, 2014 at 08:53:53PM +0200, Bernhard Walle wrote:
> >>> Am 2014-05-12 07:29, schrieb Kevin O&
On Tue, May 13, 2014 at 08:08:41PM +0200, Gerhard Wiesinger wrote:
> On 13.05.2014 17:41, Kevin O'Connor wrote:
> > The x86emu code does not properly emulate "leal" (as near as I can tell
> >it treats it as a "leaw" instead), which leads to all sorts
On Tue, May 13, 2014 at 08:24:47PM +0200, Paolo Bonzini wrote:
> Il 27/04/2014 19:25, Kevin O'Connor ha scritto:
> > I was wondering about that as well. The Intel docs state that the CPL
> > is bits 0-1 of the CS.selector register, and that protected mode
> > starts imm
On Tue, May 13, 2014 at 02:39:20PM -0400, Kevin O'Connor wrote:
> On Tue, May 13, 2014 at 08:24:47PM +0200, Paolo Bonzini wrote:
> > Il 27/04/2014 19:25, Kevin O'Connor ha scritto:
> > > I was wondering about that as well. The Intel docs state that the CPL
> >
On Wed, May 14, 2014 at 10:05:47AM +0200, Paolo Bonzini wrote:
> CPL isn't even altered when CS is reloaded, because you cannot jump out
> of ring-0 except with an inter-privilege IRET, and that reloads SS too.
>
> An IRET or task switch is also the only way to set EFLAGS.VM, and it will
> hardcod
On Wed, May 14, 2014 at 08:20:59PM -0400, Kevin O'Connor wrote:
> On Wed, May 14, 2014 at 10:05:47AM +0200, Paolo Bonzini wrote:
> > CPL isn't even altered when CS is reloaded, because you cannot jump out
> > of ring-0 except with an inter-privilege IRET, and that reloads
On Thu, May 15, 2014 at 06:56:56PM +0200, Paolo Bonzini wrote:
> CS.RPL is not equal to the CPL in the few instructions between
> setting CR0.PE and reloading CS. We get this right in the common
> case, because writes to CR0 do not modify the CPL, but it would
> not be enough if an SMI comes exact
On Thu, May 15, 2014 at 06:56:54PM +0200, Paolo Bonzini wrote:
> With the next patch, these need to be correct or VM86 tasks
> have the wrong CPL. The flags are basically what the Intel VMX
> documentation say is mandatory for entry into a VM86 guest.
>
> For consistency, SMM ought to have the sa
().
Signed-off-by: Kevin O'Connor
---
target-i386/seg_helper.c | 11 ++-
1 file changed, 6 insertions(+), 5 deletions(-)
diff --git a/target-i386/seg_helper.c b/target-i386/seg_helper.c
index 3cf862e..cc7eadf 100644
--- a/target-i386/seg_helper.c
+++ b/target-i386/seg_helper.c
@@ -558,6 +
On Fri, May 16, 2014 at 09:59:25PM +0200, Paolo Bonzini wrote:
> CS.RPL is not equal to the CPL in the few instructions between
> setting CR0.PE and reloading CS. We get this right in the common
> case, because writes to CR0 do not modify the CPL, but it would
> not be enough if an SMI comes exact
On Wed, May 21, 2014 at 01:13:21PM +0200, Paolo Bonzini wrote:
> Il 20/05/2014 23:54, Kevin O'Connor ha scritto:
> >On Fri, May 16, 2014 at 09:59:25PM +0200, Paolo Bonzini wrote:
> >>CS.RPL is not equal to the CPL in the few instructions between
> >>setting CR0.P
On Wed, May 21, 2014 at 04:18:22PM +0200, Paolo Bonzini wrote:
> Il 21/05/2014 16:05, Kevin O'Connor ha scritto:
> >On Wed, May 21, 2014 at 01:13:21PM +0200, Paolo Bonzini wrote:
> >>I cannot reproduce this. I can see the breakage with current master, and I
> >>c
On Mon, Dec 19, 2011 at 12:02:59PM -0600, Anthony Liguori wrote:
> We really need to update SeaBIOS whenever there is a bug that we
> know requires an update. Things breakdown because of one or more of
> the following reasons:
>
> 1) User submits a patch to seabios@, Kevin applies it. But that
>
On Wed, Dec 21, 2011 at 08:35:16AM -0600, Anthony Liguori wrote:
> On 12/21/2011 07:35 AM, Paolo Bonzini wrote:
> >What's the need for "Type"? You can use simply the TypeImpl * and drop
> >type_get_instance. Outside object.h it can be an opaque pointer.
>
> It's a bit nicer for type_register to re
On Thu, Dec 22, 2011 at 11:41:08AM -0600, Anthony Liguori wrote:
> On 12/22/2011 11:25 AM, Kevin O'Connor wrote:
> >On Wed, Dec 21, 2011 at 08:35:16AM -0600, Anthony Liguori wrote:
> >>I used a symbolic type name to avoid the problem of dependencies.
> >>In order
On Wed, Dec 28, 2011 at 06:26:05PM +1300, Alexey Korolev wrote:
> This patch adds PCI_REGION_TYPE_PREFMEM_64 region type and modifies types of
> variables to make it possible to work with 64 bit addresses.
>
> Why I've added just one region type PCI_REGION_TYPE_PREFMEM_64 and haven't
> added PCI_R
On Wed, Dec 28, 2011 at 01:43:02PM +0200, Michael S. Tsirkin wrote:
> On Wed, Dec 28, 2011 at 06:35:55PM +1300, Alexey Korolev wrote:
> > All devices behind a bridge need to have all their regions consecutive and
> > not overlapping with all the normal memory ranges.
> > Since prefetchable memory i
On Thu, Dec 29, 2011 at 06:00:04PM +1300, Alexey Korolev wrote:
> On 29/12/11 15:56, Kevin O'Connor wrote:
> >On Wed, Dec 28, 2011 at 06:26:05PM +1300, Alexey Korolev wrote:
> >>--- a/src/pciinit.c
> >>+++ b/src/pciinit.c
> >>@@ -22,6 +22,7 @@ enum pci_r
On Fri, Dec 30, 2011 at 06:10:13PM +1300, Alexey Korolev wrote:
> On 30/12/11 05:21, Michael S. Tsirkin wrote:
> >On Thu, Dec 29, 2011 at 06:41:36PM +1300, Alexey Korolev wrote:
> >>>Can't figure this out. What does this do?
> >>Bios will panic if it founds prefmem BARs in both 32bit and 64bit area
On Thu, Dec 29, 2011 at 06:41:36PM +1300, Alexey Korolev wrote:
> On 29/12/11 00:43, Michael S. Tsirkin wrote:
> >On Wed, Dec 28, 2011 at 06:35:55PM +1300, Alexey Korolev wrote:
> >>All devices behind a bridge need to have all their regions consecutive and
> >>not overlapping with all the normal me
On Tue, Jan 03, 2012 at 04:14:58PM +0100, Gerd Hoffmann wrote:
> On 12/29/11 03:56, Kevin O'Connor wrote:
> > Tracking of 64bit prefmem sections separately from
> > regular prefmem sections doesn't make sense, because both need to be
> > allocated from the same pool
On Wed, Jan 04, 2012 at 07:02:34PM +0100, Gerhard Wiesinger wrote:
> Hello,
>
> I'm having the following boot order problem using an SCSI option ROM:
>
> Command line:
> /root/download/qemu/git/qemu-kvm/x86_64-softmmu/qemu-system-x86_64
> -drive file=1.img,media=disk,if=scsi,bus=0,unit=0
> -drive
On Thu, Jan 05, 2012 at 08:39:15AM +0100, Gerhard Wiesinger wrote:
> BTW: I didn't get any answer to the following thread:
> https://lists.gnu.org/archive/html/qemu-devel/2011-11/msg00602.html
Odd - that email never made it to my inbox. Anyway, Gerd reported a
similar issue to the SeaBIOS mailing
On Thu, Jan 05, 2012 at 11:20:37AM +0200, Gleb Natapov wrote:
> On Thu, Jan 05, 2012 at 10:09:44AM +0100, Gerhard Wiesinger wrote:
> > But as far as I remember therefore the option ROM registers through
> > BIOS for INT 19h booting. So Seabios should know it that this is a
> > harddisk.
> It regist
On Fri, Jan 06, 2012 at 07:27:25AM +0200, Gleb Natapov wrote:
> On Thu, Jan 05, 2012 at 09:05:39PM -0500, Kevin O'Connor wrote:
> > SeaBIOS could probably fall back to the harddrive priority if it finds
> > a BCV without an explicit bootindex priority.
> The same option rom
On Sat, Jan 07, 2012 at 09:35:55AM +0100, Gerhard Wiesinger wrote:
[...]
> 5. Legacy option rom
> 6. DVD/CD [ata1-0: QEMU DVD-ROM ATAPI-4 DVD/CD]
> 7. iPXE (PCI 00:00.0)
>
> But there is still the iPXE ROM there (I think I didn't see iPXE
> because it is last one displayed and boot screen is fast
On Sat, Jan 07, 2012 at 10:00:56AM +0100, Gerhard Wiesinger wrote:
> On Fri, 6 Jan 2012, Kevin O'Connor wrote:
> >I'm not sure what a SCSI rom would do with a CD drive. My guess is
> >that it wouldn't map it to a BIOS visible drive id at all, as there's
On Sat, Jan 07, 2012 at 11:47:29PM +0100, Gerhard Wiesinger wrote:
> On Sat, 7 Jan 2012, Kevin O'Connor wrote:
> >I downloaded 8xx_64.rom and tried the above command line.
> >Interestingly, it will register a BEV for a CD drive - which confirms
> >my suspicion tha
On Sun, Jan 08, 2012 at 10:31:05AM +0200, Gleb Natapov wrote:
> On Sat, Jan 07, 2012 at 11:28:44AM -0500, Kevin O'Connor wrote:
> > I downloaded 8xx_64.rom and tried the above command line.
> > Interestingly, it will register a BEV for a CD drive - which confirms
> > my
On Sun, Jan 08, 2012 at 05:17:45PM +0200, Gleb Natapov wrote:
> On Sun, Jan 08, 2012 at 09:58:53AM -0500, Kevin O'Connor wrote:
> > On Sun, Jan 08, 2012 at 10:31:05AM +0200, Gleb Natapov wrote:
> > > Cool! What about non pnp roms that also register bcv? Should we use HD
&
On Fri, Jan 13, 2012 at 12:11:30PM +0100, Vasilis Liaskovitis wrote:
>
> Signed-off-by: Vasilis Liaskovitis
The SeaBIOS change is okay with me, but the qemu/kvm change needs to
be accepted first.
[...]
> Method (CPEJ, 2, NotSerialized) {
> // _EJ0 method - eject callback
>
On Thu, Jan 19, 2012 at 03:02:30PM +0100, Vasilis Liaskovitis wrote:
> On Fri, Jan 13, 2012 at 07:27:01PM -0500, Kevin O'Connor wrote:
> >
> > [...]
> > > Method (CPEJ, 2, NotSerialized) {
> > > // _EJ0 method - eject callback
> >
On Thu, Jan 19, 2012 at 06:57:59AM -0600, Dyweni - Qemu-Devel wrote:
> Hi,
>
> I am unable to boot KVM using a usb flash drive. I'm using QEMU-KVM
> built
> from GIT MASTER as of this morning.
>
>
> Here's my QEMU-KVM startup options:
>
> qemu-system-x86_64 \
> -curses \
> -m 512 \
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