or now.
Some filters union and application to the SocketCAN
can be usesfull for future. But separation of CAN
bus model out of chardev and or vlan allows to
implement CAN specific things more easily.
Best wishes,
Pavel
--
Pavel Pisa
e-mail: p...@cmp.fel
Signed-off-by: Pavel Pisa
---
hw/net/Makefile.objs| 1 +
hw/net/can_kvaser_pci.c | 355
2 files changed, 356 insertions(+)
create mode 100644 hw/net/can_kvaser_pci.c
diff --git a/hw/net/Makefile.objs b/hw/net/Makefile.objs
index 28679fc
in the next post. Even that
it is one of potential users, original "investor",
internals of the emulation are out of this project
scope.
On Monday 12 of May 2014 11:18:09 Andreas Färber wrote:
> Am 12.05.2014 11:01, schrieb Peter Crosthwaite:
> > On Sat, May 10, 2014 at 4:14 AM
Hello Stefan,
On Friday 23 of May 2014 11:42:25 Stefan Hajnoczi wrote:
> On Thu, May 15, 2014 at 03:53:07PM +0200, Pavel Pisa wrote:
> > The decisions for further development
> >
> > Should be minimal working solution included in the QEMU
> > mainline in short term?
&g
that one big carmaker in cooperation with one
big chip maker has full CAN controller and network model including
bit-timing implemented. But I do not know more and it is possible
that their implementation is to complex for reuse in QEMU (and probly
even not publicable).
But we should disc
Hello Andreas and others,
On Sunday 19 May 2013 20:23:55 Andreas Färber wrote:
> Am 18.05.2013 20:24, schrieb Rempel, Cynthia:
> >>> The RTEMS development community is considering having a Google Summer
> >>> of Code student test LinCAN on a simulated RTEMS target board using
> >>> QEMU, and have
ps://devel.rtems.org/wiki/Developer/Simulators/QEMU/CANEmulation
Relevant commits
commit 2d873a9ed3bcb8301a247f36b77227b1cd9211c0
Author: Pavel Pisa
Date: Mon Sep 7 15:24:56 2015 +0200
CAN bus simple SJA1000 PCI card emulation for QEMU
The work is based on Jin Yang GSoC 2013 work fund
I prefer minimal setup with
self compilled bysybox in initramfs and the mapping of some
development directories through virtfs into system.
If you plan to visit FOSDEM 2023, we can meet there in person
at RISC-V devroom and I want to take tour for automotive and other
areas. Another chance is Em
There is tracing support with --trace "*mcp25*"
>
> Signed-off-by: Ben Dooks
> Co-developed-by: Nazar Kazakov
> Signed-off-by: Nazar Kazakov
> Co-developed-by: Lawrence Hunter
> Signed-off-by: Lawrence Hunter
> Reviewed-by: Frank Chang
Tested-by: Pavel P
does not provide
right SPI emulation as you have noticed, what about BeagleBoneBlack?
Does it support SPI? It could be good target to test that mcp25625
chip emulation is portable..
Best wishes,
Pavel
--
Pavel Pisa
phone: +420 603531357
e-mail: p...@cmp.fe
itial ramdisk to test QEMU
and kernel from it.
On Monday 17 of January 2022 17:31:32 Pavel Pisa wrote:
> If you can reach shell prompt in the target system
> you should check that Kvaser CAN controller is seen
> on PCI bus.
>
> Try
>
> lspci -nn
>
> You should see t
including some short netion of QEMU integration
https://can-newsletter.org/uploads/media/raw/a9abe317ae034be55d99fee4410ad70e.pdf
I hope I wind some time for CAN in QEMU, RTEMS and Linux ongoing projects,
but I need to finish some promissed project for ESA the first.
Best wishes,
net/can/can_sja1000.c
> @@ -431,7 +431,7 @@ void can_sja_mem_write(CanSJA1000State *s, hwaddr addr,
> uint64_t val, (unsigned long long)val, (unsigned int)addr);
>
> if (addr > CAN_SJA_MEM_SIZE) {
> -return ;
> +return;
> }
>
> if (s->clock
{
> is_canfd_frame = true;
>
> /* Store dlc value in Xilinx specific format. */
Reviewed-by: Pavel Pisa
That is a great catch, I have overlooked this in previous
review of the Xilinx code.
When I look into hw/net/can/xlnx-versal-canfd.c functions
regs2f
ree time which
should have at least some maintainership backup by somebody
who intend to use the project in frame of company or some
automotive consortium. I know that there are big money flowing
on base of these activities.
Best wishes,
Pavel Pisa
phone: +420 603531
ishes,
Pavel
--
Pavel Pisa
phone: +420 603531357
e-mail: p...@cmp.felk.cvut.cz
Department of Control Engineering FEE CVUT
Karlovo namesti 13, 121 35, Prague 2
university: http://control.fel.cvut.cz/
personal: http://cmp.felk.cvut.c
applying it, resulting in the IRQ never being delivered.
>
> Signed-off-by: Doug Brown
> Reviewed-by: Francisco Iglesias
Reviewed-by: Pavel Pisa
--
Pavel Pisa
phone: +420 603531357
e-mail: p...@cmp.felk.cvut.cz
Department of Control Engineering
Brown
> Reviewed-by: Pavel Pisa
> Reviewed-by: Francisco Iglesias
Reviewed-by: Pavel Pisa
--
Pavel Pisa
phone: +420 603531357
e-mail: p...@cmp.felk.cvut.cz
Department of Control Engineering FEE CVUT
Karlovo namesti 13, 121 35, Pra
me for all of its ID registers. Correct this problem for
> both RX and TX, including RX filtering.
>
> Signed-off-by: Doug Brown
> Reviewed-by: Francisco Iglesias
Acked-by: Pavel Pisa
--
Pavel Pisa
phone: +420 603531357
e-mail: p...@cmp.felk.cvut
o it's only implemented for the receive case.
>
> Signed-off-by: Doug Brown
Reviewed-by: Pavel Pisa
--
Pavel Pisa
phone: +420 603531357
e-mail: p...@cmp.felk.cvut.cz
Department of Control Engineering FEE CVUT
Karlovo namesti 13, 121
TX and RX code to put the data in the correct order.
>
> Signed-off-by: Doug Brown
> Reviewed-by: Francisco Iglesias
Acked-by: Pavel Pisa
--
Pavel Pisa
phone: +420 603531357
e-mail: p...@cmp.felk.cvut.cz
Department of Control Engineering FEE CVUT
DLC of 0-8, which was broken previously.
>
> Signed-off-by: Doug Brown
Reviewed-by: Pavel Pisa
--
Pavel Pisa
phone: +420 603531357
e-mail: p...@cmp.felk.cvut.cz
Department of Control Engineering FEE CVUT
Karlovo namesti 13, 121 35, Prague
per analysis
if no other looks into the whole code.
Best wishes,
Pavel
--
Pavel Pisa
phone: +420 603531357
e-mail: p...@cmp.felk.cvut.cz
Department of Control Engineering FEE CVUT
Karlovo namesti 13, 121 35, Prague 2
university: http://con
QtRvSim – RISC-V Simulator for Computer Architectures
Classes, June 21, 2022 Session 10.3 – System-on-Chip (SoC)
Design RISC-V Development (16:00 - 16:30) at Embedded World
Conference. Our toy there https://github.com/cvut/qtrvsim
Best wishes,
Pavel Pisa
phone: +420 603531357
Signed-off-by: Pavel Pisa
---
docs/system/devices/can.rst | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/docs/system/devices/can.rst b/docs/system/devices/can.rst
index 16d72c3ac3..fe37af8223 100644
--- a/docs/system/devices/can.rst
+++ b/docs/system/devices/can.rst
On Wednesday 03 of January 2024 18:28:17 Samuel Tardieu wrote:
> If "busses" might be encountered as a plural of "bus" (5 instances),
> the correct spelling is "buses" (26 instances). Fixing those 5
> instances makes the doc more consistent.
>
> Sign
From: Pavel Pisa
A CAN sja1000 standard frame filter mask has been computed and applied
incorrectly for standard frames when single Acceptance Filter Mode
(MOD_AFM = 1) has been selected. The problem has not been found
by Linux kernel testing because it uses dual filter mode (MOD_AFM = 0)
and
From: Pavel Pisa
A CAN sja1000 standard frame filter mask has been computed and applied
incorrectly for standard frames when single Acceptance Filter Mode
(MOD_AFM = 1) has been selected. The problem has not been found
by Linux kernel testing because it uses dual filter mode (MOD_AFM = 0)
and
changed, 1 insertion(+)
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index cce6feff35..48d45b958f 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -2606,6 +2606,7 @@ W: https://canbus.pages.fel.cvut.cz/
> F: net/can/*
> F: hw/net/can/*
> F: include/net/can_*.h
> +F
Hello Deniz,
thanks much for contribution and testing.
I have applied your patches to our QEMU
repo
https://github.com/CTU-IIG/qemu
You find QEMU-2.6.1 based version of our merged
patches on "merged-2.6" branch.
I have updated and shortly tested all our topic branches
with actual QEMU-2.7.0
Hello Philippe,
On Monday 22 of January 2018 12:35:33 Philippe Mathieu-Daudé wrote:
> Hi Pavel,
>
> On 01/14/2018 05:14 PM, p...@cmp.felk.cvut.cz wrote:
>
> I think your series is quite ready to get accepted, although I'm not
> sure through with tree it will goes.
>
> Most of my review comments ar
Hello everybody,
On Tuesday 23 of January 2018 22:42:31 Pavel Pisa wrote:
> When Linux specific object file is linked in then some local
> function needs to be called before QOM instances population.
> I know how to do that GCC specific/non-portable way
>
> static void __attribute
Hello Philippe,
On Wednesday 24 of January 2018 22:41:16 Philippe Mathieu-Daudé wrote:
> Hi Pavel,
> > I have seen that a few other type_init-s do more
> > than simple sequence of type_register_static().
> > Is it acceptable to use type_init for registration
> > to CAN core by function call for no
. Contributions/suggestions from other
are welcomed. I can look for students for GSoC at our university
or under other funding.
On Thursday 25 of January 2018 14:58:41 Paolo Bonzini wrote:
> On 23/01/2018 22:42, Pavel Pisa wrote:
> > Do you think QOM based? I would like it to be implemented
> >
Hello Paolo,
On Friday 26 of January 2018 12:12:32 Paolo Bonzini wrote:
> Coincidentially, I have some time on a flight next Monday. :) I
> obviously cannot really _test_ anything, but I can at least do the
> changes below and set up all the QOM boilerplate.
thanks much for offer to help.
Deniz
Hello Paolo,
thanks much for conversion to acceptable QOM model.
On Tuesday 30 of January 2018 15:15:22 Paolo Bonzini wrote:
> On 25/01/2018 22:33, Pavel Pisa wrote:
> > Hello Paolo,
> >
> > thanks for suggestions. I understand and fully agree with your
> > reque
Hello Konrad,
thanks for review.
On Friday 12 of January 2018 11:43:18 KONRAD Frederic wrote:
> You should add that to the title as well:
>
> git format-patch ... --subject-prefix="PATCH V3" ...
>
> to avoid any confusion.
OK, I add V4.
> You need to run the ./scripts/checkpatch.pl on your patc
wrote:
> Hi Pavel,
>
> I'm CC'ing the QEMU Sockets maintainer to ask them a quick review of the
> socket part.
>
> On 01/14/2018 05:14 PM, p...@cmp.felk.cvut.cz wrote:
> > From: Pavel Pisa
> Please move those checks out of the function, to call them on
Hello Philippe,
On Tuesday 16 of January 2018 01:12:09 Philippe Mathieu-Daudé wrote:
> On 01/15/2018 06:29 PM, Pavel Pisa wrote:
> > Hello Philippe,
> >
> > thanks for review.
> >
> > I have updated patch series in can-pci branch in
> >
> >
Hello Philippe,
On Friday 19 of January 2018 13:38:11 Philippe Mathieu-Daudé wrote:
> On 01/14/2018 05:14 PM, p...@cmp.felk.cvut.cz wrote:
> > From: Pavel Pisa
> >
> > +extern int (*can_bus_connect_to_host_variant)(CanBusState *bus,
> > +
Hello Philippe,
On Friday 19 of January 2018 13:38:11 Philippe Mathieu-Daudé wrote:
> > diff --git a/hw/can/Makefile.objs b/hw/can/Makefile.objs
> > new file mode 100644
> > index 00..1028d7c455
> > --- /dev/null
> > +++ b/hw/can/Makefile.objs
> > @@ -0,0 +1,6 @@
> > +# CAN bus interfaces
d series.
If review leads to need update whole series, I merge
this to previous one before posting.
Thanks much for your time,
Pavel
> On 10/25/2017 01:29 AM, p...@cmp.felk.cvut.cz wrote:
> > From: Deniz Eren
> >
> > Signed-off-by: Pavel Pisa
> > ---
> > hw/can/c
Hello Fred,
thanks much for review and remarks.
On Friday 27 of October 2017 16:18:31 KONRAD Frederic wrote:
> Hi Pavel,
>
> On 10/25/2017 01:12 AM, p...@cmp.felk.cvut.cz wrote:
> > From: Pavel Pisa
> >
> > The work is based on Jin Yang GSoC 2013 work funded
> >
Hello all,
On Friday 06 of January 2017 00:22:28 no-re...@patchew.org wrote:
> Hi,
>
> Your series seems to have some coding style problems. See output below for
> more information:
>
> Message-id: cover.1483655893.git.p...@cmp.felk.cvut.cz
> Subject: [Qemu-devel] [PATCH 0/6] CAN bus support for Q
Hello Marek and Konrad,
On Monday 30 of October 2017 12:38:12 KONRAD Frederic wrote:
> On 10/30/2017 11:51 AM, Marek Vasut wrote:
> > On 10/30/2017 10:19 AM, KONRAD Frederic wrote:
> >
> > [...]
> >
> >>> CAN bus MIOe-3680 PCI (dual SJA1000 channel) emulation added.
> >>> hw/can/can_mioe3680_p
Hello Philippe,
On Thursday 02 of November 2017 02:27:18 Philippe Mathieu-Daudé wrote:
> On 11/01/2017 10:00 PM, p...@cmp.felk.cvut.cz wrote:
> > Some page about the project
> >
> > https://gitlab.fel.cvut.cz/canbus/qemu-canbus/wikis/home
> >
> > FEE CTU GitLab repository with can-pci branch for
Hello Oleksij and Philippe,
I have found some time to update QEMU CAN
patch series and test it with actual QEMU master.
As QEMU 2.11 is realeased now, I hope that
it is time to disscuss integration of initial/simple
CAN bus emulation now.
The actual version can be found on branch
can-pci in our
Hello Thomas,
thanks for report but I at this time I am and
can be some time in condition which does not allow
me to access e-mail and normal work
On Tuesday 06 of March 2018 16:29:19 Thomas Huth wrote:
> On 14.01.2018 21:14, p...@cmp.felk.cvut.cz wrote:
> > From: Pavel Pisa
> >
hrough */
> > case 11 ... 19:
> > if ((s->control & 0x01) == 0) { /* Operation mode */
> > s->tx_buff[addr - 10] = val; /* Store to TX buffer
> > directly. */
>
> cc: Pavel Pisa
>
> Reviewed-by: Laurent Vivi
me MIPS based system, if the check result is important.
But it would worth to have even real HW to compare real programmed
PCIe card behavior and I do not pose Linux capable big endian systems.
I have some safety based Cortex-R big endian ARMS there, but they do not
have PCIe and QEMU support.
Thanks
; The core is mapped to PCIe card same as on one of its real hardware
> adaptations. The device implementing two CTU CAN FD ip cores
> is instantiated after CAN bus definition
>
> -object can-bus,id=canbus0-bus
>
> by QEMU parameters
>
> -device ctucan_pci,canbus0=c
Hello Eduardo,
On Friday 09 of October 2020 18:01:16 Eduardo Habkost wrote:
> Instance properties make introspection hard and are not shown by
> "-object ...,help". Convert them to class properties.
>
> Signed-off-by: Eduardo Habkost
> ---
> Cc: Pavel Pisa
>
Problem reported by openEuler fuzz-sig group.
The buff2frame_bas function (hw\net\can\can_sja1000.c)
infoleak(qemu5.x~qemu6.x) or stack-overflow(qemu 4.x).
Reported-by: Qiang Ning
Signed-off-by: Pavel Pisa
---
hw/net/can/can_sja1000.c | 4
1 file changed, 4 insertions(+)
diff --git a/hw
Hello everybody,
please, can somebody accept the fix for master?
It should be ideally applied even to stable
branches.
Or should I send request through some other form
then on the list?
Thanks,
Pavel
On Monday 26 of July 2021 18:24:58 Pavel Pisa wrote:
> Problem reported by openEuler fuzz-
ee.
I can try to find how to build required fuzz test or fuzz
team has some code availabe, may it be in the required form.
But the fix is from SJA1000 CAN frame/chip definition.
> > On Monday 26 of July 2021 18:24:58 Pavel Pisa wrote:
> >> Problem reported by openEuler fuzz-sig gro
Problem reported by openEuler fuzz-sig group.
The buff2frame_bas function (hw\net\can\can_sja1000.c)
infoleak(qemu5.x~qemu6.x) or stack-overflow(qemu 4.x).
Reported-by: Qiang Ning
Signed-off-by: Pavel Pisa
---
hw/net/can/can_sja1000.c | 8
1 file changed, 8 insertions(+)
diff --git
From: Jan Charvat
Signed-off-by: Jan Charvat
Signed-off-by: Pavel Pisa
Reviewed-by: Vikram Garhwal
---
hw/net/can/can_sja1000.c | 2 ++
include/net/can_emu.h| 8 ++-
net/can/can_socketcan.c | 47 +---
3 files changed, 53 insertions(+), 4
Jan Charvat (5):
net/can: Initial host SocketCan support for CAN FD.
hw/net/can: sja1000 ignore CAN FD frames
net/can: Add can_dlc2len and can_len2dlc for CAN FD.
hw/net/can/ctucafd: Add CTU CAN FD core register definitions.
hw/net/can: CTU CAN FD IP open hardware core emulation.
Pavel Pi
From: Jan Charvat
Signed-off-by: Jan Charvat
Signed-off-by: Pavel Pisa
Reviewed-by: Vikram Garhwal
---
include/net/can_emu.h | 4
net/can/can_core.c| 36
2 files changed, 40 insertions(+)
diff --git a/include/net/can_emu.h b/include/net
From: Jan Charvat
Signed-off-by: Jan Charvat
Signed-off-by: Pavel Pisa
Reviewed-by: Vikram Garhwal
---
hw/net/can/can_sja1000.c | 29 +++--
1 file changed, 23 insertions(+), 6 deletions(-)
diff --git a/hw/net/can/can_sja1000.c b/hw/net/can/can_sja1000.c
index
implementation.
Signed-off-by: Jan Charvat
Signed-off-by: Pavel Pisa
---
hw/net/can/ctu_can_fd_frame.h | 189 +++
hw/net/can/ctu_can_fd_regs.h | 971 ++
2 files changed, 1160 insertions(+)
create mode 100644 hw/net/can/ctu_can_fd_frame.h
create mode 100644 hw/net/can
The original CAN_PCI config option enables multiple SJA1000 PCI boards
emulation build. These boards bridge SJA1000 into I/O or memory
address space of the host CPU and depend on SJA1000 emulation.
Signed-off-by: Pavel Pisa
---
hw/net/Kconfig | 7 +++
1 file changed, 3 insertions(+), 4
Updated MAINTAINERS for CAN bus related emulation as well.
Signed-off-by: Pavel Pisa
---
MAINTAINERS | 9
docs/can.txt | 113 ++-
2 files changed, 111 insertions(+), 11 deletions(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index cf96fa8379
-bus
by QEMU parameters
-device ctucan_pci,canbus0=canbus0-bus,canbus1=canbus0-bus
Signed-off-by: Jan Charvat
Signed-off-by: Pavel Pisa
---
hw/net/Kconfig | 11 +
hw/net/can/ctucan_core.c | 696 +++
hw/net/can/ctucan_core.h | 127 +++
hw
Hello Paolo,
On Wednesday 23 of September 2020 17:48:09 Paolo Bonzini wrote:
> On 03/09/20 23:48, Pavel Pisa wrote:
> > The original CAN_PCI config option enables multiple SJA1000 PCI boards
> > emulation build. These boards bridge SJA1000 into I/O or memory
> > address spac
Hello Paolo,
On Wednesday 23 of September 2020 20:11:08 Paolo Bonzini wrote:
> On 23/09/20 19:44, Pavel Pisa wrote:
> > If you have not pushed code to the mainline yet,
> > consider v3 which should follow better actual
> > mainline state. The list of updates to v3 follows.
DKMS.
Unfortunately, it is not supported by mainline Linux kernel
yet, review process takes time and responsible maintainer
have not found time yet so we do our best to update
patches on base of others reviews and friends comments.
Best wishes,
Pavel Pisa
e-mail: p...@cm
*s, hwaddr addr,
> uint64_t val, DPRINTF("write 0x%02llx addr 0x%02x\n",
> (unsigned long long)val, (unsigned int)addr);
>
> -if (addr > CTUCAN_CORE_MEM_SIZE) {
> +if (addr >= CTUCAN_CORE_MEM_SIZE) {
> return;
> }
Acked-by: Pavel Pi
Hello Peter,
this one is a little problematic. I understand that you want
to have clean code and no warnings reports from coverity.
On Friday 06 of November 2020 18:11:51 Peter Maydell wrote:
> Coverity points out that in ctucan_send_ready_buffers() we
> set buff_st_mask = 0xf << (i * 4) inside t
_buffer[buff_num].data +
> addr); -*bufp = cpu_to_le32(val);
> +stl_le_p(s->tx_buffer[buff_num].data + addr, val);
> }
> } else {
> switch (addr & ~3) {
Acked-by: Pavel Pisa
even that I do not like stl_le_p name, because it dif
Hello Peter,
On Friday 06 of November 2020 19:04:38 Peter Maydell wrote:
> On Fri, 6 Nov 2020 at 17:48, Pavel Pisa wrote:
> > Hello Peter,
> >
> > thanks much for the catching the problem and investing time into
> > fixing. I hope to find time for more review of rem
On Friday 06 of November 2020 19:29:27 Philippe Mathieu-Daudé wrote:
> On 11/6/20 6:11 PM, Peter Maydell wrote:
> > The ctucan driver defines types for its registers which are a union
> > of a uint32_t with a struct with bitfields for the individual
> > fields within that register. This is a bad id
Thanks for catching missing test
On Thursday 08 of October 2020 22:27:12 Eduardo Habkost wrote:
> Fix the following crash:
>
> $ qemu-system-x86_64 -object can-host-socketcan,id=obj0
> Segmentation fault (core dumped)
>
> Signed-off-by: Eduardo Habkost
> ---
> Cc:
Hello Peter,
On Tuesday 10 of November 2020 18:06:01 Peter Maydell wrote:
> The ctucan device has 4 CAN bus cores, each of which has a set of 20
> 32-bit registers for writing the transmitted data. The registers are
> however not contiguous; each core's buffers is 0x100 bytes after
> the last.
>
>
ell
> Reviewed-by: Philippe Mathieu-Daudé
> Acked-by: Pavel Pisa
> ---
> hw/net/can/ctucan_core.c | 3 +--
> 1 file changed, 1 insertion(+), 2 deletions(-)
>
> diff --git a/hw/net/can/ctucan_core.c b/hw/net/can/ctucan_core.c
> index a400ad13a43..0ef528eb879 100644
> ---
s word unaligned reads
are not supported. Again no reason for them now.
You can add
Tested-by: Pavel Pisa
to whole series.
Thanks,
Pavel
ctucan_core.h
> +++ b/hw/net/can/ctucan_core.h
> @@ -31,8 +31,7 @@
> #include "exec/hwaddr.h"
> #include "net/can_emu.h"
>
> -
> -#ifndef __LITTLE_ENDIAN_BITFIELD
> +#ifndef HOST_WORDS_BIGENDIAN
> #define __LITTLE_ENDIAN_BITFIELD 1
> #endif
Acked-by: Pavel Pisa
Thanks,
Pavel
buff_st = TXT_RDY;
I would prefer to add there next line even that it has no real effect
+ s->tx_status.u32 = deposit32(s->tx_status.u32,
+ buff2tx_idx * 4, 4, TXT_RDY);
But if it generates warning or you have some other reason not to
hose values to be changed in future (in hardware they are
configurable synthesis parameters).
Fix the top level check, and check the offset is within the buffer.
Fixes: Coverity CID 1432874
Signed-off-by: Peter Maydell
Signed-off-by: Pavel Pisa
Tested-by: Pavel Pisa
---
hw/net/can/ctucan_core.
1,
to allow for future adjustment of #defines that correspond to
h/w synthesis parameters.
Changes v2->v3: minnor corrections of range checking,
support for unaligned and partial word writes into Tx
buffers. Tested on x86_64 guest on x86_64 host and bige-edian
MIPS guest on x86_64 host Pavel Pi
fixed constant value, and collapse the only
remaining set/use of buff_st down into an extract32().
Fixes: Coverity CID 1432869
Signed-off-by: Peter Maydell
Acked-by: Pavel Pisa
Tested-by: Pavel Pisa
---
hw/net/can/ctucan_core.c | 15 +++
1 file changed, 3 insertions(+), 12 del
need
for a "have we defined it already" guard, because the only place
that should set it is ctucan_core.h, which has the usual
double-inclusion guard.
Signed-off-by: Peter Maydell
Reviewed-by: Philippe Mathieu-Daudé
Acked-by: Pavel Pisa
Tested-by: Pavel Pisa
---
hw/net/can/ctucan_co
ring you to repeat the testing.
OK, I have tried to send it with your authorship and my
Signed-of-by at these patches which I have slightly
modified and with Acked-by of these which should stay
exactly same. If you prefer another style, send me a hint.
Thanks much to help us to make our code better,
Pavel Pisa
From: Peter Maydell
Instead of casting an address within a uint8_t array to a
uint32_t*, use stl_le_p(). This handles possibly misaligned
addresses which would otherwise crash on some hosts.
Signed-off-by: Peter Maydell
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Pavel Pisa
Tested-by
---
> This was originally submitted as part of the series:
> Subject: [PATCH 00/12] qom: Make all -object types use only class
> properties Message-Id: <20201009160122.1662082-1-ehabk...@redhat.com>
> https://lore.kernel.org/qemu-devel/20201009160122.1662082-1-ehabkost@redhat
>.
Hello Vikram,
thanks much for the patches review.
On Tuesday 01 of September 2020 22:01:26 Vikram Garhwal wrote:
> Hi Jan,
> A couple of comments on this patch.
>
> On Tue, Jul 14, 2020 at 02:20:14PM +0200, p...@cmp.felk.cvut.cz wrote:
> > From: Jan Charvat
> > @@ -185,13 +204,34 @@ static void
Hello Vikram,
On Thursday 03 of September 2020 07:43:34 Vikram Garhwal wrote:
> On Tue, Jul 14, 2020 at 02:20:16PM +0200, p...@cmp.felk.cvut.cz wrote:
> Hi Pavel,
>
> > From: Jan Charvat
> >
> > Signed-off-by: Jan Charvat
> > Signed-off-by: Pavel Pisa
> &
From: Jan Charvat
Signed-off-by: Jan Charvat
Signed-off-by: Pavel Pisa
Reviewed-by: Vikram Garhwal
---
hw/net/can/can_sja1000.c | 29 +++--
1 file changed, 23 insertions(+), 6 deletions(-)
diff --git a/hw/net/can/can_sja1000.c b/hw/net/can/can_sja1000.c
index
From: Jan Charvat
Signed-off-by: Jan Charvat
Signed-off-by: Pavel Pisa
Reviewed-by: Vikram Garhwal
---
include/net/can_emu.h | 4
net/can/can_core.c| 36
2 files changed, 40 insertions(+)
diff --git a/include/net/can_emu.h b/include/net
-bus
by QEMU parameters
-device ctucan_pci,canbus0=canbus0-bus,canbus1=canbus0-bus
Signed-off-by: Jan Charvat
Signed-off-by: Pavel Pisa
---
hw/net/Kconfig | 11 +
hw/net/can/ctucan_core.c | 696 +++
hw/net/can/ctucan_core.h | 127 +++
hw
Updated MAINTAINERS for CAN bus related emulation as well.
Signed-off-by: Pavel Pisa
---
MAINTAINERS | 9
docs/can.txt | 113 ++-
2 files changed, 111 insertions(+), 11 deletions(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index b233da2a73
From: Jan Charvat
Signed-off-by: Jan Charvat
Signed-off-by: Pavel Pisa
Reviewed-by: Vikram Garhwal
---
hw/net/can/can_sja1000.c | 2 ++
include/net/can_emu.h| 8 ++-
net/can/can_socketcan.c | 47 +---
3 files changed, 53 insertions(+), 4
implementation.
Signed-off-by: Jan Charvat
Signed-off-by: Pavel Pisa
---
hw/net/can/ctu_can_fd_frame.h | 189 +++
hw/net/can/ctu_can_fd_regs.h | 971 ++
2 files changed, 1160 insertions(+)
create mode 100644 hw/net/can/ctu_can_fd_frame.h
create mode 100644 hw/net/can
The original CAN_PCI config option enables multiple SJA1000 PCI boards
emulation build. These boards bridge SJA1000 into I/O or memory
address space of the host CPU and depend on SJA1000 emulation.
Signed-off-by: Pavel Pisa
---
hw/net/Kconfig | 7 +++
1 file changed, 3 insertions(+), 4
Hello everybody,
On Thursday 03 of September 2020 23:37:17 p...@cmp.felk.cvut.cz wrote:
> From: Pavel Pisa
>
> CTU CAN FD is an open source soft core written in VHDL.
> It originated in 2015 as Ondrej Ille's project at the
> Department of Measurement of FEE at CTU.
It seems
gt; Signed-off-by: Philippe Mathieu-Daudé
>
> Reviewed-by: Francisco Iglesias
Reviewed-by: Pavel Pisa
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