[Qemu-devel] [PATCH 2/2] arm_timer: fix oneshot mode

2010-05-02 Thread Rabin Vincent
In oneshot mode, the delta needs to come from the TimerLoad register, not the maximum limit. Signed-off-by: Rabin Vincent ra...@rab.in --- hw/arm_timer.c |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/hw/arm_timer.c b/hw/arm_timer.c index 5b6947a..9073ffc 100644

[Qemu-devel] [PATCH 1/2] arm_timer: reload timer when enabled

2010-05-02 Thread Rabin Vincent
for the first timer tick. Signed-off-by: Rabin Vincent ra...@rab.in --- hw/arm_timer.c |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/hw/arm_timer.c b/hw/arm_timer.c index 9fef191..5b6947a 100644 --- a/hw/arm_timer.c +++ b/hw/arm_timer.c @@ -113,7 +113,7 @@ static void

[Qemu-devel] Re: [PATCH 1/2] arm_timer: reload timer when enabled

2010-05-20 Thread Rabin Vincent
On Sun, May 02, 2010 at 03:20:51PM +0530, Rabin Vincent wrote: Reload the timer when TimerControl is written, if the timer is to be enabled. Otherwise, if an earlier write to TimerLoad was done while periodic mode was not set, s-delta may incorrectly still have the value of the maximum limit

[Qemu-devel] [PATCH 0/3] target-arm: Thumb(-2) exception support

2010-02-14 Thread Rabin Vincent
This series adds Thumb exception support and fixes a couple of instructions related to it. With these patches, QEMU can boot a Linux kernel built with Thumb-2. Rabin Vincent (3): target-arm: fix thumb CPS target-arm: implement Thumb-2 exception return target-arm: support thumb exception

[Qemu-devel] [PATCH 2/3] target-arm: implement Thumb-2 exception return

2010-02-14 Thread Rabin Vincent
Support the subs pc, lr Thumb-2 exception return instruction. Signed-off-by: Rabin Vincent ra...@rab.in --- target-arm/translate.c | 13 +++-- 1 files changed, 11 insertions(+), 2 deletions(-) diff --git a/target-arm/translate.c b/target-arm/translate.c index 10a516b..f0667e5 100644

[Qemu-devel] [PATCH 1/3] target-arm: fix thumb CPS

2010-02-14 Thread Rabin Vincent
The Thumb CPS currently does not work correctly: CPSID touches more bits than the instruction wants to, and CPSIE does nothing. Fix it by passing the correct mask (the affect bits) and value. Signed-off-by: Rabin Vincent ra...@rab.in --- target-arm/translate.c |2 +- 1 files changed, 1

Re: [Qemu-devel] Thumb-2 Support

2010-02-14 Thread Rabin Vincent
On Wed, Sep 23, 2009 at 02:30:01PM +0200, Crooks (Rigante) wrote: I was wondering what level of support there is for Thumb-2. (Qemu 0.11 RC2) I've compiled two linux-kernels, one with Thumb-2, and one without Thumb-2, using the codesourcery compilers. I've then tried to boot these kernels with

Re: [Qemu-devel] qemu-i386 -L / /usr/bin/perl -e 'print `perl -v`' doesn't print

2009-10-25 Thread Rabin Vincent
On Thu, Oct 22, 2009 at 10:25:59AM -0700, Jay Schulist wrote: I have an issue with perl and qemu that I'm hoping someone knows what is happening. I'm using qemu-i386 on a fedora 11 intel system and the following command fails: $ qemu-i386 -L / /usr/bin/perl -e 'print `perl -v`' [...] I am

Re: [Qemu-devel] Support for new target emulator

2009-10-27 Thread Rabin Vincent
On Fri, Oct 23, 2009 at 12:50:03PM +0200, Boyapati, Anitha wrote: We have a proposal to add support for AVR32 target emulation in Qemu. I've been working on and off on AVR32 target support for a little while now. It's still far from being complete or mergeable, but enough of the architecture

[Qemu-devel] [PATCH] target-arm: disable PAGE_EXEC for XN pages

2010-03-19 Thread Rabin Vincent
Don't set PAGE_EXEC for XN pages, to avoid a bypass of XN protection checking if the page is already in the TLB. Signed-off-by: Rabin Vincent ra...@rab.in --- target-arm/helper.c | 10 +++--- 1 files changed, 7 insertions(+), 3 deletions(-) diff --git a/target-arm/helper.c b/target-arm

[Qemu-devel] [PATCH] arm_gic: handle banked enable bits for per-cpu interrupts

2011-10-28 Thread Rabin Vincent
. To fix this, allow the enable bits to be enabled per-cpu. For SPIs, always enable/disable ALL_CPU_MASK. Cc: Peter Maydell peter.mayd...@linaro.org Signed-off-by: Rabin Vincent ra...@rab.in --- hw/arm_gic.c | 35 --- 1 files changed, 20 insertions(+), 15 deletions

Re: [Qemu-devel] [PATCH 4/4] target-arm: add minimal dump-guest-memory support

2012-07-01 Thread Rabin Vincent
On Thu, Jun 28, 2012 at 05:46:02PM +0100, Peter Maydell wrote: On 20 June 2012 18:28, Rabin Vincent ra...@rab.in wrote: Add a minimal dump-guest-memory support for ARM.  The -p option is not supported and we don't add any QEMU-specific notes. So what does this patch give us? This commit

[Qemu-devel] [PATCH 1/4] dump: create writable files

2012-06-20 Thread Rabin Vincent
Make dump-guest-memory not create read-only files, so that it can overwrite a file created by a previous invocation without having it to be removed externally. Signed-off-by: Rabin Vincent ra...@rab.in --- dump.c |3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/dump.c b

[Qemu-devel] [PATCH 2/4] dump: extract out note helper

2012-06-20 Thread Rabin Vincent
Make a common helper function to add ELF notes. Signed-off-by: Rabin Vincent ra...@rab.in --- dump.c | 49 +++ dump.h |4 + target-i386/arch_dump.c | 206 +++ 3 files changed, 100 insertions(+), 159

[Qemu-devel] [PATCH 4/4] target-arm: add minimal dump-guest-memory support

2012-06-20 Thread Rabin Vincent
Add a minimal dump-guest-memory support for ARM. The -p option is not supported and we don't add any QEMU-specific notes. Signed-off-by: Rabin Vincent ra...@rab.in --- configure|4 +-- target-arm/Makefile.objs |2 +- target-arm/arch_dump.c

[Qemu-devel] [PATCH 3/4] dump: extract out get note size function

2012-06-20 Thread Rabin Vincent
Extract out the ELF note size function from i386 so we can use it from other targets. Signed-off-by: Rabin Vincent ra...@rab.in --- dump.c | 15 +++ dump.h |2 ++ target-i386/arch_dump.c | 14 ++ 3 files changed, 19 insertions

[Qemu-devel] [PATCHv2 0/6] ARM dump-guest-memory support

2013-03-24 Thread Rabin Vincent
in dump_write_elf_note() - Save CPSR in ARM prstatus - set correct ELF endianness for ARM BE Rabin Vincent (6): dump: create writable files dump: extract out note helper dump: extract out get note size function dump: fix up memory mapping dependencies / stub target-arm: add dump-guest

[Qemu-devel] [PATCHv2 1/6] dump: create writable files

2013-03-24 Thread Rabin Vincent
with write permissions set. If someone requires read-only files to be created, they can achieve it by setting umask. Signed-off-by: Rabin Vincent ra...@rab.in --- dump.c |3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/dump.c b/dump.c index a25f509..8dd86b4 100644 --- a/dump.c

[Qemu-devel] [PATCHv2 3/6] dump: extract out get note size function

2013-03-24 Thread Rabin Vincent
Extract out the ELF note size function from i386 so we can use it from other targets. Signed-off-by: Rabin Vincent ra...@rab.in --- dump.c | 15 +++ include/sysemu/dump.h |2 ++ target-i386/arch_dump.c | 14 ++ 3 files changed, 19 insertions

[Qemu-devel] [PATCHv2 2/6] dump: extract out note helper

2013-03-24 Thread Rabin Vincent
Make a common helper function out of the x86 code to add ELF notes. Signed-off-by: Rabin Vincent ra...@rab.in --- dump.c | 51 include/sysemu/dump.h |4 + target-i386/arch_dump.c | 208 +++ 3 files changed, 104

[Qemu-devel] [PATCHv2 4/6] dump: fix up memory mapping dependencies / stub

2013-03-24 Thread Rabin Vincent
to `memory_mapping_list_init' dump.c:827: undefined reference to `memory_mapping_filter' Allow memory_mapping-stub.c to instead be used for targets which do not set CONFIG_HAVE_GET_MEMORY_MAPPING. Signed-off-by: Rabin Vincent ra...@rab.in --- Makefile.target |3 +-- memory_mapping-stub.c |5 - 2 files

[Qemu-devel] [PATCHv2 6/6] dump: fix memory region handling

2013-03-24 Thread Rabin Vincent
RAMBlock.offset does not provide the physical address of the memory region. This is available in the MemoryRegion's address. The wrong usage leads to incorrect physical addreses in the ELF. Fix it. Signed-off-by: Rabin Vincent ra...@rab.in --- dump.c| 19

[Qemu-devel] [PATCHv2 5/6] target-arm: add dump-guest-memory support

2013-03-24 Thread Rabin Vincent
Enable support for the dump-guest-memory monitor command for ARM. Cc: Peter Maydell peter.mayd...@linaro.org Signed-off-by: Rabin Vincent ra...@rab.in --- configure|2 +- target-arm/Makefile.objs |2 +- target-arm/arch_dump.c | 61

Re: [Qemu-devel] [PATCHv2 5/6] target-arm: add dump-guest-memory support

2013-03-24 Thread Rabin Vincent
2013/3/24 Peter Maydell peter.mayd...@linaro.org: On 24 March 2013 17:27, Rabin Vincent ra...@rab.in wrote: --- /dev/null +++ b/target-arm/arch_dump.c @@ -0,0 +1,61 @@ +#include cpu.h +#include sysemu/dump.h +#include elf.h + +typedef struct { +char pad1[24]; +uint32_t pid

Re: [Qemu-devel] [PATCHv2 6/6] dump: fix memory region handling

2013-03-24 Thread Rabin Vincent
2013/3/24 Peter Maydell peter.mayd...@linaro.org: On 24 March 2013 17:27, Rabin Vincent ra...@rab.in wrote: /** + * memory_region_get_addr: Get the address of a memory region + * + * @mr: the memory region + */ +hwaddr memory_region_get_addr(MemoryRegion *mr); I'm afraid this doesn't

Re: [Qemu-devel] [PATCHv2 0/6] ARM dump-guest-memory support

2013-03-29 Thread Rabin Vincent
2013/3/25 Andreas Färber afaer...@suse.de This still does not address the architectural issue that I brought up. I guess you mean the CPUArchState stuff? AFAICS Wen Congyang (the author of the dump code) had some answers/questions for you:

[Qemu-devel] [PATCH] armv7m_nvic: fix CPUID Base Register

2014-04-20 Thread Rabin Vincent
cp15.c0_cpuid is never initialized for ARMv7-M; take the value directly from cpu-midr instead. Signed-off-by: Rabin Vincent ra...@rab.in --- hw/intc/armv7m_nvic.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/intc/armv7m_nvic.c b/hw/intc/armv7m_nvic.c index 6066fa6

[Qemu-devel] [PATCH 1/3] timer: add EFM32 timer

2014-05-04 Thread Rabin Vincent
Add support for the TIMER block on the EFM32GG. Signed-off-by: Rabin Vincent ra...@rab.in --- hw/timer/Makefile.objs | 1 + hw/timer/efm32-timer.c | 204 + 2 files changed, 205 insertions(+) create mode 100644 hw/timer/efm32-timer.c diff --git

[Qemu-devel] [PATCH 2/3] char: add EFM32 UART

2014-05-04 Thread Rabin Vincent
Add support for the UART block on the EFM32GG. Signed-off-by: Rabin Vincent ra...@rab.in --- hw/char/Makefile.objs | 1 + hw/char/efm32-uart.c | 217 ++ 2 files changed, 218 insertions(+) create mode 100644 hw/char/efm32-uart.c diff --git a/hw

[Qemu-devel] [PATCH 3/3] arm: add EFM32GG-DK3750 support

2014-05-04 Thread Rabin Vincent
Add support for the EFM32GG990 MCU and its development board EFM32GG-DK3750. This is a Cortex-M3 platform supported by mainline Linux. Signed-off-by: Rabin Vincent ra...@rab.in --- default-configs/arm-softmmu.mak | 1 + hw/arm/Makefile.objs| 1 + hw/arm/efm32.c

Re: [Qemu-devel] boot arm fedora via u-boot in qemu

2014-10-26 Thread Rabin Vincent
On Wed, Oct 22, 2014 at 11:59:06AM +0200, Gerd Hoffmann wrote: syntax error ## Error: catX not defined syntax error ## Error: catX not defined No kernel provides dtb named vexpress-v2p-ca9.dtb No value for u_kernel. Getting help. [ ... ] Google finds me this:

[Qemu-devel] [PATCH] target-arm: add dump-guest-memory support

2014-12-23 Thread Rabin Vincent
Enable support for the dump-guest-memory command on ARM and AArch64. The dumped files can be analyzed with crash or similar tools. Signed-off-by: Rabin Vincent ra...@rab.in --- target-arm/Makefile.objs | 2 +- target-arm/arch_dump.c | 148

Re: [Qemu-devel] [PATCH] target-arm: add dump-guest-memory support

2014-12-24 Thread Rabin Vincent
On Tue, Dec 23, 2014 at 11:45:00PM +, Peter Maydell wrote: On 23 December 2014 at 23:29, Rabin Vincent ra...@rab.in wrote: +static size_t round4(size_t size) +{ +return ((size + 3) / 4) * 4; +} Is this different from ROUND_UP(size, 4) ? If we can use the standard macro from

[Qemu-devel] [PATCH] nand: fix address overflow

2015-11-10 Thread Rabin Vincent
The shifts of the address mask and value shift beyond 32 bits when there are 5 address cycles. Signed-off-by: Rabin Vincent <rabin.vinc...@axis.com> --- hw/block/nand.c |4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/block/nand.c b/hw/block/nand.c index 6

Re: [Qemu-devel] [PATCH] nand: fix flash erase when oob is in memory

2015-11-23 Thread Rabin Vincent
(to: Kevin and cc: qemu-block) On Fri, Nov 13, 2015 at 02:17:28PM +0100, Ricard Wanderlöf wrote: > > For the "main area on file, oob in memory" case, fix the shifts so that > we erase the correct number of pages. > > Signed-off-by: Ricard Wanderlöf > --- > hw/block/nand.c |

[Qemu-devel] [PATCH 7/9] target-cris: ignore prefix insns in singlestep

2016-09-05 Thread Rabin Vincent
c0 $sp=bfd8 $pc=1ad4 Signed-off-by: Hans-Peter Nilsson <h...@axis.com> Signed-off-by: Rabin Vincent <rab...@axis.com> --- target-cris/translate.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/target-cris/translate.c b/target-cris/translate.c index a4512

[Qemu-devel] [PATCH 4/9] tests: cris: remove check_time1

2016-09-05 Thread Rabin Vincent
From: Rabin Vincent <rab...@axis.com> This test, borrowed from the GDB simulator test suite, checks that every syscall increments the time returned by gettimeofday() by exactly 1 ms. This is not guaranteed or even desirable on QEMU so remove this test. Signed-off-by: Rabin Vincen

[Qemu-devel] [PATCH 3/9] tests: cris: remove openpf4 test

2016-09-05 Thread Rabin Vincent
From: Rabin Vincent <rab...@axis.com> This test, borrowed from the GDB simulator test suite, is meant to test the GDB simulator's --sysroot feature and always fails in QEMU. Remove it. openpf3 tests the same sequence of system calls (without assuming the precence of --sysroot). Sign

[Qemu-devel] [PATCH 1/9] tests: cris: force inlining

2016-09-05 Thread Rabin Vincent
From: Rabin Vincent <rab...@axis.com> The CRIS tests expect that functions marked inline are always inline. With newer versions of GCC, building them results warnings like the following and spurious failures when they are run. In file included from tests/tcg/cris/check_moveq.c:5:0: tes

[Qemu-devel] [PATCH 8/9] target-cris: add v17 CPU

2016-09-05 Thread Rabin Vincent
From: Rabin Vincent <rab...@axis.com> In the CRIS v17 CPU an ADDC (add with carry) instruction has been added compared to the v10 instruction set. Assembler syntax: ADDC [Rs],Rd ADDC [Rs+],Rd Size: Dword Description: The source data is added together with the carr

[Qemu-devel] [PATCH 9/9] tests: cris: add v17 ADDC test

2016-09-05 Thread Rabin Vincent
From: Rabin Vincent <rab...@axis.com> Add a test for the newly implemented ADDC instruction in the v17 CRIS CPU. Signed-off-by: Rabin Vincent <rab...@axis.com> --- tests/tcg/cris/Makefile| 19 ++-- tests/tcg/cris/check_addcv17.s | 65 +

[Qemu-devel] [PATCH 6/9] target-cris: reduce v32isms from v10 log dumps

2016-09-05 Thread Rabin Vincent
From: Hans-Peter Nilsson <h...@axis.com> Use the correct register names for v10 and don't dump support function registers for pre-v32. Signed-off-by: Hans-Peter Nilsson <h...@axis.com> Signed-off-by: Rabin Vincent <rab...@axis.com> --- target-cri

[Qemu-devel] [PATCH 2/9] tests: cris: fix syscall inline asm

2016-09-05 Thread Rabin Vincent
From: Rabin Vincent <rab...@axis.com> Add the clobbered registeres to the inline asm for the write and exit system calls. Without the correct clobbers for the write() function, correct failure messages are not printed succesfully on newer version of GCC. Signed-off-by: Rabin Vincen

[Qemu-devel] [PATCH 5/9] target-cris: sync CC state at load/stores.

2016-09-05 Thread Rabin Vincent
From: "Edgar E. Iglesias" <ed...@axis.com> Icount may choose to abort and recompile a TB at any load/store. We need to sync the CC state at these insns. Signed-off-by: Edgar E. Iglesias <ed...@axis.com> Signed-off-by: Rabin Vincent <rab...@axis.com> --- tar

Re: [Qemu-devel] [PATCH 1/9] tests: cris: force inlining

2016-09-08 Thread Rabin Vincent
On Tue, Sep 06, 2016 at 11:53:46PM +0200, Edgar E. Iglesias wrote: > On Mon, Sep 05, 2016 at 01:54:04PM +0200, Rabin Vincent wrote: > > From: Rabin Vincent <rab...@axis.com> > > > > The CRIS tests expect that functions marked inline are always inline. > > With new

[Qemu-devel] [PATCHv2 2/8] tests: cris: fix syscall inline asm

2016-09-08 Thread Rabin Vincent
From: Rabin Vincent <rab...@axis.com> Add the appropriate register constraints for the inline asm for the write and exit system calls. Without the correct constraints for the write() function, correct failure messages are not printed succesfully on newer version of GCC. Signed-off-by:

[Qemu-devel] [PATCHv2 1/8] tests: cris: force inlining

2016-09-12 Thread Rabin Vincent
From: Rabin Vincent <rab...@axis.com> The CRIS tests expect that functions marked inline are always inline. With newer versions of GCC, building them results warnings like the following and spurious failures when they are run. In file included from tests/tcg/cris/check_moveq.c:5:0: tes

Re: [Qemu-devel] [PATCH 8/9] target-cris: add v17 CPU

2016-09-26 Thread Rabin Vincent
On Tue, Sep 13, 2016 at 12:18:00AM +0200, Edgar E. Iglesias wrote: > On Mon, Sep 05, 2016 at 01:54:11PM +0200, Rabin Vincent wrote: > > diff --git a/target-cris/translate_v10.c b/target-cris/translate_v10.c > > index a3da425..33d86eb 100644 > > --- a/target-cris/translate_v

Re: [Qemu-devel] [PATCH 8/9] target-cris: add v17 CPU

2016-09-30 Thread Rabin Vincent
On Wed, Sep 28, 2016 at 12:42:41PM +0200, Edgar E. Iglesias wrote: > I've applied these except patch #7 "ignore prefix insns in > singlestep". Patch #8 had an issue with checkpatch that I fixed up. Oops, thank you.

Re: [Qemu-devel] [PATCH 6/9] target-cris: reduce v32isms from v10 log dumps

2016-09-26 Thread Rabin Vincent
On Tue, Sep 13, 2016 at 12:59:51AM +0200, Edgar E. Iglesias wrote: > On Mon, Sep 05, 2016 at 01:54:09PM +0200, Rabin Vincent wrote: > > @@ -3363,14 +3371,16 @@ void cris_cpu_dump_state(CPUState *cs, FILE *f, > > fprintf_function cpu_fprintf, > >