Re: [PATCH 3/6] target/riscv: add support for zfinx

2021-12-24 Thread liweiwei
在 2021/12/25 上午6:26, Richard Henderson 写道: On 12/23/21 7:49 PM, liweiwei wrote:   static bool trans_fsgnj_s(DisasContext *ctx, arg_fsgnj_s *a)   {   REQUIRE_FPU; -    REQUIRE_EXT(ctx, RVF); +    REQUIRE_ZFINX_OR_F(ctx);   +    TCGv_i64 dest = dest_fpr(ctx, a->rd);   if (a->rs1 ==

Re: [PATCH 3/6] target/riscv: add support for zfinx

2021-12-24 Thread Richard Henderson
On 12/23/21 7:49 PM, liweiwei wrote: static bool trans_fsgnj_s(DisasContext *ctx, arg_fsgnj_s *a) { REQUIRE_FPU; -REQUIRE_EXT(ctx, RVF); +REQUIRE_ZFINX_OR_F(ctx); +TCGv_i64 dest = dest_fpr(ctx, a->rd); if (a->rs1 == a->rs2) { /* FMOV */ -

[PATCH 3/6] target/riscv: add support for zfinx

2021-12-23 Thread liweiwei
- update extension check REQUIRE_ZFINX_OR_F - update single float point register read/write - disable nanbox_s check Co-authored-by: ardxwe Signed-off-by: liweiwei Signed-off-by: wangjunqiang --- target/riscv/fpu_helper.c | 60 ++--- target/riscv/helper.h