On Tue, Nov 16, 2021 at 7:51 PM Richard Henderson
wrote:
>
> In ba0e73336200, we merged riscv32 and riscv64 in configure.
> However, meson does not treat them the same. We need to merge
> them here as well.
>
> Fixes: ba0e73336200
> Signed-off-by: Richard Henderson
Reviewed-by: Alistair
On Tue, Nov 16, 2021 at 7:51 PM Richard Henderson
wrote:
>
> In ba0e73336200, we merged riscv32 and riscv64 in configure.
> However, meson does not treat them the same. We need to merge
> them here as well.
>
> Fixes: ba0e73336200
> Signed-off-by: Richard Henderson
Reviewed-by: Alistair
On 11/16/21 11:53 AM, Peter Maydell wrote:
cpu = host_machine.cpu_family()
+
+# Unify riscv* to a single family.
+if cpu in ['riscv32', 'riscv64']
+ cpu = 'riscv'
+endif
Needing to do this seems kinda awkward :-(
Yeah, well. It's either once here, or multiple times later.
Or, we admit
On Tue, 16 Nov 2021 at 09:52, Richard Henderson
wrote:
>
> In ba0e73336200, we merged riscv32 and riscv64 in configure.
> However, meson does not treat them the same. We need to merge
> them here as well.
>
> Fixes: ba0e73336200
> Signed-off-by: Richard Henderson
> ---
>
> At the moment,
On 11/16/21 10:50, Richard Henderson wrote:
> In ba0e73336200, we merged riscv32 and riscv64 in configure.
> However, meson does not treat them the same. We need to merge
> them here as well.
>
> Fixes: ba0e73336200
> Signed-off-by: Richard Henderson
> ---
>
> At the moment, configure for
In ba0e73336200, we merged riscv32 and riscv64 in configure.
However, meson does not treat them the same. We need to merge
them here as well.
Fixes: ba0e73336200
Signed-off-by: Richard Henderson
---
At the moment, configure for riscv64 host fails during meson.
r~
---
meson.build | 6 ++
