This series has a few fixes for RISC-V.
Alistair Francis (3): hw/char: Convert the Ibex UART to use the qdev Clock model hw/riscv: Allow 64 bit access to SiFive CLINT target/riscv: Regen floating point rounding mode in dynamic mode include/hw/char/ibex_uart.h | 2 ++ hw/char/ibex_uart.c | 19 ++++++++++++++++++- hw/riscv/sifive_clint.c | 2 +- target/riscv/translate.c | 2 +- 4 files changed, 22 insertions(+), 3 deletions(-) -- 2.27.0