Re: [PATCH v3 10/19] target/arm: Restrict ARMv4 cpus to TCG accel

2020-04-23 Thread Philippe Mathieu-Daudé 

On 3/16/20 5:06 PM, Philippe Mathieu-Daudé wrote:

KVM requires a cpu based on (at least) the ARMv7 architecture.

Only enable the following ARMv4 CPUs when TCG is available:

   - StrongARM (SA1100/1110)
   - OMAP1510 (TI925T)



I missed to explain, the point of this Kconfig granularity is on a KVM 
only build, the TCG-only CPUs can't be default-selected, so most of 
their devices are not pulled in.


Instead at the end the KVM-only binary only contains the devices 
required to run the Cortex-A machines.



diff --git a/default-configs/arm-softmmu.mak b/default-configs/arm-softmmu.mak
index 8b89d8c4c0..0652396296 100644
--- a/default-configs/arm-softmmu.mak
+++ b/default-configs/arm-softmmu.mak
@@ -17,8 +17,6 @@ CONFIG_INTEGRATOR=y
  CONFIG_FSL_IMX31=y
  CONFIG_MUSICPAL=y
  CONFIG_MUSCA=y
-CONFIG_CHEETAH=y
-CONFIG_SX1=y
  CONFIG_NSERIES=y
  CONFIG_STELLARIS=y
  CONFIG_REALVIEW=y

[...]

diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
index e3d7e7694a..7fc0cff776 100644
--- a/hw/arm/Kconfig
+++ b/hw/arm/Kconfig
@@ -28,6 +28,7 @@ config ARM_VIRT
  
  config CHEETAH

  bool
+select ARM_V4
  select OMAP
  select TSC210X
  
@@ -242,6 +243,7 @@ config COLLIE
  
  config SX1

  bool
+select ARM_V4
  select OMAP
  
  config VERSATILE

diff --git a/target/arm/Kconfig b/target/arm/Kconfig
index e68c71a6ff..0d496d318a 100644
--- a/target/arm/Kconfig
+++ b/target/arm/Kconfig
@@ -1,2 +1,6 @@
+config ARM_V4
+depends on TCG
+bool
+
  config ARM_V7M
  bool

Re: [PATCH v3 10/19] target/arm: Restrict ARMv4 cpus to TCG accel

2020-03-16 Thread Richard Henderson 
On 3/16/20 12:50 PM, Richard Henderson wrote:
> I much prefer ARRAY_SIZE() to sentinels.
> I know the existing code make much use of them,
> but we don't need to replicate that here.

... but otherwise,
Reviewed-by: Richard Henderson 


r~

Re: [PATCH v3 10/19] target/arm: Restrict ARMv4 cpus to TCG accel

2020-03-16 Thread Richard Henderson 
On 3/16/20 9:06 AM, Philippe Mathieu-Daudé wrote:
> +static const ARMCPUInfo arm_v4_cpus[] = {
> +{ .name = "ti925t",  .initfn = ti925t_initfn },
> +{ .name = "sa1100",  .initfn = sa1100_initfn },
> +{ .name = "sa1110",  .initfn = sa1110_initfn },
> +{ .name = NULL }
> +};
> +
> +static void arm_v4_cpu_register_types(void)
> +{
> +const ARMCPUInfo *info = arm_v4_cpus;
> +
> +while (info->name) {
> +arm_cpu_register(info);
> +info++;
> +}
> +}

I much prefer ARRAY_SIZE() to sentinels.
I know the existing code make much use of them,
but we don't need to replicate that here.


r~

[PATCH v3 10/19] target/arm: Restrict ARMv4 cpus to TCG accel

2020-03-16 Thread Philippe Mathieu-Daudé 
KVM requires a cpu based on (at least) the ARMv7 architecture.

Only enable the following ARMv4 CPUs when TCG is available:

  - StrongARM (SA1100/1110)
  - OMAP1510 (TI925T)

Signed-off-by: Philippe Mathieu-Daudé 
---
 default-configs/arm-softmmu.mak |  2 -
 target/arm/cpu.c| 33 -
 target/arm/cpu_v4.c | 65 +
 hw/arm/Kconfig  |  2 +
 target/arm/Kconfig  |  4 ++
 target/arm/Makefile.objs|  2 +
 6 files changed, 73 insertions(+), 35 deletions(-)
 create mode 100644 target/arm/cpu_v4.c

diff --git a/default-configs/arm-softmmu.mak b/default-configs/arm-softmmu.mak
index 8b89d8c4c0..0652396296 100644
--- a/default-configs/arm-softmmu.mak
+++ b/default-configs/arm-softmmu.mak
@@ -17,8 +17,6 @@ CONFIG_INTEGRATOR=y
 CONFIG_FSL_IMX31=y
 CONFIG_MUSICPAL=y
 CONFIG_MUSCA=y
-CONFIG_CHEETAH=y
-CONFIG_SX1=y
 CONFIG_NSERIES=y
 CONFIG_STELLARIS=y
 CONFIG_REALVIEW=y
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index d2813eb81a..b08b6933be 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -2459,36 +2459,6 @@ static void cortex_a15_initfn(Object *obj)
 define_arm_cp_regs(cpu, cortexa15_cp_reginfo);
 }
 
-static void ti925t_initfn(Object *obj)
-{
-ARMCPU *cpu = ARM_CPU(obj);
-set_feature(>env, ARM_FEATURE_V4T);
-set_feature(>env, ARM_FEATURE_OMAPCP);
-cpu->midr = ARM_CPUID_TI925T;
-cpu->ctr = 0x5109149;
-cpu->reset_sctlr = 0x0070;
-}
-
-static void sa1100_initfn(Object *obj)
-{
-ARMCPU *cpu = ARM_CPU(obj);
-
-cpu->dtb_compatible = "intel,sa1100";
-set_feature(>env, ARM_FEATURE_STRONGARM);
-set_feature(>env, ARM_FEATURE_DUMMY_C15_REGS);
-cpu->midr = 0x4401A11B;
-cpu->reset_sctlr = 0x0070;
-}
-
-static void sa1110_initfn(Object *obj)
-{
-ARMCPU *cpu = ARM_CPU(obj);
-set_feature(>env, ARM_FEATURE_STRONGARM);
-set_feature(>env, ARM_FEATURE_DUMMY_C15_REGS);
-cpu->midr = 0x6901B119;
-cpu->reset_sctlr = 0x0070;
-}
-
 static void pxa250_initfn(Object *obj)
 {
 ARMCPU *cpu = ARM_CPU(obj);
@@ -2727,9 +2697,6 @@ static const ARMCPUInfo arm_cpus[] = {
 { .name = "cortex-a8",   .initfn = cortex_a8_initfn },
 { .name = "cortex-a9",   .initfn = cortex_a9_initfn },
 { .name = "cortex-a15",  .initfn = cortex_a15_initfn },
-{ .name = "ti925t",  .initfn = ti925t_initfn },
-{ .name = "sa1100",  .initfn = sa1100_initfn },
-{ .name = "sa1110",  .initfn = sa1110_initfn },
 { .name = "pxa250",  .initfn = pxa250_initfn },
 { .name = "pxa255",  .initfn = pxa255_initfn },
 { .name = "pxa260",  .initfn = pxa260_initfn },
diff --git a/target/arm/cpu_v4.c b/target/arm/cpu_v4.c
new file mode 100644
index 00..1de00a03ee
--- /dev/null
+++ b/target/arm/cpu_v4.c
@@ -0,0 +1,65 @@
+/*
+ * ARM generic helpers.
+ *
+ * This code is licensed under the GNU GPL v2 or later.
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#include "qemu/osdep.h"
+#include "cpu.h"
+#include "internals.h"
+
+/* CPU models. These are not needed for the AArch64 linux-user build. */
+#if !defined(CONFIG_USER_ONLY) || !defined(TARGET_AARCH64)
+
+static void ti925t_initfn(Object *obj)
+{
+ARMCPU *cpu = ARM_CPU(obj);
+set_feature(>env, ARM_FEATURE_V4T);
+set_feature(>env, ARM_FEATURE_OMAPCP);
+cpu->midr = ARM_CPUID_TI925T;
+cpu->ctr = 0x5109149;
+cpu->reset_sctlr = 0x0070;
+}
+
+static void sa1100_initfn(Object *obj)
+{
+ARMCPU *cpu = ARM_CPU(obj);
+
+cpu->dtb_compatible = "intel,sa1100";
+set_feature(>env, ARM_FEATURE_STRONGARM);
+set_feature(>env, ARM_FEATURE_DUMMY_C15_REGS);
+cpu->midr = 0x4401A11B;
+cpu->reset_sctlr = 0x0070;
+}
+
+static void sa1110_initfn(Object *obj)
+{
+ARMCPU *cpu = ARM_CPU(obj);
+set_feature(>env, ARM_FEATURE_STRONGARM);
+set_feature(>env, ARM_FEATURE_DUMMY_C15_REGS);
+cpu->midr = 0x6901B119;
+cpu->reset_sctlr = 0x0070;
+}
+
+static const ARMCPUInfo arm_v4_cpus[] = {
+{ .name = "ti925t",  .initfn = ti925t_initfn },
+{ .name = "sa1100",  .initfn = sa1100_initfn },
+{ .name = "sa1110",  .initfn = sa1110_initfn },
+{ .name = NULL }
+};
+
+static void arm_v4_cpu_register_types(void)
+{
+const ARMCPUInfo *info = arm_v4_cpus;
+
+while (info->name) {
+arm_cpu_register(info);
+info++;
+}
+}
+
+type_init(arm_v4_cpu_register_types)
+
+#endif
diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
index e3d7e7694a..7fc0cff776 100644
--- a/hw/arm/Kconfig
+++ b/hw/arm/Kconfig
@@ -28,6 +28,7 @@ config ARM_VIRT
 
 config CHEETAH
 bool
+select ARM_V4
 select OMAP
 select TSC210X
 
@@ -242,6 +243,7 @@ config COLLIE
 
 config SX1
 bool
+select ARM_V4
 select OMAP
 
 config VERSATILE
diff --git a/target/arm/Kconfig b/target/arm/Kconfig
index e68c71a6ff..0d496d318a 100644
--- a/target/arm/Kconfig
+++ b/target/arm/Kconfig
@@ -1,2 +1,6 @@
+config ARM_V4