Re: [PATCH v3 12/19] target/arm: Restrict ARMv6 cpus to TCG accel

[Richard Henderson]

On 3/16/20 9:06 AM, Philippe Mathieu-Daudé wrote:
> +static void arm_v6_cpu_register_types(void)
> +{
> +const ARMCPUInfo *info = arm_v6_cpus;
> +
> +while (info->name) {
> +arm_cpu_register(info);
> +info++;
> +}
> +}

Likewise wrt ARRAY_SIZE, otherwise,
Reviewed-by: Richard Henderson 


r~

[PATCH v3 12/19] target/arm: Restrict ARMv6 cpus to TCG accel

[Philippe Mathieu-Daudé]

KVM requires a cpu based on (at least) the ARMv7 architecture.

Only enable the following ARMv6 CPUs when TCG is available:

  - ARM1136
  - ARM1176
  - ARM11MPCore
  - Cortex-M0

Signed-off-by: Philippe Mathieu-Daudé 
---
 default-configs/arm-softmmu.mak |   2 -
 target/arm/cpu.c| 137 -
 target/arm/cpu_v6.c | 171 
 hw/arm/Kconfig  |   2 +
 target/arm/Kconfig  |   4 +
 target/arm/Makefile.objs|   1 +
 6 files changed, 178 insertions(+), 139 deletions(-)
 create mode 100644 target/arm/cpu_v6.c

diff --git a/default-configs/arm-softmmu.mak b/default-configs/arm-softmmu.mak
index f176a98296..3aa27f3b40 100644
--- a/default-configs/arm-softmmu.mak
+++ b/default-configs/arm-softmmu.mak
@@ -13,9 +13,7 @@ CONFIG_ARM_VIRT=y
 CONFIG_CUBIEBOARD=y
 CONFIG_EXYNOS4=y
 CONFIG_HIGHBANK=y
-CONFIG_FSL_IMX31=y
 CONFIG_MUSCA=y
-CONFIG_NSERIES=y
 CONFIG_STELLARIS=y
 CONFIG_REALVIEW=y
 CONFIG_VEXPRESS=y
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index f1d1ba8451..34908828a0 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -1834,135 +1834,6 @@ static ObjectClass *arm_cpu_class_by_name(const char 
*cpu_model)
 /* CPU models. These are not needed for the AArch64 linux-user build. */
 #if !defined(CONFIG_USER_ONLY) || !defined(TARGET_AARCH64)
 
-static void arm1136_r2_initfn(Object *obj)
-{
-ARMCPU *cpu = ARM_CPU(obj);
-/* What qemu calls "arm1136_r2" is actually the 1136 r0p2, ie an
- * older core than plain "arm1136". In particular this does not
- * have the v6K features.
- * These ID register values are correct for 1136 but may be wrong
- * for 1136_r2 (in particular r0p2 does not actually implement most
- * of the ID registers).
- */
-
-cpu->dtb_compatible = "arm,arm1136";
-set_feature(>env, ARM_FEATURE_V6);
-set_feature(>env, ARM_FEATURE_DUMMY_C15_REGS);
-set_feature(>env, ARM_FEATURE_CACHE_DIRTY_REG);
-set_feature(>env, ARM_FEATURE_CACHE_BLOCK_OPS);
-cpu->midr = 0x4107b362;
-cpu->reset_fpsid = 0x410120b4;
-cpu->isar.mvfr0 = 0x;
-cpu->isar.mvfr1 = 0x;
-cpu->ctr = 0x1dd20d2;
-cpu->reset_sctlr = 0x00050078;
-cpu->id_pfr0 = 0x111;
-cpu->id_pfr1 = 0x1;
-cpu->isar.id_dfr0 = 0x2;
-cpu->id_afr0 = 0x3;
-cpu->isar.id_mmfr0 = 0x01130003;
-cpu->isar.id_mmfr1 = 0x10030302;
-cpu->isar.id_mmfr2 = 0x01222110;
-cpu->isar.id_isar0 = 0x00140011;
-cpu->isar.id_isar1 = 0x12002111;
-cpu->isar.id_isar2 = 0x1123;
-cpu->isar.id_isar3 = 0x01102131;
-cpu->isar.id_isar4 = 0x141;
-cpu->reset_auxcr = 7;
-}
-
-static void arm1136_initfn(Object *obj)
-{
-ARMCPU *cpu = ARM_CPU(obj);
-
-cpu->dtb_compatible = "arm,arm1136";
-set_feature(>env, ARM_FEATURE_V6K);
-set_feature(>env, ARM_FEATURE_V6);
-set_feature(>env, ARM_FEATURE_DUMMY_C15_REGS);
-set_feature(>env, ARM_FEATURE_CACHE_DIRTY_REG);
-set_feature(>env, ARM_FEATURE_CACHE_BLOCK_OPS);
-cpu->midr = 0x4117b363;
-cpu->reset_fpsid = 0x410120b4;
-cpu->isar.mvfr0 = 0x;
-cpu->isar.mvfr1 = 0x;
-cpu->ctr = 0x1dd20d2;
-cpu->reset_sctlr = 0x00050078;
-cpu->id_pfr0 = 0x111;
-cpu->id_pfr1 = 0x1;
-cpu->isar.id_dfr0 = 0x2;
-cpu->id_afr0 = 0x3;
-cpu->isar.id_mmfr0 = 0x01130003;
-cpu->isar.id_mmfr1 = 0x10030302;
-cpu->isar.id_mmfr2 = 0x01222110;
-cpu->isar.id_isar0 = 0x00140011;
-cpu->isar.id_isar1 = 0x12002111;
-cpu->isar.id_isar2 = 0x1123;
-cpu->isar.id_isar3 = 0x01102131;
-cpu->isar.id_isar4 = 0x141;
-cpu->reset_auxcr = 7;
-}
-
-static void arm1176_initfn(Object *obj)
-{
-ARMCPU *cpu = ARM_CPU(obj);
-
-cpu->dtb_compatible = "arm,arm1176";
-set_feature(>env, ARM_FEATURE_V6K);
-set_feature(>env, ARM_FEATURE_VAPA);
-set_feature(>env, ARM_FEATURE_DUMMY_C15_REGS);
-set_feature(>env, ARM_FEATURE_CACHE_DIRTY_REG);
-set_feature(>env, ARM_FEATURE_CACHE_BLOCK_OPS);
-set_feature(>env, ARM_FEATURE_EL3);
-cpu->midr = 0x410fb767;
-cpu->reset_fpsid = 0x410120b5;
-cpu->isar.mvfr0 = 0x;
-cpu->isar.mvfr1 = 0x;
-cpu->ctr = 0x1dd20d2;
-cpu->reset_sctlr = 0x00050078;
-cpu->id_pfr0 = 0x111;
-cpu->id_pfr1 = 0x11;
-cpu->isar.id_dfr0 = 0x33;
-cpu->id_afr0 = 0;
-cpu->isar.id_mmfr0 = 0x01130003;
-cpu->isar.id_mmfr1 = 0x10030302;
-cpu->isar.id_mmfr2 = 0x01222100;
-cpu->isar.id_isar0 = 0x0140011;
-cpu->isar.id_isar1 = 0x12002111;
-cpu->isar.id_isar2 = 0x11231121;
-cpu->isar.id_isar3 = 0x01102131;
-cpu->isar.id_isar4 = 0x01141;
-cpu->reset_auxcr = 7;
-}
-
-static void arm11mpcore_initfn(Object *obj)
-{
-ARMCPU *cpu = ARM_CPU(obj);
-
-cpu->dtb_compatible = "arm,arm11mpcore";
-set_feature(>env, ARM_FEATURE_V6K);
-set_feature(>env, ARM_FEATURE_VAPA);
-set_feature(>env, ARM_FEATURE_MPIDR);
-set_feature(>env,