Re: [PATCH v5 01/13] hvf: switch hvf_arm_get_host_cpu_features to not create a vCPU

2025-08-06 Thread Philippe Mathieu-Daudé

Hi Mohamed,

On 28/7/25 15:41, Mohamed Mediouni wrote:

Creating a vCPU locks out APIs such as hv_gic_create().

As a result, switch to using the hv_vcpu_config_get_feature_reg interface.

Hardcode MIDR because Apple deliberately doesn't expose a divergent MIDR across 
systems.

Signed-off-by: Mohamed Mediouni 
---
  target/arm/hvf/hvf.c | 35 ++-
  1 file changed, 14 insertions(+), 21 deletions(-)




@@ -891,17 +891,10 @@ static bool 
hvf_arm_get_host_cpu_features(ARMHostCPUFeatures *ahcf)
   (1ULL << ARM_FEATURE_PMU) |
   (1ULL << ARM_FEATURE_GENERIC_TIMER);
  
-/* We set up a small vcpu to extract host registers */

-
-if (hv_vcpu_create(&fd, &exit, NULL) != HV_SUCCESS) {
-return false;
-}
-
  for (i = 0; i < ARRAY_SIZE(regs); i++) {
-r |= hv_vcpu_get_sys_reg(fd, regs[i].reg, regs[i].val);
+r |= hv_vcpu_config_get_feature_reg(hv_vcpu_config, regs[i].reg, 
regs[i].val);
  }
-r |= hv_vcpu_get_sys_reg(fd, HV_SYS_REG_MIDR_EL1, &ahcf->midr);
-r |= hv_vcpu_destroy(fd);

Could we add a comment explaining this magic value?


+ahcf->midr = 0x610f;


Reviewed-by: Philippe Mathieu-Daudé 
Tested-by: Philippe Mathieu-Daudé 




[PATCH v5 01/13] hvf: switch hvf_arm_get_host_cpu_features to not create a vCPU

2025-07-28 Thread Mohamed Mediouni
Creating a vCPU locks out APIs such as hv_gic_create().

As a result, switch to using the hv_vcpu_config_get_feature_reg interface.

Hardcode MIDR because Apple deliberately doesn't expose a divergent MIDR across 
systems.

Signed-off-by: Mohamed Mediouni 
---
 target/arm/hvf/hvf.c | 35 ++-
 1 file changed, 14 insertions(+), 21 deletions(-)

diff --git a/target/arm/hvf/hvf.c b/target/arm/hvf/hvf.c
index 47b0cd3a35..5ee0df17e3 100644
--- a/target/arm/hvf/hvf.c
+++ b/target/arm/hvf/hvf.c
@@ -864,24 +864,24 @@ static bool 
hvf_arm_get_host_cpu_features(ARMHostCPUFeatures *ahcf)
 {
 ARMISARegisters host_isar = {};
 const struct isar_regs {
-int reg;
+hv_feature_reg_t reg;
 uint64_t *val;
 } regs[] = {
-{ HV_SYS_REG_ID_AA64PFR0_EL1, &host_isar.idregs[ID_AA64PFR0_EL1_IDX] },
-{ HV_SYS_REG_ID_AA64PFR1_EL1, &host_isar.idregs[ID_AA64PFR1_EL1_IDX] },
-{ HV_SYS_REG_ID_AA64DFR0_EL1, &host_isar.idregs[ID_AA64DFR0_EL1_IDX] },
-{ HV_SYS_REG_ID_AA64DFR1_EL1, &host_isar.idregs[ID_AA64DFR1_EL1_IDX] },
-{ HV_SYS_REG_ID_AA64ISAR0_EL1, &host_isar.idregs[ID_AA64ISAR0_EL1_IDX] 
},
-{ HV_SYS_REG_ID_AA64ISAR1_EL1, &host_isar.idregs[ID_AA64ISAR1_EL1_IDX] 
},
+{ HV_FEATURE_REG_ID_AA64PFR0_EL1, 
&host_isar.idregs[ID_AA64PFR0_EL1_IDX] },
+{ HV_FEATURE_REG_ID_AA64PFR1_EL1, 
&host_isar.idregs[ID_AA64PFR1_EL1_IDX] },
+{ HV_FEATURE_REG_ID_AA64DFR0_EL1, 
&host_isar.idregs[ID_AA64DFR0_EL1_IDX] },
+{ HV_FEATURE_REG_ID_AA64DFR1_EL1, 
&host_isar.idregs[ID_AA64DFR1_EL1_IDX] },
+{ HV_FEATURE_REG_ID_AA64ISAR0_EL1, 
&host_isar.idregs[ID_AA64ISAR0_EL1_IDX] },
+{ HV_FEATURE_REG_ID_AA64ISAR1_EL1, 
&host_isar.idregs[ID_AA64ISAR1_EL1_IDX] },
 /* Add ID_AA64ISAR2_EL1 here when HVF supports it */
-{ HV_SYS_REG_ID_AA64MMFR0_EL1, &host_isar.idregs[ID_AA64MMFR0_EL1_IDX] 
},
-{ HV_SYS_REG_ID_AA64MMFR1_EL1, &host_isar.idregs[ID_AA64MMFR1_EL1_IDX] 
},
-{ HV_SYS_REG_ID_AA64MMFR2_EL1, &host_isar.idregs[ID_AA64MMFR2_EL1_IDX] 
},
+{ HV_FEATURE_REG_ID_AA64MMFR0_EL1, 
&host_isar.idregs[ID_AA64MMFR0_EL1_IDX] },
+{ HV_FEATURE_REG_ID_AA64MMFR1_EL1, 
&host_isar.idregs[ID_AA64MMFR1_EL1_IDX] },
+{ HV_FEATURE_REG_ID_AA64MMFR2_EL1, 
&host_isar.idregs[ID_AA64MMFR2_EL1_IDX] },
 /* Add ID_AA64MMFR3_EL1 here when HVF supports it */
 };
-hv_vcpu_t fd;
+
 hv_return_t r = HV_SUCCESS;
-hv_vcpu_exit_t *exit;
+hv_vcpu_config_t hv_vcpu_config = hv_vcpu_config_create();
 int i;
 
 ahcf->dtb_compatible = "arm,armv8";
@@ -891,17 +891,10 @@ static bool 
hvf_arm_get_host_cpu_features(ARMHostCPUFeatures *ahcf)
  (1ULL << ARM_FEATURE_PMU) |
  (1ULL << ARM_FEATURE_GENERIC_TIMER);
 
-/* We set up a small vcpu to extract host registers */
-
-if (hv_vcpu_create(&fd, &exit, NULL) != HV_SUCCESS) {
-return false;
-}
-
 for (i = 0; i < ARRAY_SIZE(regs); i++) {
-r |= hv_vcpu_get_sys_reg(fd, regs[i].reg, regs[i].val);
+r |= hv_vcpu_config_get_feature_reg(hv_vcpu_config, regs[i].reg, 
regs[i].val);
 }
-r |= hv_vcpu_get_sys_reg(fd, HV_SYS_REG_MIDR_EL1, &ahcf->midr);
-r |= hv_vcpu_destroy(fd);
+ahcf->midr = 0x610f;
 
 clamp_id_aa64mmfr0_parange_to_ipa_size(&host_isar);
 
-- 
2.39.5 (Apple Git-154)