Re: [PATCH v7 06/11] hw/core/qdev: handle parent bus change regarding resettable

2020-01-15 Thread Philippe Mathieu-Daudé

On 1/15/20 1:36 PM, Damien Hedde wrote:

In qdev_set_parent_bus(), when changing the parent bus of a
realized device, if the source and destination buses are not in the
same reset state, some adaptations are required. This patch adds
needed call to resettable_change_parent() to make sure a device reset
state stays coherent with its parent bus.

The addition is a no-op if:
1. the device being parented is not realized.
2. the device is realized, but both buses are not under reset.

Case 2 means that as long as qdev_set_parent_bus() is called
during the machine realization procedure (which is before the
machine reset so nothing is in reset), it is a no op.

There are 52 call sites of qdev_set_parent_bus(). All but one fall
into the no-op case:
+ 29 trivial calls related to virtio (in hw/{s390x,display,virtio}/
   {vhost,virtio}-xxx.c) to set a vdev(or vgpu) composing device
   parent bus just before realizing the same vdev(vgpu).
+ hw/core/qdev.c: when creating a device in qdev_try_create()
+ hw/core/sysbus.c: when initializing a device in the sysbus
+ hw/i386/amd_iommu.c: before realizing AMDVIState/pci
+ hw/isa/piix4.c: before realizing PIIX4State/rtc
+ hw/misc/auxbus.c: when creating an AUXBus
+ hw/misc/auxbus.c: when creating an AUXBus child
+ hw/misc/macio/macio.c: when initializing a MACIOState child
+ hw/misc/macio/macio.c: before realizing NewWorldMacIOState/pmu
+ hw/misc/macio/macio.c: before realizing NewWorldMacIOState/cuda
+ hw/net/virtio-net.c: Used for migration when using the failover
mechanism to migration a vfio-pci/net. It is
a no-op because at this point the device is
already on the bus.
+ hw/pci-host/designware.c: before realizing DesignwarePCIEHost/root
+ hw/pci-host/gpex.c: before realizing GPEXHost/root
+ hw/pci-host/prep.c: when initializaing PREPPCIState/pci_dev


typo "initializing"


+ hw/pci-host/q35.c: before realizing Q35PCIHost/mch
+ hw/pci-host/versatile.c: when initializing PCIVPBState/pci_dev
+ hw/pci-host/xilinx-pcie.c: before realizing XilinxPCIEHost/root
+ hw/s390x/event-facility.c: when creating SCLPEventFacility/
  TYPE_SCLP_QUIESCE
+ hw/s390x/event-facility.c: ditto with SCLPEventFacility/
  TYPE_SCLP_CPU_HOTPLUG
+ hw/s390x/sclp.c: Not trivial because it is called on a SLCPDevice
   just after realizing it. Ok because at this point the destination
   bus (sysbus) is not in reset; the realize step is before the
   machine reset.
+ hw/sd/core.c: Not OK. Used in sdbus_reparent_card(). See below.
+ hw/ssi/ssi.c: Used to put spi slave on spi bus and connect the cs
   line in ssi_auto_connect_slave(). Ok because this function is only
   used in realize step in hw/ssi/aspeed_smc.ci, hw/ssi/imx_spi.c,
   hw/ssi/mss-spi.c, hw/ssi/xilinx_spi.c and hw/ssi/xilinx_spips.c.
+ hw/xen/xen-legacy-backend.c: when creating a XenLegacyDevice device
+ qdev-monitor.c: in device hotplug creation procedure before realize

Note that this commit alone will have no effect, right now there is no
use of resettable API to reset anything. So a bus will never be tagged
as in-reset by this same API.

The one place where side-effect will occurs is in hw/sd/core.c in
sdbus_reparent_card(). This function is only used in the raspi machines,
including during the sysbus reset procedure. This case will be
carrefully handled when doing the multiple phase reset transition.

Signed-off-by: Damien Hedde 
Reviewed-by: Peter Maydell 
Reviewed-by: Richard Henderson 


Tested-by: Philippe Mathieu-Daudé 


---

v6 update: there are now 3 more call sites (52 instead of 49).
+ hw/isa/piix4.c
+ hw/net/virtio-net.c
+ hw/virtio/vhost-user-fs-pci.c (in list below)

Exhaustive list of the 29 "virtio" caller to qdev_set_parent_bus():
+ hw/display/virtio-gpu-pci.c: VirtIOGPUPCIBase/vgpu realize
+ hw/display/virtio-vga.c: VirtIOVGABase/vgpu realize
+ hw/s390x/vhost-vsock-ccw.c:  VHostVSockCCWState/vdev realize
+ hw/s390x/virtio-ccw-9p.c:V9fsCCWState/vdev realize
+ hw/s390x/virtio-ccw-balloon.c:   VirtIOBalloonCcw/vdev realize
+ hw/s390x/virtio-ccw-blk.c:   VirtIOBlkCcw/vdev realize
+ hw/s390x/virtio-ccw-crypto.c:VirtIOCryptoCcw/vdev realize
+ hw/s390x/virtio-ccw-gpu.c:   VirtIOGPUCcw/vdev realize
+ hw/s390x/virtio-ccw-input.c: VirtIOInputCcw/vdev realize
+ hw/s390x/virtio-ccw-net.c:   VirtIONetCcw/vdev realize
+ hw/s390x/virtio-ccw-rng.c:   VirtIORNGCcw/vdev realize
+ hw/s390x/virtio-ccw-scsi.c:  VirtIOSCSICcw/vdev realize
+ hw/s390x/virtio-ccw-scsi.c:  VHostSCSICcw/vdev realize
+ hw/s390x/virtio-ccw-serial.c:VirtioSerialCcw/vdev realize
+ hw/virtio/vhost-scsi-pci.c:  VHostSCSIPCI/vdev realize
+ hw/virtio/vhost-user-blk-pci.c:  VHostUserBlkPCI/vdev realize
+ hw/virtio/vhost-user-fs-pci.c:   VHostUserFSPCI/vdev realize
+ hw/virtio/vhost-user-scsi-pci.c: VHostUserSCSIPCI/vdev realize
+ hw/virtio/vhost-vsock-pci.c: VHostVSockPCI/vdev 

[PATCH v7 06/11] hw/core/qdev: handle parent bus change regarding resettable

2020-01-15 Thread Damien Hedde
In qdev_set_parent_bus(), when changing the parent bus of a
realized device, if the source and destination buses are not in the
same reset state, some adaptations are required. This patch adds
needed call to resettable_change_parent() to make sure a device reset
state stays coherent with its parent bus.

The addition is a no-op if:
1. the device being parented is not realized.
2. the device is realized, but both buses are not under reset.

Case 2 means that as long as qdev_set_parent_bus() is called
during the machine realization procedure (which is before the
machine reset so nothing is in reset), it is a no op.

There are 52 call sites of qdev_set_parent_bus(). All but one fall
into the no-op case:
+ 29 trivial calls related to virtio (in hw/{s390x,display,virtio}/
  {vhost,virtio}-xxx.c) to set a vdev(or vgpu) composing device
  parent bus just before realizing the same vdev(vgpu).
+ hw/core/qdev.c: when creating a device in qdev_try_create()
+ hw/core/sysbus.c: when initializing a device in the sysbus
+ hw/i386/amd_iommu.c: before realizing AMDVIState/pci
+ hw/isa/piix4.c: before realizing PIIX4State/rtc
+ hw/misc/auxbus.c: when creating an AUXBus
+ hw/misc/auxbus.c: when creating an AUXBus child
+ hw/misc/macio/macio.c: when initializing a MACIOState child
+ hw/misc/macio/macio.c: before realizing NewWorldMacIOState/pmu
+ hw/misc/macio/macio.c: before realizing NewWorldMacIOState/cuda
+ hw/net/virtio-net.c: Used for migration when using the failover
   mechanism to migration a vfio-pci/net. It is
   a no-op because at this point the device is
   already on the bus.
+ hw/pci-host/designware.c: before realizing DesignwarePCIEHost/root
+ hw/pci-host/gpex.c: before realizing GPEXHost/root
+ hw/pci-host/prep.c: when initializaing PREPPCIState/pci_dev
+ hw/pci-host/q35.c: before realizing Q35PCIHost/mch
+ hw/pci-host/versatile.c: when initializing PCIVPBState/pci_dev
+ hw/pci-host/xilinx-pcie.c: before realizing XilinxPCIEHost/root
+ hw/s390x/event-facility.c: when creating SCLPEventFacility/
 TYPE_SCLP_QUIESCE
+ hw/s390x/event-facility.c: ditto with SCLPEventFacility/
 TYPE_SCLP_CPU_HOTPLUG
+ hw/s390x/sclp.c: Not trivial because it is called on a SLCPDevice
  just after realizing it. Ok because at this point the destination
  bus (sysbus) is not in reset; the realize step is before the
  machine reset.
+ hw/sd/core.c: Not OK. Used in sdbus_reparent_card(). See below.
+ hw/ssi/ssi.c: Used to put spi slave on spi bus and connect the cs
  line in ssi_auto_connect_slave(). Ok because this function is only
  used in realize step in hw/ssi/aspeed_smc.ci, hw/ssi/imx_spi.c,
  hw/ssi/mss-spi.c, hw/ssi/xilinx_spi.c and hw/ssi/xilinx_spips.c.
+ hw/xen/xen-legacy-backend.c: when creating a XenLegacyDevice device
+ qdev-monitor.c: in device hotplug creation procedure before realize

Note that this commit alone will have no effect, right now there is no
use of resettable API to reset anything. So a bus will never be tagged
as in-reset by this same API.

The one place where side-effect will occurs is in hw/sd/core.c in
sdbus_reparent_card(). This function is only used in the raspi machines,
including during the sysbus reset procedure. This case will be
carrefully handled when doing the multiple phase reset transition.

Signed-off-by: Damien Hedde 
Reviewed-by: Peter Maydell 
Reviewed-by: Richard Henderson 
---

v6 update: there are now 3 more call sites (52 instead of 49).
+ hw/isa/piix4.c
+ hw/net/virtio-net.c
+ hw/virtio/vhost-user-fs-pci.c (in list below)

Exhaustive list of the 29 "virtio" caller to qdev_set_parent_bus():
+ hw/display/virtio-gpu-pci.c: VirtIOGPUPCIBase/vgpu realize
+ hw/display/virtio-vga.c: VirtIOVGABase/vgpu realize
+ hw/s390x/vhost-vsock-ccw.c:  VHostVSockCCWState/vdev realize
+ hw/s390x/virtio-ccw-9p.c:V9fsCCWState/vdev realize
+ hw/s390x/virtio-ccw-balloon.c:   VirtIOBalloonCcw/vdev realize
+ hw/s390x/virtio-ccw-blk.c:   VirtIOBlkCcw/vdev realize
+ hw/s390x/virtio-ccw-crypto.c:VirtIOCryptoCcw/vdev realize
+ hw/s390x/virtio-ccw-gpu.c:   VirtIOGPUCcw/vdev realize
+ hw/s390x/virtio-ccw-input.c: VirtIOInputCcw/vdev realize
+ hw/s390x/virtio-ccw-net.c:   VirtIONetCcw/vdev realize
+ hw/s390x/virtio-ccw-rng.c:   VirtIORNGCcw/vdev realize
+ hw/s390x/virtio-ccw-scsi.c:  VirtIOSCSICcw/vdev realize
+ hw/s390x/virtio-ccw-scsi.c:  VHostSCSICcw/vdev realize
+ hw/s390x/virtio-ccw-serial.c:VirtioSerialCcw/vdev realize
+ hw/virtio/vhost-scsi-pci.c:  VHostSCSIPCI/vdev realize
+ hw/virtio/vhost-user-blk-pci.c:  VHostUserBlkPCI/vdev realize
+ hw/virtio/vhost-user-fs-pci.c:   VHostUserFSPCI/vdev realize
+ hw/virtio/vhost-user-scsi-pci.c: VHostUserSCSIPCI/vdev realize
+ hw/virtio/vhost-vsock-pci.c: VHostVSockPCI/vdev realize
+ hw/virtio/virtio-9p-pci.c:   V9fsPCIState/vdev realize
+ hw/virtio/virtio-balloon-pci.c: