Re: [Qemu-devel] [PATCH 9/9] tests: cris: add v17 ADDC test

[Edgar E. Iglesias]

On Mon, Sep 05, 2016 at 01:54:12PM +0200, Rabin Vincent wrote:
> From: Rabin Vincent 
> 
> Add a test for the newly implemented ADDC instruction in the v17 CRIS
> CPU.
> 
> Signed-off-by: Rabin Vincent 


Acked-by: Edgar E. Iglesias 


> ---
>  tests/tcg/cris/Makefile| 19 ++--
>  tests/tcg/cris/check_addcv17.s | 65 
> ++
>  2 files changed, 82 insertions(+), 2 deletions(-)
>  create mode 100644 tests/tcg/cris/check_addcv17.s
> 
> diff --git a/tests/tcg/cris/Makefile b/tests/tcg/cris/Makefile
> index 14a9eb5..6b3dba4 100644
> --- a/tests/tcg/cris/Makefile
> +++ b/tests/tcg/cris/Makefile
> @@ -23,6 +23,7 @@ SYS= sys.o
>  TESTCASES += check_abs.tst
>  TESTCASES += check_addc.tst
>  TESTCASES += check_addcm.tst
> +TESTCASES += check_addcv17.tst
>  TESTCASES += check_addo.tst
>  TESTCASES += check_addoq.tst
>  TESTCASES += check_addi.tst
> @@ -134,13 +135,27 @@ all: build
>  %.ctst: %.o
>   $(CC) $(CFLAGS) $(LDLIBS) $< -o $@
>  
> +
> +sysv10.o: sys.c
> + $(CC) $(CFLAGS) -mcpu=v10 -c $< -o $@
> +
> +crtv10.o: crt.s
> + $(AS) $(ASFLAGS) -mcpu=v10 -c $< -o $@
> +
> +check_addcv17.tst: ASFLAGS += -mcpu=v10
> +check_addcv17.tst: CRT := crtv10.o
> +check_addcv17.tst: SYS := sysv10.o
> +check_addcv17.tst: crtv10.o sysv10.o
> +
>  build: $(CRT) $(SYS) $(TESTCASES)
>  
>  check: $(CRT) $(SYS) $(TESTCASES)
>   @echo -e "\nQEMU simulator."
>   for case in $(TESTCASES); do \
>   echo -n "$$case "; \
> - $(SIM) ./$$case; \
> + SIMARGS=; \
> + case $$case in *v17*) SIMARGS="-cpu crisv17";; esac; \
> + $(SIM) $$SIMARGS ./$$case; \
>   done
>  check-g: $(CRT) $(SYS) $(TESTCASES)
>   @echo -e "\nGDB simulator."
> @@ -150,4 +165,4 @@ check-g: $(CRT) $(SYS) $(TESTCASES)
>   done
>  
>  clean:
> - $(RM) -fr $(TESTCASES) $(CRT) $(SYS)
> + $(RM) -fr $(TESTCASES) *.o
> diff --git a/tests/tcg/cris/check_addcv17.s b/tests/tcg/cris/check_addcv17.s
> new file mode 100644
> index 000..52ef7a9
> --- /dev/null
> +++ b/tests/tcg/cris/check_addcv17.s
> @@ -0,0 +1,65 @@
> +# mach:  crisv17
> +
> + .include "testutils.inc"
> +
> + .macro addc Rs Rd inc=0
> +# Create the instruction manually since there is no assembler support yet
> + .word (\Rd << 12) | \Rs | (\inc << 10) | 0x09a0
> + .endm
> +
> + start
> +
> + .data
> +mem1:
> + .dword 0x0
> +mem2:
> + .dword 0x12345678
> +
> + .text
> + move.d mem1,r4
> + clearf nzvc
> + addc 4 3
> + test_cc 0 1 0 0
> + checkr3 0
> +
> + move.d mem1,r4
> + clearf nzvc
> + ax
> + addc 4 3
> + test_cc 0 0 0 0
> + checkr3 0
> +
> + move.d mem1,r4
> + clearf nzvc
> + setf c
> + addc 4 3
> + test_cc 0 0 0 0
> + checkr3 1
> +
> + move.d mem2,r4
> + moveq 2, r3
> + clearf nzvc
> + setf c
> + addc 4 3
> + test_cc 0 0 0 0
> + checkr3 1234567b
> +
> + move.d mem2,r5
> + clearf nzvc
> + cmp.d r4,r5
> + test_cc 0 1 0 0
> +
> + move.d mem2,r4
> + moveq 2, r3
> + clearf nzvc
> + addc 4 3 inc=1
> + test_cc 0 0 0 0
> + checkr3 1234567a
> +
> + move.d mem2,r5
> + clearf nzvc
> + addq 4,r5
> + cmp.d r4,r5
> + test_cc 0 1 0 0
> +
> + quit
> -- 
> 2.1.4
> 

[Qemu-devel] [PATCH 9/9] tests: cris: add v17 ADDC test

[Rabin Vincent]

From: Rabin Vincent 

Add a test for the newly implemented ADDC instruction in the v17 CRIS
CPU.

Signed-off-by: Rabin Vincent 
---
 tests/tcg/cris/Makefile| 19 ++--
 tests/tcg/cris/check_addcv17.s | 65 ++
 2 files changed, 82 insertions(+), 2 deletions(-)
 create mode 100644 tests/tcg/cris/check_addcv17.s

diff --git a/tests/tcg/cris/Makefile b/tests/tcg/cris/Makefile
index 14a9eb5..6b3dba4 100644
--- a/tests/tcg/cris/Makefile
+++ b/tests/tcg/cris/Makefile
@@ -23,6 +23,7 @@ SYS= sys.o
 TESTCASES += check_abs.tst
 TESTCASES += check_addc.tst
 TESTCASES += check_addcm.tst
+TESTCASES += check_addcv17.tst
 TESTCASES += check_addo.tst
 TESTCASES += check_addoq.tst
 TESTCASES += check_addi.tst
@@ -134,13 +135,27 @@ all: build
 %.ctst: %.o
$(CC) $(CFLAGS) $(LDLIBS) $< -o $@
 
+
+sysv10.o: sys.c
+   $(CC) $(CFLAGS) -mcpu=v10 -c $< -o $@
+
+crtv10.o: crt.s
+   $(AS) $(ASFLAGS) -mcpu=v10 -c $< -o $@
+
+check_addcv17.tst: ASFLAGS += -mcpu=v10
+check_addcv17.tst: CRT := crtv10.o
+check_addcv17.tst: SYS := sysv10.o
+check_addcv17.tst: crtv10.o sysv10.o
+
 build: $(CRT) $(SYS) $(TESTCASES)
 
 check: $(CRT) $(SYS) $(TESTCASES)
@echo -e "\nQEMU simulator."
for case in $(TESTCASES); do \
echo -n "$$case "; \
-   $(SIM) ./$$case; \
+   SIMARGS=; \
+   case $$case in *v17*) SIMARGS="-cpu crisv17";; esac; \
+   $(SIM) $$SIMARGS ./$$case; \
done
 check-g: $(CRT) $(SYS) $(TESTCASES)
@echo -e "\nGDB simulator."
@@ -150,4 +165,4 @@ check-g: $(CRT) $(SYS) $(TESTCASES)
done
 
 clean:
-   $(RM) -fr $(TESTCASES) $(CRT) $(SYS)
+   $(RM) -fr $(TESTCASES) *.o
diff --git a/tests/tcg/cris/check_addcv17.s b/tests/tcg/cris/check_addcv17.s
new file mode 100644
index 000..52ef7a9
--- /dev/null
+++ b/tests/tcg/cris/check_addcv17.s
@@ -0,0 +1,65 @@
+# mach:  crisv17
+
+ .include "testutils.inc"
+
+ .macro addc Rs Rd inc=0
+# Create the instruction manually since there is no assembler support yet
+ .word (\Rd << 12) | \Rs | (\inc << 10) | 0x09a0
+ .endm
+
+ start
+
+ .data
+mem1:
+ .dword 0x0
+mem2:
+ .dword 0x12345678
+
+ .text
+ move.d mem1,r4
+ clearf nzvc
+ addc 4 3
+ test_cc 0 1 0 0
+ checkr3 0
+
+ move.d mem1,r4
+ clearf nzvc
+ ax
+ addc 4 3
+ test_cc 0 0 0 0
+ checkr3 0
+
+ move.d mem1,r4
+ clearf nzvc
+ setf c
+ addc 4 3
+ test_cc 0 0 0 0
+ checkr3 1
+
+ move.d mem2,r4
+ moveq 2, r3
+ clearf nzvc
+ setf c
+ addc 4 3
+ test_cc 0 0 0 0
+ checkr3 1234567b
+
+ move.d mem2,r5
+ clearf nzvc
+ cmp.d r4,r5
+ test_cc 0 1 0 0
+
+ move.d mem2,r4
+ moveq 2, r3
+ clearf nzvc
+ addc 4 3 inc=1
+ test_cc 0 0 0 0
+ checkr3 1234567a
+
+ move.d mem2,r5
+ clearf nzvc
+ addq 4,r5
+ cmp.d r4,r5
+ test_cc 0 1 0 0
+
+ quit
-- 
2.1.4