Re: [Qemu-devel] [PATCH v1 07/22] RISC-V: Remove unused class definitions from

2018-03-06 Thread Michael Clark
On Wed, Mar 7, 2018 at 5:14 PM, Michael Clark wrote: > > > On Wed, Mar 7, 2018 at 12:27 PM, Philippe Mathieu-Daudé > wrote: > >> >> Ok until here. >> >> > diff --git a/include/hw/riscv/sifive_e.h b/include/hw/riscv/sifive_e.h >> > index 0aebc57..818fbdc 100644

Re: [Qemu-devel] [PATCH v1 07/22] RISC-V: Remove unused class definitions from

2018-03-06 Thread Michael Clark
On Wed, Mar 7, 2018 at 12:27 PM, Philippe Mathieu-Daudé wrote: > Hi Michael, > > On 03/06/2018 05:43 PM, Michael Clark wrote: > > Removes a whole lot of unnecessary boilerplate code. Machines > > don't need to be objects. The expansion of the SOC object model > > for the RISC-V

[Qemu-devel] [PATCH v1 07/22] RISC-V: Remove unused class definitions from

2018-03-06 Thread Michael Clark
Removes a whole lot of unnecessary boilerplate code. Machines don't need to be objects. The expansion of the SOC object model for the RISC-V machines will happen in the future as SiFive plans to add their FE310 and FU540 SOCs to QEMU. However, it seems that this present boilerplate is complete