Hello David,
On 05/10/2018 09:15 PM, Dr. David Alan Gilbert wrote:
> * Peter Maydell (peter.mayd...@linaro.org) wrote:
>> On 9 May 2018 at 12:08, Dr. David Alan Gilbert wrote:
>>> This thread seems to have stalled; we've got the list of potential
>>> migration breaks that Peter found and only som
* Peter Maydell (peter.mayd...@linaro.org) wrote:
> On 9 May 2018 at 12:08, Dr. David Alan Gilbert wrote:
> > This thread seems to have stalled; we've got the list of potential
> > migration breaks that Peter found and only some minor comments on the
> > actual patch.
> >
> > I'd like to get it go
On 09/05/2018 13:33, Peter Maydell wrote:
>
> I don't think we need to fix those first, but:
>
> * we should note in the commit message for this patch that
>it is a de-facto migration break for those boards
> * we should fix those devices/boards in this release cycle,
>since we've broke
On 9 May 2018 at 12:08, Dr. David Alan Gilbert wrote:
> This thread seems to have stalled; we've got the list of potential
> migration breaks that Peter found and only some minor comments on the
> actual patch.
>
> I'd like to get it going again sicne as well as Cédric, and Peter's
> cases, there'
This thread seems to have stalled; we've got the list of potential
migration breaks that Peter found and only some minor comments on the
actual patch.
I'd like to get it going again sicne as well as Cédric, and Peter's
cases, there's Lai Jiangshan and now Eric Wheeler was asking for
something simi
On 21 April 2018 at 09:52, Cédric Le Goater wrote:
> On 04/20/2018 02:09 PM, Peter Maydell wrote:
>> Notes:
>> * any device that registers a ramblock globally is a bit dodgy, because
>> it means you can't have more than one of it (the ramblock names would
>> clash). We should fix those devices fo
On 04/20/2018 02:09 PM, Peter Maydell wrote:
> On 13 April 2018 at 08:52, Cédric Le Goater wrote:
>> On the POWER9 processor, the XIVE interrupt controller can control
>> interrupt sources using MMIO to trigger events, to EOI or to turn off
>> the sources. Priority management and interrupt acknowl
On 13 April 2018 at 08:52, Cédric Le Goater wrote:
> On the POWER9 processor, the XIVE interrupt controller can control
> interrupt sources using MMIO to trigger events, to EOI or to turn off
> the sources. Priority management and interrupt acknowledgment is also
> controlled by MMIO in the presen
On Fri, Apr 20, 2018 at 10:14:15AM +0200, KONRAD Frederic wrote:
>
>
> On 04/19/2018 07:45 PM, Edgar E. Iglesias wrote:
> > On Thu, Apr 19, 2018 at 06:32:07PM +0100, Peter Maydell wrote:
> > > On 13 April 2018 at 08:52, Cédric Le Goater wrote:
> > > > On the POWER9 processor, the XIVE interrupt
On 04/20/2018 10:47 AM, Peter Maydell wrote:
> On 20 April 2018 at 07:59, Cédric Le Goater wrote:
>> Hello David,
>>
>> On 04/19/2018 06:58 PM, Dr. David Alan Gilbert wrote:
>>> * Cédric Le Goater (c...@kaod.org) wrote:
@@ -1823,6 +1831,7 @@ void qemu_ram_set_idstr(RAMBlock *new_block, const
On 20 April 2018 at 07:59, Cédric Le Goater wrote:
> Hello David,
>
> On 04/19/2018 06:58 PM, Dr. David Alan Gilbert wrote:
>> * Cédric Le Goater (c...@kaod.org) wrote:
>>> @@ -1823,6 +1831,7 @@ void qemu_ram_set_idstr(RAMBlock *new_block, const
>>> char *name, DeviceState *dev)
>>> }
>>
On 04/19/2018 07:45 PM, Edgar E. Iglesias wrote:
On Thu, Apr 19, 2018 at 06:32:07PM +0100, Peter Maydell wrote:
On 13 April 2018 at 08:52, Cédric Le Goater wrote:
On the POWER9 processor, the XIVE interrupt controller can control
interrupt sources using MMIO to trigger events, to EOI or to t
Hello David,
On 04/19/2018 06:58 PM, Dr. David Alan Gilbert wrote:
> * Cédric Le Goater (c...@kaod.org) wrote:
>> On the POWER9 processor, the XIVE interrupt controller can control
>> interrupt sources using MMIO to trigger events, to EOI or to turn off
>> the sources. Priority management and inte
On Thu, Apr 19, 2018 at 06:32:07PM +0100, Peter Maydell wrote:
> On 13 April 2018 at 08:52, Cédric Le Goater wrote:
> > On the POWER9 processor, the XIVE interrupt controller can control
> > interrupt sources using MMIO to trigger events, to EOI or to turn off
> > the sources. Priority management
On 13 April 2018 at 08:52, Cédric Le Goater wrote:
> On the POWER9 processor, the XIVE interrupt controller can control
> interrupt sources using MMIO to trigger events, to EOI or to turn off
> the sources. Priority management and interrupt acknowledgment is also
> controlled by MMIO in the presen
* Cédric Le Goater (c...@kaod.org) wrote:
> On the POWER9 processor, the XIVE interrupt controller can control
> interrupt sources using MMIO to trigger events, to EOI or to turn off
> the sources. Priority management and interrupt acknowledgment is also
> controlled by MMIO in the presenter sub-en
On 13 April 2018 at 12:18, Juan Quintela wrote:
> no-re...@patchew.org wrote:
>> === OUTPUT BEGIN ===
>> Checking PATCH 1/1: migration: discard non-migratable RAMBlocks...
>> ERROR: Macros with multiple statements should be enclosed in a do - while
>> loop
>> #96: FILE: migration/ram.c:191:
>> +#
no-re...@patchew.org wrote:
> Hi,
>
> This series seems to have some coding style problems. See output below for
> more information:
>
> Type: series
> Message-id: 20180413075200.15217-1-...@kaod.org
> Subject: [Qemu-devel] [PATCH v2] migration: discard non-migratable R
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 20180413075200.15217-1-...@kaod.org
Subject: [Qemu-devel] [PATCH v2] migration: discard non-migratable RAMBlocks
=== TEST SCRIPT BEGIN ===
#!/bin/bash
BASE=base
n=1
total
On the POWER9 processor, the XIVE interrupt controller can control
interrupt sources using MMIO to trigger events, to EOI or to turn off
the sources. Priority management and interrupt acknowledgment is also
controlled by MMIO in the presenter sub-engine.
These MMIO regions are exposed to guests in
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