Re: [Qemu-devel] [PATCH v2 01/17] RISC-V: add vfp field in CPURISCVState

2019-09-17 Thread liuzhiwei
On 2019/9/11 下午10:51, Chih-Min Chao wrote: On Wed, Sep 11, 2019 at 2:35 PM liuzhiwei > wrote: From: LIU Zhiwei mailto:zhiwei_...@c-sky.com>> Signed-off-by: LIU Zhiwei mailto:zhiwei_...@c-sky.com>> ---  target/riscv/cpu.h | 28

Re: [Qemu-devel] [PATCH v2 01/17] RISC-V: add vfp field in CPURISCVState

2019-09-12 Thread Richard Henderson
On 9/12/19 10:53 AM, Chih-Min Chao wrote: > > > On Thu, Sep 12, 2019 at 6:39 AM Richard Henderson > > wrote: > > On 9/11/19 10:51 AM, Chih-Min Chao wrote: > > Could  the VLEN be configurable in cpu initialization but not fixed in > >

Re: [Qemu-devel] [PATCH v2 01/17] RISC-V: add vfp field in CPURISCVState

2019-09-12 Thread Chih-Min Chao
On Thu, Sep 12, 2019 at 6:39 AM Richard Henderson < richard.hender...@linaro.org> wrote: > On 9/11/19 10:51 AM, Chih-Min Chao wrote: > > Could the VLEN be configurable in cpu initialization but not fixed in > > compilation phase ? > > Take the integer element as example and the difference

Re: [Qemu-devel] [PATCH v2 01/17] RISC-V: add vfp field in CPURISCVState

2019-09-11 Thread Richard Henderson
On 9/11/19 10:51 AM, Chih-Min Chao wrote: > Could the VLEN be configurable in cpu initialization but not fixed in > compilation phase ? > Take the integer element as example and the difference should be the > stride of vfp.vreg[x] isn't continuous Do you really want an unbounded amount of

Re: [Qemu-devel] [PATCH v2 01/17] RISC-V: add vfp field in CPURISCVState

2019-09-11 Thread Richard Henderson
On 9/11/19 2:25 AM, liuzhiwei wrote: > uint64_t fpr[32]; /* assume both F and D extensions */ > + > +/* vector coprocessor state. */ > +struct { > +union VECTOR { > +float64 f64[VUNIT(64)]; > +float32 f32[VUNIT(32)]; > +float16

Re: [Qemu-devel] [PATCH v2 01/17] RISC-V: add vfp field in CPURISCVState

2019-09-11 Thread Chih-Min Chao
On Wed, Sep 11, 2019 at 2:35 PM liuzhiwei wrote: > From: LIU Zhiwei > > Signed-off-by: LIU Zhiwei > --- > target/riscv/cpu.h | 28 > 1 file changed, 28 insertions(+) > > diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h > index 0adb307..c992b1d 100644 > ---

[Qemu-devel] [PATCH v2 01/17] RISC-V: add vfp field in CPURISCVState

2019-09-11 Thread liuzhiwei
From: LIU Zhiwei Signed-off-by: LIU Zhiwei --- target/riscv/cpu.h | 28 1 file changed, 28 insertions(+) diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index 0adb307..c992b1d 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -93,9 +93,37 @@ typedef