Re: [Qemu-devel] [V5 0/6] AMD IOMMU interrupt remapping

2016-09-29 Thread David Kiarie
On Tue, Sep 20, 2016 at 8:40 PM, David Kiarie  wrote:
> Hello all,
>
> This patchset mainly adds AMD IOMMU interrupt remapping logic to Qemu. Doing 
> that
> I have solved an existing issue where platform devices are not able to make 
> interrupt
> requests with and explicit SID.
>
> This series is based on the previously sent AMD IOMMU patchset and is 
> available here[1]
>
> Changes since v4
>   -Removed SID enforcement from Intel IOMMU.
>   -changed the code so that cache invalidation handler triggers with each 
> invalidation from IOMMU
>   -A few other miscallaneous fixes all suggested by Peter.

I'd very much appreciate feedback on these patches especially the part
that touches some KVM related code. This patchset enables platform
devices to make interrupt requests using an explicit SID(which is what
IOMMUs expect). The current Qemu code includes a hack that treats
IOAPIC as a special device which I believe the relevant team is not
fixing since these patches are known to be lying around.

David.

>
>
> [1] https://github.com/aslaq/qemu ir
>
> David Kiarie (6):
>   hw/msi: Allow platform devices to use explicit SID
>   hw/i386: enforce SID verification
>   hw/iommu: Prepare for AMD IOMMU interrupt remapping
>   hw/iommu: AMD IOMMU interrupt remapping
>   hw/acpi: report IOAPIC on IVRS
>   hw/iommu: share common code between IOMMUs
>
>  hw/i386/acpi-build.c  |   2 +
>  hw/i386/amd_iommu.c   | 206 
> +-
>  hw/i386/amd_iommu.h   |  80 +++
>  hw/i386/intel_iommu.c |  84 +++-
>  hw/i386/kvm/pci-assign.c  |  12 ++-
>  hw/i386/trace-events  |   7 ++
>  hw/i386/x86-iommu.c   |   8 ++
>  hw/intc/ioapic.c  |  33 --
>  hw/misc/ivshmem.c |   6 +-
>  hw/vfio/pci.c |   6 +-
>  hw/virtio/virtio-pci.c|   7 +-
>  include/hw/i386/ioapic_internal.h |   1 +
>  include/hw/i386/x86-iommu.h   |   2 +-
>  include/sysemu/kvm.h  |  25 +++--
>  kvm-all.c |  11 +-
>  kvm-stub.c|   5 +-
>  target-arm/kvm.c  |   3 +-
>  target-i386/kvm.c |  15 +--
>  target-mips/kvm.c |   3 +-
>  target-ppc/kvm.c  |   3 +-
>  target-s390x/kvm.c|   3 +-
>  21 files changed, 427 insertions(+), 95 deletions(-)
>
> --
> 2.1.4
>



[Qemu-devel] [V5 0/6] AMD IOMMU interrupt remapping

2016-09-20 Thread David Kiarie
Hello all, 

This patchset mainly adds AMD IOMMU interrupt remapping logic to Qemu. Doing 
that
I have solved an existing issue where platform devices are not able to make 
interrupt
requests with and explicit SID.

This series is based on the previously sent AMD IOMMU patchset and is available 
here[1]

Changes since v4
  -Removed SID enforcement from Intel IOMMU.
  -changed the code so that cache invalidation handler triggers with each 
invalidation from IOMMU
  -A few other miscallaneous fixes all suggested by Peter.


[1] https://github.com/aslaq/qemu ir

David Kiarie (6):
  hw/msi: Allow platform devices to use explicit SID
  hw/i386: enforce SID verification
  hw/iommu: Prepare for AMD IOMMU interrupt remapping
  hw/iommu: AMD IOMMU interrupt remapping
  hw/acpi: report IOAPIC on IVRS
  hw/iommu: share common code between IOMMUs

 hw/i386/acpi-build.c  |   2 +
 hw/i386/amd_iommu.c   | 206 +-
 hw/i386/amd_iommu.h   |  80 +++
 hw/i386/intel_iommu.c |  84 +++-
 hw/i386/kvm/pci-assign.c  |  12 ++-
 hw/i386/trace-events  |   7 ++
 hw/i386/x86-iommu.c   |   8 ++
 hw/intc/ioapic.c  |  33 --
 hw/misc/ivshmem.c |   6 +-
 hw/vfio/pci.c |   6 +-
 hw/virtio/virtio-pci.c|   7 +-
 include/hw/i386/ioapic_internal.h |   1 +
 include/hw/i386/x86-iommu.h   |   2 +-
 include/sysemu/kvm.h  |  25 +++--
 kvm-all.c |  11 +-
 kvm-stub.c|   5 +-
 target-arm/kvm.c  |   3 +-
 target-i386/kvm.c |  15 +--
 target-mips/kvm.c |   3 +-
 target-ppc/kvm.c  |   3 +-
 target-s390x/kvm.c|   3 +-
 21 files changed, 427 insertions(+), 95 deletions(-)

-- 
2.1.4