Re: [PATCH v2 06/10] hw/i386/iommu: Remove IntelIOMMUState::dma_drain field

2026-03-10 Thread Zhao Liu
On Mon, Mar 09, 2026 at 03:50:08PM +0100, Philippe Mathieu-Daudé wrote:
> Date: Mon,  9 Mar 2026 15:50:08 +0100
> From: Philippe Mathieu-Daudé 
> Subject: [PATCH v2 06/10] hw/i386/iommu: Remove IntelIOMMUState::dma_drain
>  field
> X-Mailer: git-send-email 2.53.0
> 
> The IntelIOMMUState::dma_drain boolean was only set in
> the pc_compat_3_1[] array, via the 'dma-drain=off' property.
> We removed all machines using that array, lets remove that
> property and all the code around it.
> 
> Signed-off-by: Philippe Mathieu-Daudé 
> Reviewed-by: Thomas Huth 
> Message-Id: <[email protected]>
> ---
>  include/hw/i386/intel_iommu.h |  1 -
>  hw/i386/intel_iommu.c | 11 +--
>  2 files changed, 1 insertion(+), 11 deletions(-)

Reviewed-by: Zhao Liu 




Re: [PATCH v2 06/10] hw/i386/iommu: Remove IntelIOMMUState::dma_drain field

2026-03-09 Thread CLEMENT MATHIEU--DRIF
Hi Phil,

Thanks for that!

Reviewed-by: Clement Mathieu--Drif 

On Mon, 2026-03-09 at 15:50 +0100, Philippe Mathieu-Daudé wrote:
> The IntelIOMMUState::dma_drain boolean was only set in  
> the pc_compat_3_1[] array, via the 'dma-drain=off' property.  
> We removed all machines using that array, lets remove that  
> property and all the code around it.
> 
> Signed-off-by: Philippe Mathieu-Daudé 
> <[[email protected]](mailto:[email protected])>  
> Reviewed-by: Thomas Huth <[[email protected]](mailto:[email protected])>  
> Message-Id: 
> <[[email protected]](mailto:[email protected])>
>   
> ---  
>  include/hw/i386/intel_iommu.h |  1 -  
>  hw/i386/intel_iommu.c | 11 +--  
>  2 files changed, 1 insertion(+), 11 deletions(-)
> 
> diff --git a/include/hw/i386/intel_iommu.h b/include/hw/i386/intel_iommu.h  
> index 54c2b6b77a0..e44ce318417 100644  
> --- a/include/hw/i386/intel_iommu.h  
> +++ b/include/hw/i386/intel_iommu.h  
> @@ -314,7 +314,6 @@ struct IntelIOMMUState {  
>  bool intr_eime; /* Extended interrupt mode enabled */  
>  OnOffAuto intr_eim; /* Toggle for EIM cabability */  
>  uint8_t aw_bits;    /* Host/IOVA address width (in bits) */  
> -    bool dma_drain; /* Whether DMA r/w draining enabled */  
>  bool pasid; /* Whether to support PASID */  
>  bool fs1gp; /* First Stage 1-GByte Page Support */  
>    
> diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c  
> index d24ba989bfc..f395fa248c0 100644  
> --- a/hw/i386/intel_iommu.c  
> +++ b/hw/i386/intel_iommu.c  
> @@ -4205,7 +4205,6 @@ static const Property vtd_properties[] = {  
>  DEFINE_PROP_BOOL("snoop-control", IntelIOMMUState, snoop_control, 
> false),  
>  DEFINE_PROP_BOOL("x-pasid-mode", IntelIOMMUState, pasid, false),  
>  DEFINE_PROP_BOOL("svm", IntelIOMMUState, svm, false),  
> -    DEFINE_PROP_BOOL("dma-drain", IntelIOMMUState, dma_drain, true),  
>  DEFINE_PROP_BOOL("stale-tm", IntelIOMMUState, stale_tm, false),  
>  DEFINE_PROP_BOOL("fs1gp", IntelIOMMUState, fs1gp, true),  
>  };  
> @@ -5000,11 +4999,8 @@ static void vtd_cap_init(IntelIOMMUState *s)  
>  X86IOMMUState *x86_iommu = X86_IOMMU_DEVICE(s);  
>    
>  s->cap = VTD_CAP_FRO | VTD_CAP_NFR | VTD_CAP_ND | VTD_ECAP_PT |  
> - VTD_CAP_MAMV | VTD_CAP_PSI | VTD_CAP_SSLPS |  
> + VTD_CAP_MAMV | VTD_CAP_PSI | VTD_CAP_SSLPS | VTD_CAP_DRAIN |  
>   VTD_CAP_ESRTPS | VTD_CAP_MGAW(s->aw_bits);  
> -    if (s->dma_drain) {  
> -    s->cap |= VTD_CAP_DRAIN;  
> -    }  
>  if (x86_iommu->dma_translation) {  
>  if (s->aw_bits >= VTD_HOST_AW_39BIT) {  
>  s->cap |= VTD_CAP_SAGAW_39bit;  
> @@ -5582,11 +5578,6 @@ static bool vtd_decide_config(IntelIOMMUState *s, 
> Error **errp)  
>  return false;  
>  }  
>    
> -    if (s->scalable_mode && !s->dma_drain) {  
> -    error_setg(errp, "Need to set dma_drain for scalable mode");  
> -    return false;  
> -    }  
> -  
>  if (s->pasid && !s->scalable_mode) {  
>  error_setg(errp, "Need to set scalable mode for PASID");  
>  return false;