On Tue, Jul 24, 2018 at 04:40:15PM +0200, Paolo Bonzini wrote:
> On 24/07/2018 16:39, Eduardo Habkost wrote:
> > On Tue, Jul 24, 2018 at 12:29:12PM +0100, Dr. David Alan Gilbert wrote:
> >> * Liran Alon (liran.a...@oracle.com) wrote:
> >>> This MSR returns the number of #SMIs that occurred on
> >>>
On 24/07/2018 16:39, Eduardo Habkost wrote:
> On Tue, Jul 24, 2018 at 12:29:12PM +0100, Dr. David Alan Gilbert wrote:
>> * Liran Alon (liran.a...@oracle.com) wrote:
>>> This MSR returns the number of #SMIs that occurred on
>>> CPU since boot.
>>>
>>> KVM commit 52797bf9a875 ("KVM: x86: Add emulatio
On Tue, Jul 24, 2018 at 12:29:12PM +0100, Dr. David Alan Gilbert wrote:
> * Liran Alon (liran.a...@oracle.com) wrote:
> > This MSR returns the number of #SMIs that occurred on
> > CPU since boot.
> >
> > KVM commit 52797bf9a875 ("KVM: x86: Add emulation of MSR_SMI_COUNT")
> > introduced support fo
* Liran Alon (liran.a...@oracle.com) wrote:
> This MSR returns the number of #SMIs that occurred on
> CPU since boot.
>
> KVM commit 52797bf9a875 ("KVM: x86: Add emulation of MSR_SMI_COUNT")
> introduced support for emulating this MSR.
>
> This commit adds support for QEMU to save/load this
> MSR
On 13/03/2018 01:22, Liran Alon wrote:
>
> Another gentle ping.
>
> (Just following "If your patch seems to have been ignored" section in QEMU's
> submitting patches guidelines...)
>
> - liran.a...@oracle.com wrote:
>
>> Gentle ping.
>> (https://urldefense.proofpoint.com/v2/url?u=http-3A__
Another gentle ping.
(Just following "If your patch seems to have been ignored" section in QEMU's
submitting patches guidelines...)
- liran.a...@oracle.com wrote:
> Gentle ping.
> (https://urldefense.proofpoint.com/v2/url?u=http-3A__patchwork.ozlabs.org_patch_878657_&d=DwIFaQ&c=RoP1YumCXCg
Gentle ping.
(http://patchwork.ozlabs.org/patch/878657/)
- liran.a...@oracle.com wrote:
> This MSR returns the number of #SMIs that occurred on
> CPU since boot.
>
> KVM commit 52797bf9a875 ("KVM: x86: Add emulation of MSR_SMI_COUNT")
> introduced support for emulating this MSR.
>
> This c