Re: [Qemu-devel] [PATCH] hw/pxa2xx_dma.c
Hi,
On 15/11/2007, Thorsten Zitterell [EMAIL PROTECTED] wrote:
The following patch fixes the problem that DMA transfers are not performed
when
the DCSR_STOPINTR bit is set.
--
Thorsten
Index: hw/pxa2xx_dma.c
===
RCS file: /sources/qemu/qemu/hw/pxa2xx_dma.c,v
retrieving revision 1.5
diff -u -r1.5 pxa2xx_dma.c
--- hw/pxa2xx_dma.c 11 Nov 2007 19:47:58 - 1.5
+++ hw/pxa2xx_dma.c 15 Nov 2007 09:28:22 -
@@ -186,7 +186,8 @@
s-running = 1;
for (c = 0; c s-channels; c ++) {
ch = s-chan[c];
-
+
+ch-state = ~DCSR_STOPINTR;
while ((ch-state DCSR_RUN) !(ch-state DCSR_STOPINTR)) {
/* Test for pending requests */
if ((ch-cmd (DCMD_FLOWSRC | DCMD_FLOWTRG))
!ch-request)
Can you check if the following change would make the gumstix NIC work
too? In my understanding of the specs it's more correct, but I'm not
sure.
diff --git a/hw/pxa2xx_dma.c b/hw/pxa2xx_dma.c
index 4c60ffd..7067a78 100644
--- a/hw/pxa2xx_dma.c
+++ b/hw/pxa2xx_dma.c
@@ -342,7 +343,7 @@ static void pxa2xx_dma_write(void *opaque,
DCSR_STARTINTR | DCSR_BUSERRINTR));
s-chan[channel].state |= value 0xfc80;
-if (s-chan[channel].state DCSR_STOPIRQEN)
+if (s-chan[channel].state (DCSR_STOPIRQEN | DCSR_RUN))
s-chan[channel].state = ~DCSR_STOPINTR;
if (value DCSR_NODESCFETCH) {
@@ -352,7 +353,6 @@ static void pxa2xx_dma_write(void *opaque,
} else {
/* Descriptor-fetch mode */
if (value DCSR_RUN) {
-s-chan[channel].state = ~DCSR_STOPINTR;
pxa2xx_dma_descriptor_fetch(s, channel);
pxa2xx_dma_run(s);
}
Regards
diff --git a/hw/pxa2xx_dma.c b/hw/pxa2xx_dma.c
index 4c60ffd..7067a78 100644
--- a/hw/pxa2xx_dma.c
+++ b/hw/pxa2xx_dma.c
@@ -342,7 +343,7 @@ static void pxa2xx_dma_write(void *opaque,
DCSR_STARTINTR | DCSR_BUSERRINTR));
s-chan[channel].state |= value 0xfc80;
-if (s-chan[channel].state DCSR_STOPIRQEN)
+if (s-chan[channel].state (DCSR_STOPIRQEN | DCSR_RUN))
s-chan[channel].state = ~DCSR_STOPINTR;
if (value DCSR_NODESCFETCH) {
@@ -352,7 +353,6 @@ static void pxa2xx_dma_write(void *opaque,
} else {
/* Descriptor-fetch mode */
if (value DCSR_RUN) {
-s-chan[channel].state = ~DCSR_STOPINTR;
pxa2xx_dma_descriptor_fetch(s, channel);
pxa2xx_dma_run(s);
}
Re: [Qemu-devel] [PATCH] hw/pxa2xx_dma.c
On 17/11/2007, andrzej zaborowski [EMAIL PROTECTED] wrote:
Hi,
On 15/11/2007, Thorsten Zitterell [EMAIL PROTECTED] wrote:
The following patch fixes the problem that DMA transfers are not performed
when
the DCSR_STOPINTR bit is set.
--
Thorsten
Index: hw/pxa2xx_dma.c
===
RCS file: /sources/qemu/qemu/hw/pxa2xx_dma.c,v
retrieving revision 1.5
diff -u -r1.5 pxa2xx_dma.c
--- hw/pxa2xx_dma.c 11 Nov 2007 19:47:58 - 1.5
+++ hw/pxa2xx_dma.c 15 Nov 2007 09:28:22 -
@@ -186,7 +186,8 @@
s-running = 1;
for (c = 0; c s-channels; c ++) {
ch = s-chan[c];
-
+
+ch-state = ~DCSR_STOPINTR;
while ((ch-state DCSR_RUN) !(ch-state DCSR_STOPINTR))
{
/* Test for pending requests */
if ((ch-cmd (DCMD_FLOWSRC | DCMD_FLOWTRG))
!ch-request)
Can you check if the following change would make the gumstix NIC work
too? In my understanding of the specs it's more correct, but I'm not
sure.
Sorry, rather this is what I meant:
--- a/hw/pxa2xx_dma.c
+++ b/hw/pxa2xx_dma.c
@@ -347,8 +348,10 @@ static void pxa2xx_dma_write(void *opaque,
if (value DCSR_NODESCFETCH) {
/* No-descriptor-fetch mode */
-if (value DCSR_RUN)
+if (value DCSR_RUN) {
+s-chan[channel].state = ~DCSR_STOPINTR;
pxa2xx_dma_run(s);
+}
} else {
/* Descriptor-fetch mode */
if (value DCSR_RUN) {
diff --git a/hw/pxa2xx_dma.c b/hw/pxa2xx_dma.c
index 4c60ffd..048cb93 100644
--- a/hw/pxa2xx_dma.c
+++ b/hw/pxa2xx_dma.c
@@ -347,8 +348,10 @@ static void pxa2xx_dma_write(void *opaque,
if (value DCSR_NODESCFETCH) {
/* No-descriptor-fetch mode */
-if (value DCSR_RUN)
+if (value DCSR_RUN) {
+s-chan[channel].state = ~DCSR_STOPINTR;
pxa2xx_dma_run(s);
+}
} else {
/* Descriptor-fetch mode */
if (value DCSR_RUN) {
Re: [Qemu-devel] [PATCH] hw/pxa2xx_dma.c
Can you check if the following change would make the gumstix NIC work too? In my understanding of the specs it's more correct, but I'm not sure. It works!
