On Thu, Jun 14, 2018 at 05:38:16PM -1000, Richard Henderson wrote:
> On 06/14/2018 03:45 PM, David Gibson wrote:
> >>> To wit, the instructions are recognized and transactions always fail.
> >>> Which is
> >>> not a bad way to test the required fallback paths that rarely fail on
> >>> hardware.
On 06/14/2018 03:45 PM, David Gibson wrote:
>>> To wit, the instructions are recognized and transactions always fail.
>>> Which is
>>> not a bad way to test the required fallback paths that rarely fail on
>>> hardware.
>>> ;-)
>>
>> If TM instructions don't cause an exception, I guess its reaso
On Fri, Jun 15, 2018 at 12:00:20AM +0200, Greg Kurz wrote:
> On Thu, 14 Jun 2018 09:52:55 -1000
> Richard Henderson wrote:
>
> > On 06/12/2018 10:19 PM, Greg Kurz wrote:
> > > I'm confused... I don't see anything related to HTM in TCG. Also we have
> > > the following in cap_htm_apply():
> > >
>
On Thu, 14 Jun 2018 09:52:55 -1000
Richard Henderson wrote:
> On 06/12/2018 10:19 PM, Greg Kurz wrote:
> > I'm confused... I don't see anything related to HTM in TCG. Also we have
> > the following in cap_htm_apply():
> >
> > if (tcg_enabled()) {
> > error_setg(errp,
> >
On 06/12/2018 10:19 PM, Greg Kurz wrote:
> I'm confused... I don't see anything related to HTM in TCG. Also we have
> the following in cap_htm_apply():
>
> if (tcg_enabled()) {
> error_setg(errp,
>"No Transactional Memory support in TCG, try cap-htm=off");
>
> I'm
On Wed, Jun 13, 2018 at 04:26:39PM +0200, Greg Kurz wrote:
> On Wed, 13 Jun 2018 22:05:02 +1000
> David Gibson wrote:
>
> > On Wed, Jun 13, 2018 at 10:19:15AM +0200, Greg Kurz wrote:
> > > On Wed, 13 Jun 2018 10:45:06 +1000
> > > David Gibson wrote:
> > >
> > > > On Tue, Jun 12, 2018 at 07:04
On Wed, 13 Jun 2018 22:05:02 +1000
David Gibson wrote:
> On Wed, Jun 13, 2018 at 10:19:15AM +0200, Greg Kurz wrote:
> > On Wed, 13 Jun 2018 10:45:06 +1000
> > David Gibson wrote:
> >
> > > On Tue, Jun 12, 2018 at 07:04:15PM +0200, Greg Kurz wrote:
> > > > Bits set in the PCR disable feature
On Wed, Jun 13, 2018 at 10:19:15AM +0200, Greg Kurz wrote:
> On Wed, 13 Jun 2018 10:45:06 +1000
> David Gibson wrote:
>
> > On Tue, Jun 12, 2018 at 07:04:15PM +0200, Greg Kurz wrote:
> > > Bits set in the PCR disable features of the processor. TCG currently
> > > doesn't implement that, ie, we al
On Wed, 13 Jun 2018 10:45:06 +1000
David Gibson wrote:
> On Tue, Jun 12, 2018 at 07:04:15PM +0200, Greg Kurz wrote:
> > Bits set in the PCR disable features of the processor. TCG currently
> > doesn't implement that, ie, we always act like if PCR is all zeros.
> >
> > But it is still possible fo
On Tue, Jun 12, 2018 at 07:04:15PM +0200, Greg Kurz wrote:
> Bits set in the PCR disable features of the processor. TCG currently
> doesn't implement that, ie, we always act like if PCR is all zeros.
>
> But it is still possible for the PCR to have a non-null value. This may
> confuse the guest.
>
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