Hi Michael,
Long time ago debugged one problem with embARC and I remember I was also
puzzled with itss interrupt handling approach.
The board itself can fit only prebootloader in the ROM, and interrupt handling
is kept in embARC itself.
But, the projects is aimed to support several different
Hi Igor,
I will try to compile this example and test my implementations.
Thank you,
Michael
On Mon, Sep 19, 2016 at 3:55 PM, Igor Guryanov
wrote:
> Hi Michael,
>
>
>
> Long time ago debugged one problem with embARC and I remember I was also
> puzzled with itss
Hi Michael,
I'm pretty sure embARC was not meant to be run on ARCompact (AKA ISAv1 cores
like ARC600 & ARC700) instead targets were ARCv2 cores like ARC EM and ARC HS.
Unfortunately I have no experience with embARC so adding more experienced
person in the thread (Igor Guryanov) who may shed
H Alexey.
Thanks.
I need some help in getting a small code that exercises interrupts. For
several years I wrote FW for ARC based platforms (ARC4 & ARC6), but it
seems I forgot some of the things related to interrupts. I compiled
FreeRTOS demo from embARC, however I could not find interrupt
Hi Michael,
On Fri, 2016-09-09 at 01:31 +0300, Michael Rolnik wrote:
> This series of patches adds ARC target to QEMU. It indends to support
> - ARCtangent-A5 processor
> - ARC 600 processor
> - ARC 700 processor
>
> All instructions except ASLS are implemented. Not fully tested yet.