Re: [Qemu-devel] [qemu-s390x] [PATCH-for-4.2 v2 6/6] s390x/mmu: Factor out storage key handling
On 14.08.19 20:01, Thomas Huth wrote:
> On 8/14/19 9:23 AM, David Hildenbrand wrote:
>> Factor it out, add a comment how it all works, and also use it in the
>> REAL MMU.
>>
>> Reviewed-by: Cornelia Huck
>> Signed-off-by: David Hildenbrand
>> ---
>> target/s390x/mmu_helper.c | 113 +++---
>> 1 file changed, 69 insertions(+), 44 deletions(-)
>>
>> diff --git a/target/s390x/mmu_helper.c b/target/s390x/mmu_helper.c
>> index 6cc81a29b6..e125837d68 100644
>> --- a/target/s390x/mmu_helper.c
>> +++ b/target/s390x/mmu_helper.c
>> @@ -334,6 +334,73 @@ static int mmu_translate_asce(CPUS390XState *env,
>> target_ulong vaddr,
>> return r;
>> }
>>
>> +static void mmu_handle_skey(target_ulong addr, int rw, int *flags)
>> +{
>> +static S390SKeysClass *skeyclass;
>> +static S390SKeysState *ss;
>> +uint8_t key;
>> +int rc;
>> +
>> +if (unlikely(!ss)) {
>> +ss = s390_get_skeys_device();
>> +skeyclass = S390_SKEYS_GET_CLASS(ss);
>> +}
>> +
>> +/*
>> + * Whenever we create a new TLB entry, we set the storage key reference
>> + * bit. In case we allow write accesses, we set the storage key change
>> + * bit. Whenever the guest changes the storage key, we have to flush the
>> + * TLBs of all CPUs (the whole TLB or all affected entries), so that the
>> + * next reference/change will result in an MMU fault and make us
>> properly
>> + * update the storage key here.
>> + *
>> + * Note 1: "record of references ... is not necessarily accurate",
>> + * "change bit may be set in case no storing has occurred".
>> + * -> We can set reference/change bits even on exceptions.
>> + * Note 2: certain accesses seem to ignore storage keys. For example,
>> + * DAT translation does not set reference bits for table
>> accesses.
>> + *
>> + * TODO: key-controlled protection. Only CPU accesses make use of the
>> + * PSW key. CSS accesses are different - we have to pass in the
>> key.
>> + *
>> + * TODO: we have races between getting and setting the key.
>> + */
>> +if (addr < ram_size) {
>
> If you want to get rid of some indentation, you could do an early return
> if (addr >= ram_size) here instead.
Right, that makes a lot of sense, will do this. Thanks!
>
> Anyway, good idea to refactor this code, so also in its current shape:
>
> Reviewed-by: Thomas Huth
>
--
Thanks,
David / dhildenb
Re: [Qemu-devel] [qemu-s390x] [PATCH-for-4.2 v2 6/6] s390x/mmu: Factor out storage key handling
On 8/14/19 9:23 AM, David Hildenbrand wrote:
> Factor it out, add a comment how it all works, and also use it in the
> REAL MMU.
>
> Reviewed-by: Cornelia Huck
> Signed-off-by: David Hildenbrand
> ---
> target/s390x/mmu_helper.c | 113 +++---
> 1 file changed, 69 insertions(+), 44 deletions(-)
>
> diff --git a/target/s390x/mmu_helper.c b/target/s390x/mmu_helper.c
> index 6cc81a29b6..e125837d68 100644
> --- a/target/s390x/mmu_helper.c
> +++ b/target/s390x/mmu_helper.c
> @@ -334,6 +334,73 @@ static int mmu_translate_asce(CPUS390XState *env,
> target_ulong vaddr,
> return r;
> }
>
> +static void mmu_handle_skey(target_ulong addr, int rw, int *flags)
> +{
> +static S390SKeysClass *skeyclass;
> +static S390SKeysState *ss;
> +uint8_t key;
> +int rc;
> +
> +if (unlikely(!ss)) {
> +ss = s390_get_skeys_device();
> +skeyclass = S390_SKEYS_GET_CLASS(ss);
> +}
> +
> +/*
> + * Whenever we create a new TLB entry, we set the storage key reference
> + * bit. In case we allow write accesses, we set the storage key change
> + * bit. Whenever the guest changes the storage key, we have to flush the
> + * TLBs of all CPUs (the whole TLB or all affected entries), so that the
> + * next reference/change will result in an MMU fault and make us properly
> + * update the storage key here.
> + *
> + * Note 1: "record of references ... is not necessarily accurate",
> + * "change bit may be set in case no storing has occurred".
> + * -> We can set reference/change bits even on exceptions.
> + * Note 2: certain accesses seem to ignore storage keys. For example,
> + * DAT translation does not set reference bits for table
> accesses.
> + *
> + * TODO: key-controlled protection. Only CPU accesses make use of the
> + * PSW key. CSS accesses are different - we have to pass in the
> key.
> + *
> + * TODO: we have races between getting and setting the key.
> + */
> +if (addr < ram_size) {
If you want to get rid of some indentation, you could do an early return
if (addr >= ram_size) here instead.
Anyway, good idea to refactor this code, so also in its current shape:
Reviewed-by: Thomas Huth
