> -Original Message-
> From: Cédric Le Goater
> Sent: Saturday, December 20, 2025 1:00 AM
> To: Kane Chen ; Peter Maydell
> ; Steven Lee ; Troy
> Lee ; Jamin Lin ; Andrew
> Jeffery ; Joel Stanley ;
> open list:ASPEED BMCs ; open list:All patches CC
> here
> Cc: Troy Lee
> Subject: Re: [SPAM] [PATCH v3 04/18] hw/arm/aspeed: Add AST1700 LTPI
> expander device model
>
> On 12/8/25 08:44, Kane Chen wrote:
> > From: Kane-Chen-AS
> >
> > Introduce a minimal QEMU device model for the ASPEED AST1700, an
> > MCU-less I/O expander used in the LTPI topology defined by the DC-SCM
> > 2.0 specification (see figure 2):
> > https://www.opencompute.org/documents/ocp-dc-scm-2-0-ltpi-ver-1-0-pdf
> >
> > This initial implementation includes:
> >
> > * Definition of aspeed.ast1700 as a SysBusDevice
> >
> > * Setup of a basic memory region to reserve I/O space for future
> >peripheral modeling
> >
> > This stub establishes the foundation for LTPI-related device
> > emulation, without implementing any functional peripherals at this stage.
> >
> > Signed-off-by: Kane-Chen-AS
> > ---
> > include/hw/arm/aspeed_ast1700.h | 23
> > hw/arm/aspeed_ast1700.c | 48
> +
> > hw/arm/meson.build | 1 +
> > 3 files changed, 72 insertions(+)
> > create mode 100644 include/hw/arm/aspeed_ast1700.h
> > create mode 100644 hw/arm/aspeed_ast1700.c
> >
> > diff --git a/include/hw/arm/aspeed_ast1700.h
> > b/include/hw/arm/aspeed_ast1700.h new file mode 100644 index
> > 00..2a95ebfe89
> > --- /dev/null
> > +++ b/include/hw/arm/aspeed_ast1700.h
> > @@ -0,0 +1,23 @@
> > +/*
> > + * ASPEED AST1700 IO Expander
> > + *
> > + * Copyright (C) 2025 ASPEED Technology Inc.
> > + *
> > + * SPDX-License-Identifier: GPL-2.0-or-later */ #ifndef
> > +ASPEED_AST1700_H #define ASPEED_AST1700_H
> > +
> > +#include "hw/sysbus.h"
> > +
> > +#define TYPE_ASPEED_AST1700 "aspeed.ast1700"
> > +
> > +OBJECT_DECLARE_SIMPLE_TYPE(AspeedAST1700SoCState,
> ASPEED_AST1700)
> > +
> > +struct AspeedAST1700SoCState {
> > +SysBusDevice parent_obj;
> > +
> > +MemoryRegion iomem;
> > +};
> > +
> > +#endif /* ASPEED_AST1700_H */
> > diff --git a/hw/arm/aspeed_ast1700.c b/hw/arm/aspeed_ast1700.c new
> > file mode 100644 index 00..f564b9b242
> > --- /dev/null
> > +++ b/hw/arm/aspeed_ast1700.c
> > @@ -0,0 +1,48 @@
> > +/*
> > + * ASPEED AST1700 IO Expander
> > + *
> > + * Copyright (C) 2025 ASPEED Technology Inc.
> > + *
> > + * SPDX-License-Identifier: GPL-2.0-or-later */
> > +
> > +#include "qemu/osdep.h"
> > +#include "hw/boards.h"
> > +#include "hw/qdev-core.h"
> > +#include "qom/object.h"
> > +#include "hw/arm/aspeed_ast1700.h"
> > +
> > +#define AST2700_SOC_LTPI_SIZE0x0100
> > +
> > +static void aspeed_ast1700_realize(DeviceState *dev, Error **errp) {
> > +AspeedAST1700SoCState *s = ASPEED_AST1700(dev);
> > +SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
> > +
> > +/* Occupy memory space for all controllers in AST1700 */
> > +memory_region_init(&s->iomem, OBJECT(s), TYPE_ASPEED_AST1700,
> > + AST2700_SOC_LTPI_SIZE);
> > +sysbus_init_mmio(sbd, &s->iomem); }
> > +
> > +static void aspeed_ast1700_class_init(ObjectClass *klass, const void
> > +*data) {
> > +DeviceClass *dc = DEVICE_CLASS(klass);
> > +
> > +dc->realize = aspeed_ast1700_realize; }
> > +
> > +static const TypeInfo aspeed_ast1700_info = {
> > +.name = TYPE_ASPEED_AST1700,
> > +.parent= TYPE_SYS_BUS_DEVICE,
> > +.instance_size = sizeof(AspeedAST1700SoCState),
> > +.class_init= aspeed_ast1700_class_init,
> > +.abstract = false,
>
> You can drop the .abstract assignment.
>
>
> > +};
> > +
> > +static void aspeed_ast1700_register_types(void)
> > +{
> > +type_register_static(&aspeed_ast1700_info);
> > +}
> > +
> > +type_init(aspeed_ast1700_register_types);
> > diff --git a/hw/arm/meson.build b/hw/arm/meson.build index
> > aeaf654790..ee26a05dc9 100644
> > --- a/hw/arm/meson.build
> > +++ b/hw/arm/meson.build
> > @@ -42,6 +42,7 @@ arm_common_ss.add(when: 'CONFIG_FSL_IMX31',
> if_true: files('fsl-imx31.c', 'kzm.c
> > arm_common_ss.add(when: 'CONFIG_FSL_IMX6', if_true:
> files('fsl-imx6.c'))
> > arm_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files(
> > 'aspeed.c',
> > + 'aspeed_ast1700.c',
>
> This should be under TARGET_AARCH64 ? right ?
>
> Thanks,
>
> C.
Hi Cédric,
Yes, TARGET_AARCH64 should be the correct one for current usage.
I will remove the .abstract assignment in the next patch. Thank you.
Best Regards,
Kane
>
> > 'aspeed_soc_common.c',
> > 'aspeed_ast2400.c',
> > 'aspeed_ast2400_palmetto.c',
