I see I see. So instead of creating a bigger TB that starts from the start
of the TB to the particular I/O instruction, only a single TB would be
created that contains only one instruction, which is the I/O instruction.
Many thanks for letting me know.
Best Regards,
Arnab
On Sat, Mar 24, 2018 at
On 23 March 2018 at 19:47, Arnabjyoti Kalita wrote:
> Hi Peter,
>
> Yes only I could see that. Sorry for dumping out incomplete logs :)
>
> Well I think I figured out the source of this representation of repeating TB
> blocks. Your 3rd point in your previous answer was
Hi Peter,
Yes only I could see that. Sorry for dumping out incomplete logs :)
Well I think I figured out the source of this representation of repeating
TB blocks. Your 3rd point in your previous answer was the solution. The
fact that QEMU in TCG mode executes I/O instructions at the end of the
On 22 March 2018 at 22:34, Arnabjyoti Kalita wrote:
> From what I can see from the logs, it is quite hard to tell why this occurs.
> I am afraid I might have to disagree with your point 2. If it was an MMU
> page fault, one of the TCG blocks would have started executing
>From what I can see from the logs, it is quite hard to tell why this
occurs. I am afraid I might have to disagree with your point 2. If it was
an MMU page fault, one of the TCG blocks would have started executing the
page fault handlers already - which I do not see in the TCG execution flow
yet
On 21 March 2018 at 20:22, Arnabjyoti Kalita wrote:
> I see that in the trace file, some of the TCG blocks seem to be translated
> more than once -
>
> ( NOTE: I am not using the TB Cache/Hash Table and have managed to disable
> it in the QEMU code )
>
> IN:
>