A proposal for an extension of the J1 expansion connector to three rows.
The intent is for it to be backwards compatible with all traditional 64-pin
expansion cards.
The purpose of the 96-pin expansion connector is:
* to increase address and data space for 32-bit CPUs by adding D8-D31 and
A20,A21
Hi Dave,
Nice idea. I feel that it would be diligent to go for at least 4 more
address lines (I need at least 16 mb with QPC). With that in mind it
might be good to place them to match the new extended data lines ie A20
- 23 on pins C15 - C18.
Cheers,
Malcolm
On 14/01/2014 11:45, Dave Park
I have had two other requests for a 16MB address range, so I will add
A22,A23.
I am concerned that placing them on the pins you suggest could create
unnecessary difficulties for 2-layer designs. I will look at options and
take further suggestions before making a revision.
Thanks for your input
I guess upper and lower data strobes would be required although A0 might
be used for the upper one.
On 14/01/2014 11:45, Dave Park wrote:
A proposal for an extension of the J1 expansion connector to three rows.
The intent is for it to be backwards compatible with all traditional 64-pin
