Am 03.02.21 um 21:02 schrieb Bill Gaylord:
> I haven't made much progress on my attempt to write my own target for
> SDCC yet. Mostly because I sat down and re-designed my CPU from the
> bottom up. Mostly in the instruction set and not really in the
> architecture itself, although it is now primari
I haven't made much progress on my attempt to write my own target for SDCC
yet. Mostly because I sat down and re-designed my CPU from the bottom up.
Mostly in the instruction set and not really in the architecture itself,
although it is now primarily a 16-bit CPU with instructions for interacting
w
I was looking at LLVM at first but its documention on writing a new back is
crazy complex and doesnt explain much.
I have a working python emulator also working on one in C. Not sure if that
helps at all.
On Thu, Nov 12, 2020, 7:16 AM Philipp Klaus Krause wrote:
> Am 12.11.20 um 13:48 schrieb R
Am 12.11.20 um 13:48 schrieb Ralph Doncaster:
> I found the code generators for libfirm/cparser a lot easier to follow
> than gcc.
A yes, I forgot to mention the Firm compiler. That one might indeed be
another alternative.
Philipp
___
Sdcc-user mailin
I found the code generators for libfirm/cparser a lot easier to follow than
gcc.
On Thu, Nov 12, 2020, 08:07 Philipp Klaus Krause wrote:
> Am 11.11.20 um 23:50 schrieb Bill Gaylord:
> > Yes. I have no special purpose registers that you can directly access.
> > The stack top register you have to
Am 11.11.20 um 23:50 schrieb Bill Gaylord:
> Yes. I have no special purpose registers that you can directly access.
> The stack top register you have to use an instruction to actually look
> at or change.
>
> I can link to my horrible google sheets for my Instruction set if that
> helps at all. B
On Wed, 11 Nov 2020, Bill Gaylord wrote:
I can link to my horrible google sheets for my Instruction set if that
helps at all.
Dear Bill,
SDCC needs a simulator too. To implement support in uCsim, we need as
much information as you can provide...
Daniel
___
On Tue, 10 Nov 2020, Bill Gaylord wrote:
I am working on a homebrew CPU / System and want to "port" C to it. (I
already have a slightly above Assembly like language for it.)
I'm in somehow similar situation. I've an own-designed processor, what
I use on FPGA, mainly for educational purposes
Yes. I have no special purpose registers that you can directly access. The
stack top register you have to use an instruction to actually look at or
change.
I can link to my horrible google sheets for my Instruction set if that
helps at all. But basically all arithmetic logic types of instructions
Am 11.11.20 um 17:55 schrieb Bill Gaylord:
> Its got 16 8 bit registers […]
Are these general-purpose? How orthogonal is the instruction set?
Philipp
___
Sdcc-user mailing list
Sdcc-user@lists.sourceforge.net
https://lists.sourceforge.net/lists/list
Its got 16 8 bit registers with access to 64K of ram. (At least directly)
It has conditional branching and also a "stack" which is based off a "top"
internal register that holds the value of the top of the stack that you can
access to load and store it. (And also to initially set up the stack.) I
Am 11.11.20 um 05:43 schrieb Bill Gaylord:
> Hello,
> Is there any sort of straight forward guide to adding a new target to
> SDCC?
> I am working on a homebrew CPU / System and want to "port" C to it.
> (I already have a slightly above Assembly like language for it.)
>
> If you could p
On 11/10/20 11:43 PM, Bill Gaylord wrote:
Is there any sort of straight forward guide to adding a new target
to SDCC?
I am working on a homebrew CPU / System and want to "port" C to it.
(I already have a slightly above Assembly like language for it.)
If you could point me in the ri
Hello,
Is there any sort of straight forward guide to adding a new target to
SDCC?
I am working on a homebrew CPU / System and want to "port" C to it. (I
already have a slightly above Assembly like language for it.)
If you could point me in the right direction that would be greatly
apprec
14 matches
Mail list logo
