Re: [SeaBIOS] [Xen-devel] [PATCHv2 0/6] Improved multi-platform support

2013-02-20 Thread Ian Campbell
On Tue, 2013-02-19 at 10:51 +, David Woodhouse wrote: On Tue, 2013-02-19 at 10:20 +, Ian Campbell wrote: I expect there will be some rough edges like the NV variable thing -- I have a feeling these will have a lot in common with qemu/KVM, since they would tend to interact with the

Re: [SeaBIOS] [Qemu-devel] [RFC PATCH] Distinguish between reset types

2013-02-20 Thread David Woodhouse
On Wed, 2013-02-20 at 16:34 +0100, Paolo Bonzini wrote: Il 20/02/2013 16:18, Laszlo Ersek ha scritto: I'm beginning to wish I'd just ignored the fact that we need a properly working soft reset to get back from 286 protected mode to real mode, and wired up the damn PAM reset

[SeaBIOS] placement of emulated flash [was: seabios Improved multi-platform support]

2013-02-20 Thread Laszlo Ersek
Regarding the ACPI tables, OVMF takes them from Xen. It scans 0x000EA020 to 0x000F for the RSDP and goes from there. See OvmfPkg/AcpiPlatformDxe/Xen.c. I'm not sure about the e820 table. In hvmloader's build_e820_table() [tools/firmware/hvmloader/e820.c], a range starting at RESERVED_MEMBASE

Re: [SeaBIOS] placement of emulated flash [was: seabios Improved multi-platform support]

2013-02-20 Thread Ian Campbell
On Wed, 2013-02-20 at 17:55 +0100, Laszlo Ersek wrote: However in OVMF the RESERVED_MEMBASE range is not parsed from this Xen-exported table, it is added manually in InitializeXen() [OvmfPkg/PlatformPei/Xen.c]: // // Reserve away HVMLOADER reserved memory [0xFC00,0xFD00). //

Re: [SeaBIOS] placement of emulated flash [was: seabios Improved multi-platform support]

2013-02-20 Thread Laszlo Ersek
On 02/20/13 18:18, Ian Campbell wrote: On Wed, 2013-02-20 at 17:55 +0100, Laszlo Ersek wrote: However in OVMF the RESERVED_MEMBASE range is not parsed from this Xen-exported table, it is added manually in InitializeXen() [OvmfPkg/PlatformPei/Xen.c]: // // Reserve away HVMLOADER reserved

Re: [SeaBIOS] [Qemu-devel] [RESEND PATCH v2 1/2] seabios q35: Enable all PIRQn IRQs at startup

2013-02-20 Thread Kevin O'Connor
On Fri, Feb 15, 2013 at 02:11:35PM -0700, Alex Williamson wrote: We seem to use the IRQEN bit of the PIRQn registers interchangeably to select APIC mode or to disable an IRQ. I can't decide if we're intending to disable the IRQ or select APIC mode here, but in either case it prevents PIC mode

Re: [SeaBIOS] [Qemu-devel] [RESEND PATCH v2 2/2] seabios q35: Add new PCI slot to irq routing function

2013-02-20 Thread Kevin O'Connor
On Fri, Feb 15, 2013 at 02:11:41PM -0700, Alex Williamson wrote: q35/ich9 doesn't use the same interrupt mapping function as i440fx/piix. PIRQA:D and PIRQE:H are programmed identically, but we start at index 0, not index -1. Slots 25 through 31 are also programmed independently. When

Re: [SeaBIOS] [PATCH] Report on f-segment UMB ram also.

2013-02-20 Thread Kevin O'Connor
On Tue, Feb 19, 2013 at 09:16:30AM +, David Woodhouse wrote: On Mon, 2013-02-18 at 10:34 -0500, Kevin O'Connor wrote: Some old DOS programs can also use f-segment space as Upper Memory Blocks (UMB), so also report on what space is available in debug messages. Should we mark it as

Re: [SeaBIOS] [Qemu-devel] [RESEND PATCH v2 2/2] seabios q35: Add new PCI slot to irq routing function

2013-02-20 Thread Alex Williamson
On Wed, 2013-02-20 at 23:29 -0500, Kevin O'Connor wrote: On Fri, Feb 15, 2013 at 02:11:41PM -0700, Alex Williamson wrote: q35/ich9 doesn't use the same interrupt mapping function as i440fx/piix. PIRQA:D and PIRQE:H are programmed identically, but we start at index 0, not index -1. Slots

Re: [SeaBIOS] [Qemu-devel] [RESEND PATCH v2 0/2] seabios q35: Fix seabios IRQ mapping and setup

2013-02-20 Thread Gerd Hoffmann
On 02/15/13 22:11, Alex Williamson wrote: This enables interrupts to work pre-boot for assigned devices. I had self nak'd and resent a v2 patch for 2/2, but there were never any comments, so resending the whole series as v2. Thanks, btw: With all the reorg going on in master atm I think it