On Tue, May 16, 2017 at 06:27:03PM +0200, Paolo Bonzini wrote:
> On 16/05/2017 18:14, Kevin O'Connor wrote:
> > Don't write to the cmos index port on a mode switch if NMI is already
> > disabled. This reduces the number of outb() calls.
> >
> > Signed-off-by: Kevin O'Connor
On 16/05/2017 18:14, Kevin O'Connor wrote:
> Don't write to the cmos index port on a mode switch if NMI is already
> disabled. This reduces the number of outb() calls.
>
> Signed-off-by: Kevin O'Connor
> ---
> src/stacks.c | 13 +
> 1 file changed, 9
Initialize the Call16Data at startup - otherwise some early yield()
calls may check for interrupts without using the preferred A20
setting.
Signed-off-by: Kevin O'Connor
---
src/stacks.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/stacks.c b/src/stacks.c
index
The A20 setting is almost always enabled - only issue an outb() if the
A20 is actually changing. This reduces the number of outb() calls.
Signed-off-by: Kevin O'Connor
---
src/fw/smm.c | 6 --
src/stacks.c | 4 +++-
src/x86.h| 7 ---
3 files changed, 11
QEMU does not store the A20 setting in the SMM cpu environment area
(and it does not look like real CPUs do either). So, manually backup
and restore A20 on a mode switch.
Signed-off-by: Kevin O'Connor
---
src/fw/smm.c | 9 -
1 file changed, 8 insertions(+), 1
On Di, 2017-05-16 at 15:39 +0200, Rudolf Marek wrote:
> Hi all,
>
> Perhaps you already noticed. There are efforts to resurrect true 16-bit only
> x86
> GCC port [1][2]. I added it coreboot cross toolchain script.
>
> https://review.coreboot.org/#/c/19711/
>
> You can compile it ./buildgcc
Hi all,
Perhaps you already noticed. There are efforts to resurrect true 16-bit only x86
GCC port [1][2]. I added it coreboot cross toolchain script.
https://review.coreboot.org/#/c/19711/
You can compile it ./buildgcc -j4 -p ia16-elf
So far, I only tried to compile some simple programs, but