Re: [SeaBIOS] [qemu PATCH for 2.10] i386: acpi: provide an XSDT instead of an RSDT

On Fri, Jul 28, 2017 at 04:20:10PM +0200, Laszlo Ersek wrote: > On 07/27/17 22:40, Kevin O'Connor wrote: > > On Wed, Jul 26, 2017 at 11:31:36AM +0200, Paolo Bonzini wrote: > >> The tables that QEMU provides are not ACPI 1.0 compatible since commit > >> 77af8a2b95 ("hw/i386: Use Rev3 FADT (ACPI

[SeaBIOS] [PATCH v3 5/5] docs: update documentation considering PCIE-PCI bridge

Signed-off-by: Aleksandr Bezzubikov --- docs/pcie.txt| 46 ++ docs/pcie_pci_bridge.txt | 121 +++ 2 files changed, 147 insertions(+), 20 deletions(-) create mode 100644 docs/pcie_pci_bridge.txt diff

[SeaBIOS] [PATCH v3 0/5] Generic PCIE-PCI Bridge

This series introduces a new device - generic PCI Express to PCI bridge, and also makes all necessary changes to enable hotplug of the bridge itself and any device into the bridge. Changes v2->v3: (0). 'do_not_use' capability field flag is still _not_ in here since we haven't come to consesus on

[SeaBIOS] [PATCH v3 2/5] hw/pci: introduce pcie-pci-bridge device

Introduce a new PCIExpress-to-PCI Bridge device, which is a hot-pluggable PCI Express device and supports devices hot-plug with SHPC. This device is intended to replace the DMI-to-PCI Bridge in an overwhelming majority of use-cases. Signed-off-by: Aleksandr Bezzubikov ---

[SeaBIOS] [PATCH v3 3/5] hw/pci: introduce bridge-only vendor-specific capability to provide some hints to firmware

On PCI init PCI bridges may need some extra info about bus number to reserve, IO, memory and prefetchable memory limits. QEMU can provide this with a special vendor-specific PCI capability. Signed-off-by: Aleksandr Bezzubikov --- hw/pci/pci_bridge.c | 37

[SeaBIOS] [PATCH v3 1/5] hw/i386: allow SHPC for Q35 machine

Unmask previously masked SHPC feature in _OSC method. Signed-off-by: Aleksandr Bezzubikov --- hw/i386/acpi-build.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index 6b7bade..2ab32f9 100644 ---

[SeaBIOS] [PATCH v3 4/5] hw/pci: add QEMU-specific PCI capability to Generic PCI Express Root Port

From: Aleksandr Bezzubikov To enable hotplugging of a newly created pcie-pci-bridge, we need to tell firmware (SeaBIOS in this case) to reserve additional buses for pcie-root-port, that allows us to hotplug pcie-pci-bridge into this root port. The number of buses to

[SeaBIOS] [PATCH v3 3/3] pci: enable RedHat PCI bridges to reserve additional buses on PCI init

In case of Red Hat Generic PCIE Root Port reserve additional buses, which number is provided in a vendor-specific capability. Signed-off-by: Aleksandr Bezzubikov --- src/fw/pciinit.c | 37 +++-- src/hw/pci_ids.h | 3 +++ src/types.h | 2

[SeaBIOS] [PATCH v3 2/3] pci: add QEMU-specific PCI capability structure

On PCI init PCI bridge devices may need some extra info about bus number to reserve, IO, memory and prefetchable memory limits. QEMU can provide this with special vendor-specific PCI capability. This capability is intended to be used only for Red Hat PCI bridges, i.e. QEMU cooperation.

[SeaBIOS] [PATCH v3 1/3] pci: refactor pci_find_capapibilty to get bdf as the first argument instead of the whole pci_device

Refactor pci_find_capability function to get bdf instead of a whole pci_device* as the only necessary field for this function is still bdf. Reviewed-by: Marcel Apfelbaum Signed-off-by: Aleksandr Bezzubikov --- src/fw/pciinit.c| 4 ++-- src/hw/pci.c

Re: [SeaBIOS] [RFC PATCH v2 5/6] hw/pci: add bus_reserve property to pcie-root-port

On Tue, Jul 25, 2017 at 02:49:49PM +0300, Marcel Apfelbaum wrote: > On 25/07/2017 0:58, Michael S. Tsirkin wrote: > > On Tue, Jul 25, 2017 at 12:41:12AM +0300, Alexander Bezzubikov wrote: > > > 2017-07-24 23:46 GMT+03:00 Michael S. Tsirkin : > > > > On Sun, Jul 23, 2017 at

Re: [SeaBIOS] [RFC PATCH v2 4/6] hw/pci: introduce bridge-only vendor-specific capability to provide some hints to firmware

On Thu, Jul 27, 2017 at 03:58:58PM +0200, Laszlo Ersek wrote: > On 07/27/17 11:39, Marcel Apfelbaum wrote: > > On 27/07/2017 2:28, Michael S. Tsirkin wrote: > >> On Thu, Jul 27, 2017 at 12:54:07AM +0300, Alexander Bezzubikov wrote: > >>> 2017-07-26 22:43 GMT+03:00 Michael S. Tsirkin

Re: [SeaBIOS] [RFC PATCH v2 4/6] hw/pci: introduce bridge-only vendor-specific capability to provide some hints to firmware

On Thu, Jul 27, 2017 at 12:39:54PM +0300, Marcel Apfelbaum wrote: > On 27/07/2017 2:28, Michael S. Tsirkin wrote: > > On Thu, Jul 27, 2017 at 12:54:07AM +0300, Alexander Bezzubikov wrote: > > > 2017-07-26 22:43 GMT+03:00 Michael S. Tsirkin : > > > > On Sun, Jul 23, 2017 at

Re: [SeaBIOS] [qemu PATCH for 2.10] i386: acpi: provide an XSDT instead of an RSDT

On 07/27/17 22:40, Kevin O'Connor wrote: > On Wed, Jul 26, 2017 at 11:31:36AM +0200, Paolo Bonzini wrote: >> The tables that QEMU provides are not ACPI 1.0 compatible since commit >> 77af8a2b95 ("hw/i386: Use Rev3 FADT (ACPI 2.0) instead of Rev1 to improve >> guest OS support.", 2017-05-03). This

[SeaBIOS] [PATCH v2 2/2] usb-xhci: use hub portmap

xhci controllers have two virtual ports per (usb3 capable) physical port, one for usb2 and one for usb3 devices. Add a hub portmap callback to map the virtual ports to physical ports. Signed-off-by: Gerd Hoffmann --- src/hw/usb-xhci.c | 45

[SeaBIOS] [PATCH v2 1/2] usb: add hub portmap

Allow usb hubs to map (software) ports to physical ports via op callback. This is needed to make bootorder work in case there isn't a simple linear mapping. Signed-off-by: Gerd Hoffmann --- src/hw/usb.h | 1 + src/boot.c | 13 ++--- 2 files changed, 11

Re: [SeaBIOS] [Qemu-devel] Commit 77af8a2b95b79699de650965d5228772743efe84 breaks Windows 2000 support

Hi, > It's a good goal. > > I apologize for forgetting the context, but what exactly was the > argument against: > > - splitting modern ACPI generation from ancient ACPI generation (so > that > we can assign separate maintainers to ancient vs. modern), > > - restricting ancient ACPI